JPH01225339A - Manufacture of multilayer wiring structure using resin interlayer film - Google Patents

Manufacture of multilayer wiring structure using resin interlayer film

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Publication number
JPH01225339A
JPH01225339A JP5213388A JP5213388A JPH01225339A JP H01225339 A JPH01225339 A JP H01225339A JP 5213388 A JP5213388 A JP 5213388A JP 5213388 A JP5213388 A JP 5213388A JP H01225339 A JPH01225339 A JP H01225339A
Authority
JP
Japan
Prior art keywords
film
chemical vapor
plasma chemical
vapor deposition
silicon nitride
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5213388A
Other languages
Japanese (ja)
Other versions
JP2743366B2 (en
Inventor
Tetsuya Honma
哲哉 本間
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP63052133A priority Critical patent/JP2743366B2/en
Publication of JPH01225339A publication Critical patent/JPH01225339A/en
Application granted granted Critical
Publication of JP2743366B2 publication Critical patent/JP2743366B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Formation Of Insulating Films (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To strengthen the moistureproofness by a method wherein, after a final metal wiring part has been formed on an interlayer insulating film formed by heat-treating a specific polyamide acid silicon type intermediate body, it is heat-treated at a specific treatment and a cover film by a two-layer film using a plasma chemical vapor growth silicon nitride film or the like is formed. CONSTITUTION:A solution which contains a polyamide acid silicon type intermediate body formed by a reaction after mixing an aromatic tetracarboxylic acid dianhydride as shown by Formula I, a diamine as shown by Formula II and an aminosilicon compound as shown by Formula III is coated and heat- treated; an interlayer insulating resin film is formed; in succession, a final metal wiring part is formed on it; after that, a heat treatment is executed at a temperature of 300-450 deg.C; a cover film by a two-layer film using a plasma chemical vapor growth silicon nitride film or the like is formed. In the formulae, R<1> is a tetravalent carboxylic aromatic group, R<2> is an aromatic group whose number of carbon is 6-30 or the carbocyclic aromatic group whose carbon atoms are 6-30, R<3> and R<4> are alkyl groups whose carbon atoms are 1-6 independently or a phenyl group, and K is a value of 1<=K<=3.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、樹脂層間膜を用いた多層配線構造体の製造方
法に関し、特に耐湿性が強化さhた樹脂層間膜を利用し
た多層配線構造体の製造方法に関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a multilayer wiring structure using a resin interlayer film, and in particular to a multilayer wiring structure using a resin interlayer film with enhanced moisture resistance. Concerning a method of manufacturing a body.

〔従来の技術〕[Conventional technology]

従来、樹脂膜を層間絶縁膜として用いる多層配線は、樹
脂膜として耐熱性に優れたポリイミド樹脂すなわち芳香
族テトラカルボン酸二無水物と芳香族ジアミンとを等モ
ルで反応せしめることによって形成したポリアミド酸溶
液を加熱重合せしめることによって形成した膜を用いて
いる。
Conventionally, multilayer wiring using a resin film as an interlayer insulating film has been made using polyimide resin, which has excellent heat resistance, as the resin film, that is, polyamic acid formed by reacting equimolar amounts of aromatic tetracarboxylic dianhydride and aromatic diamine. A film formed by heating and polymerizing a solution is used.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかしながら上述したポリイミド樹脂は、このポリイミ
ド樹脂膜上に耐湿性強化のためにパッシベーション膜と
してプラズマ化学気相成長によるシリコン窒化膜等の無
機膜を形成したときにその無機膜にクラックが発生した
り(SemiconductorWorld  198
8年10月号第40頁)、しわが発生するという欠点が
あり、著しく耐湿性信頼性を劣化させるという問題があ
る。
However, with the above-mentioned polyimide resin, when an inorganic film such as a silicon nitride film is formed by plasma chemical vapor deposition as a passivation film on the polyimide resin film to strengthen moisture resistance, cracks may occur in the inorganic film ( Semiconductor World 198
(October 2008, p. 40), there is a problem in that wrinkles occur, and the moisture resistance reliability is significantly deteriorated.

本発明の目的は上記問題点を解消したすなわち耐湿性の
強化された樹脂層間膜を用いた多層配線構造体の製造方
法を提供することにある。
An object of the present invention is to provide a method for manufacturing a multilayer wiring structure using a resin interlayer film that eliminates the above-mentioned problems, that is, has enhanced moisture resistance.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の樹脂層間膜を用いた多層配線構造体の製造方法
は、層間絶縁樹脂膜が下記の式(1)で表わされる芳香
族テトラカルボン酸二無水物と、式(2)で表わされる
ジアミンと、式(3)で表わされるアミノシリコン化合
物とを混合反応せしめることによって形成されるポリア
ミド酸シリコン型中間体を含有してなる溶液を塗布・熱
処理せしめることによって形成され、かつ、その層間絶
縁膜上に最終金属配線を形成後、300〜450℃の温
度で熱処理をし、プラズマ化学気相成長シリコン窒化膜
又はプラズマ化学気相成長シリコン酸化窒化膜又は、プ
ラズマ化学気相成長シリコン酸化窒化膜と、プラズマ化
学気相成長シリコン窒化膜との2層膜によるカバー膜を
形成することを特徴としている。
In the method for manufacturing a multilayer wiring structure using a resin interlayer film of the present invention, the interlayer insulating resin film is composed of an aromatic tetracarboxylic dianhydride represented by the following formula (1) and a diamine represented by the formula (2). and an aminosilicon compound represented by formula (3), and an interlayer insulating film formed by applying and heat-treating a solution containing a polyamic acid silicon type intermediate formed by mixing and reacting with an amino silicon compound represented by formula (3). After forming the final metal wiring thereon, heat treatment is performed at a temperature of 300 to 450°C to form a plasma chemical vapor deposition silicon nitride film, a plasma chemical vapor deposition silicon oxynitride film, or a plasma chemical vapor deposition silicon oxynitride film. The method is characterized in that a cover film is formed as a two-layer film including a plasma-enhanced chemical vapor deposition silicon nitride film.

NHt  R”  NHt           ・・
・・・・(2)NHt−8Si −R1−x (ORつ
、・・・・・・(3)式(1)〜(3)において、R1
は4価の炭素環式芳香族基を表わし、R2は炭素数6〜
30個の芳香脂肪族又は、炭素数6〜30個の炭素環式
芳香族基、R3及びR4は独立に、炭素数1〜6のアル
キル基又はフェニル基であり、Kは1≦に≦3の値であ
る。
NHt R" NHt...
...... (2) NHt-8Si -R1-x (OR) ...... (3) In formulas (1) to (3), R1
represents a tetravalent carbocyclic aromatic group, and R2 has 6 to 6 carbon atoms.
30 aromatic aliphatic or carbocyclic aromatic groups having 6 to 30 carbon atoms, R3 and R4 are independently an alkyl group having 1 to 6 carbon atoms or a phenyl group, and K is 1≦≦3 is the value of

さらに上記のプラズマ化学気相成長シリコン窒化膜又は
プラズマ化学気相成長シリコン窒化膜はその内部応力が
圧縮応力でありその大きさが、10 ”−10”dyn
e/aAであることを特徴としている。
Furthermore, the internal stress of the plasma chemical vapor deposition silicon nitride film or the plasma chemical vapor deposition silicon nitride film described above is compressive stress, and the magnitude thereof is 10"-10" dyn.
It is characterized by being e/aA.

本発明によれば層間膜として用いる樹脂膜中にSiO成
分を含有せしめることによってその樹脂膜上にカバー膜
としてその内部応力が圧縮応力であり、その大きさが1
0 ’〜10 ”dyne/ aiであるプラズマ化学
気相成長シリコン窒化膜又は、プ ・ラズマ化学気相成
長シリコン酸化窒化膜又は、プラズマ化学気相成長シリ
コン窒化膜とプラズマ化学気相成長シリコン窒化膜との
2層膜を形成したときにクラックやしわが発生しない。
According to the present invention, by incorporating a SiO component into a resin film used as an interlayer film, a cover film is formed on the resin film so that the internal stress is compressive stress, and the magnitude thereof is 1.
0' to 10'' dyne/ai plasma chemical vapor grown silicon nitride film or plasma chemical vapor grown silicon oxynitride film or plasma chemical vapor grown silicon nitride film and plasma chemical vapor grown silicon nitride film No cracks or wrinkles occur when a two-layer film is formed.

〔実施例〕〔Example〕

次に、本発明を実施例に基づき図面を用いて説明する。 Next, the present invention will be explained based on embodiments using drawings.

本実施例で用いた樹脂膜形成用塗布溶液は7ミノシリコ
ン化合物として NHt−OS i (OCHs) * で表わされる。P−7ミノフエニルトリメトキシシラン
をジアミンとしてジアミノジフェニルエーテルを、また
、芳香族テトラカルボン酸二無水物として、ベンゾフェ
ノンテトラカルボン酸二無水物を用いP−7ミノフエニ
ルトリメトキシシランのモル濃度を40%とした。また
溶媒としてジメチルアセトアミドを用い溶液の粘度を3
00cm−poiseとした。
The coating solution for resin film formation used in this example is expressed as NHt-OS i (OCHs) * as a 7-minosilicon compound. Diaminodiphenyl ether was used as P-7 minophenyltrimethoxysilane as a diamine, and benzophenonetetracarboxylic dianhydride was used as the aromatic tetracarboxylic dianhydride, and the molar concentration of P-7 minophenyltrimethoxysilane was 40%. And so. In addition, using dimethylacetamide as a solvent, the viscosity of the solution was adjusted to 3.
00 cm-poise.

〔実施例1〕 本実施例では、シリコン基板上に本発明に基づく樹脂膜
を形成し、その樹脂膜上にプラズマ化学気相成長シリコ
ン窒化膜を形成し、クラック、しわが発生するかどうか
を調べた。なお比較としてP−7ミノフエニルトリメト
キシシランを含まないベンゾフェノンテトラカルボン酸
二無水物とジアミノジフェニルエーテルから成るポリイ
ミド樹脂膜を用いた。
[Example 1] In this example, a resin film based on the present invention was formed on a silicon substrate, and a plasma chemical vapor deposition silicon nitride film was formed on the resin film to determine whether cracks and wrinkles would occur. Examined. For comparison, a polyimide resin film made of benzophenone tetracarboxylic dianhydride and diaminodiphenyl ether, which does not contain P-7 minophenyltrimethoxysilane, was used.

シリコン基板上に本発明に基づく樹脂膜と、ポリイミド
膜を同様な熱処理を加えることにより約1.5μmの膜
厚で形成し、最終熱処理を350℃。
A resin film based on the present invention and a polyimide film were formed on a silicon substrate to a thickness of about 1.5 μm by applying similar heat treatment, and the final heat treatment was performed at 350°C.

400℃、450℃で1時間、窒素ガス雰囲気中で施し
その試料上にプラズマ化学気相成長でそのガス流量比を
変えることにより、その内部応力が圧縮応力でありその
大きさをlXl0”〜1xlO11′dyne/adの
間で変化させ、300℃の温度で厚さ約1.0μmのシ
リコン窒化膜を形成したときのクラック、しわの有無を
調べた結果を第1表に示す。
By applying plasma chemical vapor deposition on the sample in a nitrogen gas atmosphere for 1 hour at 400°C and 450°C and changing the gas flow rate ratio, the internal stress is compressive stress and its magnitude can be determined from lXl0'' to 1xlO11. Table 1 shows the results of examining the presence or absence of cracks and wrinkles when a silicon nitride film with a thickness of about 1.0 μm was formed at a temperature of 300° C. by varying the dyne/ad.

同図から本発明による樹脂膜を用いた場合にはその最終
熱処理温度が350℃、400℃、450℃でさらにシ
リコン窒化膜の内部応力がlXl0’〜I X 10 
”dyneの間でクランク、しわは発生しなかった。し
かしながらポリイミド樹脂膜の場合には、クラックは発
生しなかったが、しわが発生した。
From the same figure, when the resin film according to the present invention is used, the internal stress of the silicon nitride film is 1X10' to 10
"Cranks and wrinkles did not occur between the dyne. However, in the case of the polyimide resin film, no cracks occurred, but wrinkles did occur.

第1表 〔実施例2〕 第1図(a)〜(g)は実施例により耐湿性強化された
2層A[配線構造体を形成する場合の工程断面図である
Table 1 [Example 2] Figures 1(a) to 1(g) are process cross-sectional views for forming a two-layer A wiring structure with enhanced moisture resistance according to the example.

第2図(a)において半導体素子能動部が形成さり、さ
らに化学気相成長によるリンガラス膜202を介したポ
リシリコン電極203,203’ が形成された素子基
板2010表面に化学気相成長によるリンガラス膜20
4を形成し、公知のリソグラフィー、ドライエツチング
により同図(b)に示すようにポリシリコン電極と第1
のアルミニウム配線との電気的導通なとるための第1の
開口205゜205′を設け、続いてスパッタ法により
厚さ約1μmのアルミニウム膜を形成し、フォトリソグ
ラフィー、ドライエツチングにより同図(C)に示すよ
うに第1のアルミニウム配線206,206′を形成す
る。次に、同図(d)に示すように、本発明による塗布
溶液を毎分2000回転で30秒間回転塗布し、100
℃で1時間、240℃で30分間さらに400℃で1時
間窒素ガス雰囲気中で熱処理し、約1.5μm厚の樹脂
膜207を形成する。
In FIG. 2(a), a semiconductor element active part is formed, and phosphorus is formed by chemical vapor deposition on the surface of an element substrate 2010 on which polysilicon electrodes 203, 203' are formed via a phosphorus glass film 202 by chemical vapor deposition. glass film 20
4, and by using known lithography and dry etching, as shown in FIG.
First openings 205° and 205' are formed to establish electrical continuity with the aluminum wiring, and then an aluminum film with a thickness of about 1 μm is formed by sputtering, and then photolithography and dry etching are performed to form the first openings 205° and 205' in the same figure (C). First aluminum interconnections 206 and 206' are formed as shown in FIG. Next, as shown in the same figure (d), the coating solution according to the present invention was spin-coated at 2000 revolutions per minute for 30 seconds.
C. for 1 hour, 240.degree. C. for 30 minutes, and 400.degree. C. for 1 hour in a nitrogen gas atmosphere to form a resin film 207 with a thickness of about 1.5 .mu.m.

続いて樹脂膜のエツチングマスクとして約0.1μmの
チタン金属膜をスパッタ法により形成し、公知のフォト
リソグラフィー、ドライエツチングによりチタン金属膜
と樹脂膜をエツチング後、エツチングマスクとして用い
たチタン金属を除去することによって同図(e)に示す
ように第1のアルミニウム配線206,208’と、第
2のアルミニウム配線との電気的導通をとるための第2
の開口208゜208′を設ける。次にスパッタ法によ
り厚さ約1μmのアルミニウム膜を形成し、フォトリソ
グラフィー、ドライエツチングにより同図(「)に示す
ように第2のアルミニウム配線209,209’ を形
成することによって2層アルミニウム配線構造体が形成
される。
Next, a titanium metal film with a thickness of about 0.1 μm was formed by sputtering as an etching mask for the resin film, and after etching the titanium metal film and the resin film by known photolithography and dry etching, the titanium metal used as an etching mask was removed. By doing so, as shown in FIG.
Openings 208° and 208' are provided. Next, an aluminum film with a thickness of approximately 1 μm is formed by sputtering, and second aluminum wirings 209 and 209' are formed by photolithography and dry etching as shown in the figure ( ), thereby creating a two-layer aluminum wiring structure. A body is formed.

次に、樹脂膜が吸収した水分を除去するために、400
℃で15分間、窒素ガス雰囲気中で熱処理後、同図(g
)に示すようにただちにプラズマ化学気相成長により3
50℃の温度で約1μmの厚さでその内部応力が圧縮応
力であり、その大きさが3×10°dyne/aaであ
るシリコン窒化膜210を形成後、フォトリソグラフィ
ー、ドライエツチングによりチップ外と電気的導通をと
るためのアルミニ、ラムパッド上のシリコン窒化膜を除
去する。
Next, in order to remove the moisture absorbed by the resin film, 400
After heat treatment at ℃ for 15 minutes in a nitrogen gas atmosphere, the same figure (g
) immediately by plasma chemical vapor deposition as shown in 3.
After forming a silicon nitride film 210 with a thickness of about 1 μm at a temperature of 50° C., whose internal stress is compressive stress and whose magnitude is 3×10° dyne/aa, the outside of the chip is removed by photolithography and dry etching. Remove the silicon nitride film on the aluminum and ram pads for electrical continuity.

以上の工程により耐湿性強化された2層アルミニウム配
線構造体が形成される。
Through the above steps, a two-layer aluminum wiring structure with enhanced moisture resistance is formed.

本実施例で形成した耐湿性強化された2層アルミニウム
配線構造体を150℃で2気圧の飽和水蒸気中で300
時間の耐湿性試験を行ったところ、アルミニウム配線の
腐食は全くないものであった。
The two-layer aluminum wiring structure with enhanced moisture resistance formed in this example was heated at 150°C and saturated steam at 2 atm for 300°C.
A moisture resistance test over time revealed no corrosion of the aluminum wiring.

カバー膜として、2 X 10 ’dyne/aaの圧
縮応力を有するシリコン酸化窒化膜を用いた場合、シリ
コン酸化窒化膜との2層膜を用いた場合にも同様な効果
が得られた。
Similar effects were obtained when a silicon oxynitride film having a compressive stress of 2 x 10' dyne/aa was used as the cover film, and when a two-layer film with a silicon oxynitride film was used.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明に基づく樹脂膜はその樹脂膜
上にその内部応力が圧縮応力であり、その大きさが10
 ”−10”dyme/ryAであるプラズマ化学気相
成長によるシリコン窒化膜、又はシリコン酸化窒化膜、
又はシリコン窒化膜とシリコン酸化窒化膜との2層膜を
形成してもクラック、しわが発生しないため耐湿信頼性
を向上できるという効果がある。したがって、本発明に
よって得らhる耐湿性強化された樹脂間膜を用いた多層
配線構造体は、高耐湿性、高信頼性を要求される半導体
装置に多大な効果をもたらす。
As explained above, in the resin film based on the present invention, the internal stress on the resin film is compressive stress, and its magnitude is 10
"-10" dyme/ryA silicon nitride film or silicon oxynitride film by plasma chemical vapor deposition,
Alternatively, even if a two-layer film of a silicon nitride film and a silicon oxynitride film is formed, cracks and wrinkles do not occur, so there is an effect that the moisture resistance reliability can be improved. Therefore, the multilayer wiring structure using the resin interlayer film with enhanced moisture resistance obtained by the present invention brings great effects to semiconductor devices that require high moisture resistance and high reliability.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)〜(g)は本発明の他の実施例に基づく耐
湿性の強化された2層アルミニウム配線構造体を形成す
る場合の工程断面図である。 201・・・・・・素子基板、202・・・・・・リン
ガラス膜、203.203’・・・・・・ポリシリコン
電極、204・・・・・・リンガラス膜、205,20
5’・・・・・・第1の開口、206,206’・・・
・・・第1のアルミニウム配線、207・・・・・・本
発明に基づく樹脂膜、208゜208′・・・・・・第
2の開口、・209,209’・・・・・・第2のアル
ミニウム配線、210・・・・・・シリコン窒化膜。 代理人 弁理士  内 原   音
FIGS. 1(a) to 1(g) are cross-sectional views showing the process of forming a two-layer aluminum wiring structure with enhanced moisture resistance according to another embodiment of the present invention. 201...Element substrate, 202...Phosphorus glass film, 203.203'...Polysilicon electrode, 204...Phosphorus glass film, 205,20
5'...First opening, 206, 206'...
...First aluminum wiring, 207...Resin film based on the present invention, 208°208'...Second opening, 209, 209'...No. 2 aluminum wiring, 210...silicon nitride film. Agent Patent Attorney Oto Uchihara

Claims (2)

【特許請求の範囲】[Claims] (1)層間絶縁樹脂膜が、下記の式(1)で表わされる
芳香族テトラカルボン酸二無水物と、式(2)で表わさ
れるジアミンと、式(3)で表わされるアミノシリコン
化合物とを混合反応せしめることによって形成されるポ
リアミド酸シリコン型中間体を含有してなる溶液を塗布
・熱処理せしめることによって形成され、続いて、該層
間絶縁樹脂膜上に最終金属配線を形成後、300〜45
0℃の温度で熱処理をし、プラズマ化学気相成長シリコ
ン窒化膜又は、プラズマ化学気相成長シリコン酸化窒化
膜又は、プラズマ化学気相成長シリコン酸化窒化膜と、
プラズマ化学気相成長シリコン窒化膜との、2層膜によ
るカバー膜を形成することを特徴とする耐湿性強化され
た樹脂層間膜を用いた多層配線構造体の製造方法 ▲数式、化学式、表等があります▼ (式(1)〜(3)において、R^1は4価の炭素環式
芳香族基を表わし、R^2は炭素数6〜30個の芳香族
基、又は炭素数6〜30個の炭素環式芳香族基、R^3
及びR^4は独立に炭素数1〜6のアルキル基、又はフ
ェニル基であり、Kは1≦K≦3の値である。)
(1) The interlayer insulating resin film contains an aromatic tetracarboxylic dianhydride represented by the following formula (1), a diamine represented by the formula (2), and an amino silicon compound represented by the formula (3). It is formed by applying and heat-treating a solution containing a polyamic acid silicon type intermediate formed by a mixed reaction, and then, after forming the final metal wiring on the interlayer insulating resin film,
Heat-treated at a temperature of 0° C. to form a plasma chemical vapor deposition silicon nitride film, a plasma chemical vapor deposition silicon oxynitride film, or a plasma chemical vapor deposition silicon oxynitride film;
Method for manufacturing a multilayer wiring structure using a resin interlayer film with enhanced moisture resistance, characterized by forming a two-layer cover film with a plasma chemical vapor deposition silicon nitride film ▲Mathematical formulas, chemical formulas, tables, etc. ▼ (In formulas (1) to (3), R^1 represents a tetravalent carbocyclic aromatic group, and R^2 represents an aromatic group having 6 to 30 carbon atoms, or an aromatic group having 6 to 30 carbon atoms. 30 carbocyclic aromatic groups, R^3
and R^4 are independently an alkyl group having 1 to 6 carbon atoms or a phenyl group, and K has a value of 1≦K≦3. )
(2)特許請求の範囲第1項記載の樹脂層間膜を用いた
多層配線構造体の製造方法において、前記該多層配線構
造体上に形成せしめるプラズマ化学気相成長シリコン窒
化膜、又はプラズマ化学気相成長シリコン酸化窒化膜は
その内部応力が圧縮応力でありその大きさが10^■〜
10^■dyne/cm^2であることを特徴とする樹
脂層間膜を用いた多層配線構造体の製造方法。
(2) In the method for manufacturing a multilayer wiring structure using a resin interlayer film according to claim 1, a plasma chemical vapor deposition silicon nitride film or a plasma chemical vapor deposition silicon nitride film formed on the multilayer wiring structure is provided. The internal stress of the phase-grown silicon oxynitride film is compressive stress, and its magnitude is 10^■~
A method for manufacturing a multilayer wiring structure using a resin interlayer film, characterized in that the dyne/cm^2 is 10^■dyne/cm^2.
JP63052133A 1988-03-04 1988-03-04 Method for manufacturing multilayer wiring structure using resin interlayer film Expired - Fee Related JP2743366B2 (en)

Priority Applications (1)

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JP63052133A JP2743366B2 (en) 1988-03-04 1988-03-04 Method for manufacturing multilayer wiring structure using resin interlayer film

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Application Number Priority Date Filing Date Title
JP63052133A JP2743366B2 (en) 1988-03-04 1988-03-04 Method for manufacturing multilayer wiring structure using resin interlayer film

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JPH01225339A true JPH01225339A (en) 1989-09-08
JP2743366B2 JP2743366B2 (en) 1998-04-22

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0555386A (en) * 1991-08-23 1993-03-05 Nec Corp Manufacture of semiconductor device
JPH0590426A (en) * 1991-09-27 1993-04-09 Nec Corp Manufacture of semiconductor device
JP2014089992A (en) * 2012-10-29 2014-05-15 Sumitomo Electric Device Innovations Inc Semiconductor device and method for manufacturing the same
US9640429B2 (en) 2012-10-29 2017-05-02 Sumitomo Electric Device Innovations, Inc. Method of fabricating semiconductor device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5779648A (en) * 1980-11-05 1982-05-18 Sanyo Electric Co Ltd Multilayer wiring of semiconductor device
JPS62261149A (en) * 1986-05-08 1987-11-13 Nec Corp Manufacture of semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5779648A (en) * 1980-11-05 1982-05-18 Sanyo Electric Co Ltd Multilayer wiring of semiconductor device
JPS62261149A (en) * 1986-05-08 1987-11-13 Nec Corp Manufacture of semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0555386A (en) * 1991-08-23 1993-03-05 Nec Corp Manufacture of semiconductor device
JPH0590426A (en) * 1991-09-27 1993-04-09 Nec Corp Manufacture of semiconductor device
JP2014089992A (en) * 2012-10-29 2014-05-15 Sumitomo Electric Device Innovations Inc Semiconductor device and method for manufacturing the same
US9640429B2 (en) 2012-10-29 2017-05-02 Sumitomo Electric Device Innovations, Inc. Method of fabricating semiconductor device

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