JPH01220838A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPH01220838A
JPH01220838A JP63046899A JP4689988A JPH01220838A JP H01220838 A JPH01220838 A JP H01220838A JP 63046899 A JP63046899 A JP 63046899A JP 4689988 A JP4689988 A JP 4689988A JP H01220838 A JPH01220838 A JP H01220838A
Authority
JP
Japan
Prior art keywords
chip
electrode
metal
film
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63046899A
Other languages
English (en)
Inventor
Mitsuaki Fujihira
藤平　充明
Naoto Okazaki
尚登 岡崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP63046899A priority Critical patent/JPH01220838A/ja
Publication of JPH01220838A publication Critical patent/JPH01220838A/ja
Pending legal-status Critical Current

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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
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    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
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  • Engineering & Computer Science (AREA)
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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、シ・リコン酸化膜と密着性の高い材料から
成る基板で構成された半導体装置または前記基板上に形
成されたエピタキシャル層に構成された半導体装置に関
するものである。
〔従来の技術〕
チップの電極とパッケージの電極を接続する方法として
、ワイヤボンディング法がある。このワイヤボンディン
グ法には、熱圧着法と超音波法とがある。
熱圧着法は、第２図で示すように、金属の融点以下の温
度で、双方の金属の清浄面を加圧接触し、溶融すること
なく金属の拡散によって接合させるものである。チップ
１やパッケージ２あるいは金属ワイヤ３を約３００℃に
加熱した後、チップ１のＡＩパッド４およびパッケージ
の電極パッド５を形成しているＡｕ、Ａｇのめっき層や
Ａｕ−Ｐｄの厚膜に、それぞれ金属ワイヤ３（Ａｕ線）
を加圧接触させて接合する。この方法は、ボンデインク
の方向性がないため作業性がよい。
超音波法は、第３図で示すように、超音波の振動を接続
する金属ワイヤ６（Ａｌ線）に伝えて、チップ１上のＡ
Ｉパッド４と金属ワイヤ６間との摩擦によりＡ１表面の
酸化膜を除去し双方を接触させる。その後、金属ワイヤ
６とボンディングツールとの間に生ずる摩擦熱によって
、接合をより強固なものにする。この方法は、Ａ１線を
常温においてボンディングするので、熱圧着法のような
ボンディング時の熱的な影響がなく、Ａｌ−Ａｌ接続な
ので強度的に弱い金属間化合物等をつくらず、接合方法
としては信頼性が高い。
いずれの方法による場合でも、半導体から成るチップ１
上に、ワイヤボンディング用電極として金属（ＡＩ）バ
ッド４を形成しており、この金属（ＡＩ）バッド４に金
属ワイヤ３．６が接続されている。
〔発明が解決しようとする課題〕
しかしながら、半導体と金属は一般的に密着性が悪いの
で、両者と密着性の良い薄膜を介在しなければならない
。
第４図は、従来の半導体装置の構成を示すものである。
同図（ａ）は、ＧａＡｓ基板から成るチップ１上に直接
金属バッド４を形成した構成を示すものである。この場
合、ワイヤボンディング時のストレスにより、チップ１
と金属パッド４の界面から剥離したり、チップ１に損傷
を与え金属バッド４が剥離するという問題がある。
そのため、同図（ｂ）ではチップ１上にＧａＡｓと密着
性の良いシリコン酸化膜（Ｓ　ｉＯ２）または金属と密
着性の良いシリコン窒化膜（ＳｉＮ）７を形成し、その
上に金属パッド４を形成している。しかし、シリコン酸
化膜を使用したときにはシリコン酸化膜と金属との密着
不良が生じ、シリコン窒化膜を使用したときにはシリコ
ン窒化膜とＧａＡｓとの密着不良が生じるので、界面剥
離が発生する。
そこで、同図（Ｃ）で示すように、チップ１上にシリコ
ン酸化膜８およびシリコン窒化膜９を２層構造として形
成し、その上に金属パッド４を構成したものがある。こ
の場合、界面剥離は抑止できるがプロセスが複雑になり
、さらにシリコン窒化膜９の大きな応力によりチップ１
の電気特性が変動する。このように、従来技術では界面
剥離あるいは複雑なプロセスの為、信頼性及び生産歩留
まりが悪いという欠点があった。
そこでこの発明は、信頼性及び生産歩留まりの向上を目
的とする。
〔課題を解決するための手段〕
上記課題を達成するため、この発明はシリコン酸化膜と
密着性の高い材料から成る基板で構成された半導体装置
またはこの基板上に形成されたエピタキシャル層に構成
された半導体装置において、基板またはエピタキシャル
層上にシリコン・オキシ・ナイトライド（ＳｉＯＮ　　
）膜を形成し、　　　ｙ シリコン・オキシ・ナイトライド膜上にシリコン窒化膜
と密着性の高い材料から成るボンディング用電極を形成
することを特徴とする。
（作用〕 この発明は、以上のように構成されているので、チップ
及び金属パッドとの界面剥離を防止することができ、電
極形成プロセスを簡単にすることができる。
〔実施例〕
以下、この発明の一実施例に係る半導体装置を添付図面
に基づき説明する。なお、説明において同一要素には同
一符号を用い、重複する説明は省略する。
第１図は、この発明の一実施例に係る半導体装置を示す
ものである。チップ１０は、たとえばＧａＡｓで形成さ
れている。このチップ１０上には、チップ１０を形成す
る材質（Ｇ　ａ　Ａ　ｓ　）と密着性の良い材質（Ｓ　
ｉＯ２）と、電極として使用゛される材質（金属）と密
着性の良い材質（ＳｉＮ）との中間的性質を有する材質
（ＳｉＯＮ　　）で　　　ｙ 構成された薄膜１１が形成されている。この薄膜１１上
に電極バッド１２が構成されている。この電極バッド１
２は、導電体であればよく、特に金属に限定されるもの
ではない。その為、チップ１０との密着強度および電極
バッド１２との密着強度が十分に確保でき、ワイヤボン
ディング用電極の界面剥離を防止することができる。た
とえば、ＧａＡｓ基板に対してＳｉＯＮ　　を使用した
場ｙ 合、ＳｉＯＮ　　の組成比を変化させることによｙ す、薄膜の性質をＳ　ｌ　０２膜あるいはＳｉＮ膜に近
付けることができ、電極材料が変わっても密着強度をコ
ントロールすることができる。
なお、チップの材質としてこの実施例ではＧａＡｓ基板
で説明しているが、特にＧａＡｓに限定されるものでは
ない。重要なことは、基板を形成する半導体と、電極を
形成する金属との中間的密着性を有する材質を、基板と
電極の間に介在して半導体装置を構成している点である
。したがって、基板材料としては、シリコン（Ｓｔ）や
インジウムリン（ＩｎＰ）などでもよい。この場合でも
、ＳｉＯＮ　　を使用することにより密着強ｙ 度が十分に確保することができる。
さらに、基板（たとえば、ＧａＡｓ）上に成長させたエ
ピタキシャル層（ＡＩＧａＡｓ層）上にＳｉＯＮ　　を
構成しても、同等の効果が得られｙ る。
また、ボンディング用電極として単層金属で説明したが
、特にこの実施例に限定されるものではない。たとえば
、チタン（Ｔｉ）、白金（ｐｔ）、金（Ａｕ）を含んで
構成される多層金属でもよい。
この場合、Ａｕを配線電極としてＴｔをＳｉＯＮ　　と
の密着強化のために使用する。
ｙ ｐｔは、ＡｕとＴｉとの反応防止に使用する。このよう
に、Ｔｉ−Ｐｔ−Ａｕの多層配線構造とすることにより
、エレクトロマイグレーションが強くなる。
さらに、上述した材料の他にタングステンシリサイドの
ようなものでもよい。
〔発明の効果〕
この発明は、以上説明したように構成されているので、
電極と基板間の界面剥離を防止でき、半導体装置の信頼
性および生産歩留まりが向上する。
特に、基板と電極の間に介在する薄膜が一層で足りるの
で、製造プロセスが複雑にならないという利点がある。
【図面の簡単な説明】
第１図は、この発明の一実施例に係る半導体装置の基本
構成を示す図、第２図及び第３図は、ワイヤボンディン
グ法を説明するための図、第４図は、従来技術の基本構
成を示す図である。 １．１０・・・チップ ２・・・パッケージ ３．６・・・金属ワイヤ ４・・・Ａｌバッド ５・・・電極パッド ７・・・シリコン酸化膜またはシリコン窒化膜８・・・
シリコン酸化膜 ９・・・シリコン窒化膜 １１・・・薄膜 １２・・・電極パッド 特許出願人　　住友電気工業株式会社 代理人弁理士　　　長谷用　　芳　　樹間　　　　　　
　　　　山　　　　１）　　　行　　　　−半導体装置
の基本構成 第１図 従来技術 第４図

Claims (1)

  1. 【特許請求の範囲】 　シリコン酸化膜（ＳｉＯ＿２）と密着性の高い材料か
    ら成る基板で構成された半導体装置または前記基板上に
    形成されたエピタキシャル層に構成された半導体装置に
    おいて、 前記基板または前記エピタキシャル層上にシリコン・オ
    キシ・ナイトライド（ＳｉＯ＿ｘＮ＿ｙ）膜を形成し、 前記シリコン・オキシ・ナイトライド膜上にシリコン窒
    化膜（ＳｉＮ）と密着性の高い材料から成るボンディン
    グ用電極を形成することを特徴とする半導体装置。
JP63046899A 1988-02-29 1988-02-29 半導体装置 Pending JPH01220838A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63046899A JPH01220838A (ja) 1988-02-29 1988-02-29 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63046899A JPH01220838A (ja) 1988-02-29 1988-02-29 半導体装置

Publications (1)

Publication Number Publication Date
JPH01220838A true JPH01220838A (ja) 1989-09-04

Family

ID=12760215

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63046899A Pending JPH01220838A (ja) 1988-02-29 1988-02-29 半導体装置

Country Status (1)

Country Link
JP (1) JPH01220838A (ja)

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