JPH01212455A - Substrate for electronic component - Google Patents

Abstract

PURPOSE:To make it possible to provide a substrate for an electronic component with various circuit patterns in a high density by a method wherein the substrate is provided with vertically long bottomed holes, in which such the circuit elements as a register, a capacitor and an inductor are erected and are housed three- dimensionally. CONSTITUTION:A register 12, which consists of a silicon member for terminating resistance and assumes the form of a solid-state cylinder, is erected in the vertical direction and is housed three-dimensionally in a vertically long and bottomed hole 3 provided in a lower ceramic frame body 6 just under the inside end part of a circuit pattern 7 constituting a signal line 9. Moreover, in the same way as the above way, a capacitor 13 assuming into the form of a solid-state cylinder is erected in the vertical direction and is housed three-dimensionally in a vertical long and bottomed hole 3 provided in the frame body 6 just under a circuit pattern 7 constituting a power supply line 10. Then, a high-frequency element is mounted on a stage 4 on the upper surface of a bottom plate 5 on the inside of the frame body 6. Thereby, a substrate for an electronic component can be provided with such circuit elements as the register, the capacitor and an inductor without enabling the elements to occupy a great area two- dimensionally along the substrate surface.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a substrate for electronic components such as a package and a board for housing and mounting electronic components such as semiconductor elements.

[Conventional technology] Conventional boards on which electronic components are mounted include registers (
Circuit elements such as resistors), capacitors, and inductors were provided flat along the surface of the substrate.

Furthermore, packages that house electronic components such as semiconductor devices generally do not include circuit elements such as resistors, capacitors, and inductors.

Incidentally, conventionally, as described in Japanese Patent Laid-Open No. 59-54249, a cutout is provided in a part of a package housing a high-frequency element operated at a high frequency such as 1 OG Hz or higher. Some packages are equipped with circuit elements such as resistors for terminating resistors and capacitors for removing high-frequency noise inside the package, but even in such packages, the circuit elements are provided flatly along the surface of the package.

[Problems to be Solved by the Invention] However, if circuit elements such as resistors, capacitors, and inductors are provided two-dimensionally along the surface of an electronic component base such as a package or a board as in the above-mentioned conventional method,
The power of the circuit element! This occupies a large area of the surface of electronic component substrates such as packages and substrates. Then, the degree of freedom in arranging the circuit pattern provided along the surface of the electronic component base such as the same package or board is obstructed by the circuit element.
While making the arrangement of the circuit pattern complicated and difficult,
The arrangement density of the circuit pattern was reduced.

In addition, in the package described in JP-A-59-54249, a part of the package is provided with a large notch that reaches the external surface, so the airtightness inside the package is improved by the notch. Because of the risk of damage, a highly reliable semiconductor device could not be formed using this package.

The present invention was made in order to solve such problems, and its purpose is, in part, to provide resistors, capacitors,
A base for electronic components, such as a package or a board, which can maintain high airtightness and can be equipped with a circuit element such as an inductor without occupying a large area along the surface of the base, and a part thereof. For electronic components such as packages and boards that maintain high airtightness and are equipped with circuit elements such as resistors, capacitors, and inductors without occupying a large area along the surface of the substrate. The purpose is to provide a base.

[Means for Solving the Problems] In order to achieve the above object, the first electronic component substrate of the present invention has configuration examples shown in FIGS. 1 to 7 and 12 to 16. As shown, in a substrate 1 for electronic components such as a package or a board for storing and mounting electronic components, there is a vertically elongated substrate 1 in which circuit elements 2 such as resistors, capacitors, and inductors are erected and three-dimensionally housed. Bottomed hole 3
It is characterized by having the following.

Further, the second substrate for electronic components of the present invention includes a package, a substrate, etc. for storing and mounting electronic components, as shown in FIGS. 8 to 11, FIG. 17, and FIG. 18. In the electronic component substrate I, a vertically long bottomed hole 3 is provided in the substrate 1, and a resistor, a capacitor, etc. are inserted into the chain hole 3.
It is characterized in that circuit elements 2 such as inductors are housed upright and three-dimensionally.

[Function] In the first electronic component substrate of the present invention, if the circuit elements 2 such as resistors, capacitors, and inductors are erected and three-dimensionally housed in the vertically long bottomed hole 3 of the substrate, a package, Circuit elements 2 such as resistors, capacitors, and inductors can be provided on an electronic component base l such as a board without occupying a large area in plan along the surface of the base 1.

In addition, in the second substrate for electronic components of the present invention, a vertically long bottomed hole 3 is provided in the substrate l, and a register, a
Since the circuit elements 2 such as capacitors and inductors are erected and housed three-dimensionally, the circuit elements 2 are packaged,
A large area is not occupied along the surface of the base 1 such as a substrate.

Furthermore, in the first and second substrates for electronic components of the present invention, since the holes 3 provided or provided in the substrate 1 are bottomed,
The airtightness of the electronic component substrate 1 is not impaired.

[Example] Next, embodiments of the present invention will be described with reference to the drawings.

1 to 5 show preferred embodiments of a package which is the first substrate for electronic components of the present invention, FIG. 1 is a partially omitted plan view of the package, and FIG. 2 is the same as that of FIG. 1. 3 is an enlarged plan view of the package in FIG. 1 around the signal line, FIG. 4 is a partially enlarged BB sectional view of the package in FIG. 1, and FIG. The figure is an enlarged plan view of the vicinity of the power line of the package shown in FIG. 1. The embodiment shown in the above figure will be described below.

! a is a lower ceramic frame body 6 that accommodates a high-frequency element on the surface of a metal bottom plate 5 that constitutes a ground integrally equipped with a stage 4 on which a high-frequency element is mounted at the center of the upper surface;
This is a flat package in which an upper ceramic frame 8 covering the middle part of a circuit pattern 7 provided radially around the upper surface of the ceramic frame 6 is laminated together.

The lower ceramic frame 6 directly below the inner end of the circuit pattern 7 constituting the signal line 9 of this package 1a is provided with a structure that penetrates a part of the circuit pattern 7 and reaches the surface of the bottom plate 5 constituting the ground. It is provided with a vertically long bottomed hole 3 having a circular cross section and accommodating a resistor for a terminating resistor.

In addition, a part of the circuit pattern 7 is penetrated into the lower ceramic frame 6 immediately below the midway part of the circuit pattern 7 that constitutes the power supply line IO inside the upper ceramic frame 8, and is applied to the surface of the bottom plate 5 that constitutes the ground. It is provided with a vertically long bottomed hole 3 having a circular cross section and accommodating a capacitor for removing high frequency noise, which will be described later.

Further, a metallized layer 11 is integrally provided on the entire upper surface of the upper ceramic frame 8.

Further, the ends of the leads 15 are connected to the outer ends of the circuit pattern 7 outside the upper ceramic frame 8 by brazing or the like, and the leads 15 extend outward from the lower ceramic frame 6.

The flat package la shown in FIGS. 1 to 5 is constructed as described above.

Next, an example of its use will be explained.

As shown in FIG. 6, a resistance value such as 50Ω for a terminating resistor is inserted into a vertically long bottomed hole 3 provided in the lower ceramic frame 6 directly below the inner end of the circuit pattern 7 constituting the signal line 9. A resistor 12 in the shape of a solid column made of a silicon-based member having a cylindrical shape is passed through the inside of a hole 3 without leaving a gap around the resistor 12, and is vertically erected and housed three-dimensionally.

The upper and lower ends of the resistor 12 accommodated in the hole 3 are connected to the bottom plate 5 immediately below the hole 3 that closes the bottom surface of the hole and to the circuit pattern 7 that constitutes the signal line 9 directly above the hole 3.

Similarly, as shown in FIG.
The lower ceramic frame 6 directly below the circuit pattern 7 that constitutes the
In the vertically long bottomed hole 3, there is a hole 10 for removing high frequency noise.
A solid cylindrical capacitor I3 in which a ferroelectric material 13b is integrally sandwiched between upper and lower conductors 19a having a capacitance value of 00 pF or the like is passed through the inside of the hole 3 without leaving a gap around it, and is erected vertically. It is accommodated three-dimensionally.

The upper and lower ends of the capacitor 13 accommodated in the hole 3 are connected to the bottom plate 5 immediately below the hole 3 that closes the bottom surface of the hole and to the circuit pattern 7 that constitutes the epicenter line IO directly above the hole 3.

Here, the ends of the resistor 12 and capacitor 13, the bottom plate 5, and the circuit pattern 7 are A u-8i 5Au-G
By brazing using a low-temperature brazing material 13c such as e-based brazing material, by adhering using a conductive paste or adhesive, or by using a gold plating layer provided integrally on the end face of the resistor 12 or capacitor 13, etc. Connect by heat compression bonding.

Next, a high frequency element (not shown) is mounted on the stage 4 on the upper surface of the bottom plate 5 inside the lower ceramic frame 6.

Then, the signal electrode of the element and the upper ceramic frame 8
A wire (not shown) is used to connect the circuit pattern 7 constituting the inner signal line 9 to the portion of the circuit pattern 7 outside the hole 3 in which the register 12 is accommodated.

) to connect.

At the same time, the power supply electrode of the element and the inner end of the circuit pattern 7 constituting the power supply line IO inside the upper ceramic frame 8 are connected with a wire.

Thereafter, the top surface of the upper ceramic frame 8 is integrally covered with a cap (not shown), and the cap is covered with a metallized layer 11 on the top surface of the upper ceramic frame 8. wear.

Then, when a power supply current or an electric signal is passed through the lead 15, the current or signal is transmitted to the circuit pattern 7 on the upper surface of the lower ceramic frame 6 and the electrode of the high frequency element connected to the circuit pattern 7 with a wire, and is transmitted to the inside of the flat package la. A high-frequency element sealed in can be operated using the current or signal.

At that time, among the electric signals flowing through the wire to the circuit pattern 7 constituting the signal line 9, the wire connection part flows into the endless stub 7a of the circuit pattern 7 inside the wire connection part and continues to the stub 7a. The electric signal that is reflected and tries to flow into the circuit pattern 7 on the outside flows into the resistor 12 constituting the terminating resistor housed in the hole 3 of the lower ceramic frame 6 connected to the circuit pattern 7, and
It flows out and is removed to the bottom plate 5 which constitutes the ground connected to the resistor 12.

Furthermore, high-frequency noise mixed in the power supply current flowing into the power supply electrode of the high-frequency element through the circuit pattern 7 constituting the power supply line 10 on the upper surface of the lower ceramic frame 6 may be caused by the lower layer connected to the middle part of the circuit pattern 7. Ceramic frame 6
flows out through the capacitor 13 housed in the hole 3 to the bottom plate 5 constituting the ground to which the capacitor 13 is connected;
be excluded.

8 and 9 show preferred embodiments of the package which is the second substrate for electronic components of the present invention, FIG. 8 is an enlarged plan view of the signal line periphery of the package, and FIG. 9 is an enlarged plan view of the package. FIG. 2 is an enlarged cross-sectional view of the vicinity of the signal line. The embodiment shown in the above figure will be described below.

1b includes a lower ceramic frame 6 that accommodates a high-frequency element on the surface of a metal bottom plate 5 that constitutes a ground that is integrally equipped with a stage 4 that carries a high-frequency element at the center of its upper surface;
This is a flat package in which an upper ceramic frame 8 covering the middle part of a circuit pattern 7 provided radially around the upper surface of the ceramic frame 6 is laminated together.

The middle part of the circuit pattern 7 inside the upper ceramic frame 8 of this package lb is divided and removed, and the middle part inside the lower ceramic frame 6 is inserted into the lower ceramic frame 6 directly below the removed part of the circuit pattern 7. A vertically long bottomed hole 3 having a rectangular cross section is provided.

Then, in the bottomed hole 3, a resistor 12 having an elongated rectangular cross section with a resistor component 12b integrally sandwiched between the left and right conductors 12a is placed between the periphery of the resistor 12 and the inner peripheral surface of the hole 3. They are housed three-dimensionally by standing vertically with gaps between them.

Further, the resistor 12 is bonded to the bottom surface of the hole 3 using an adhesive or the like so that it does not separate from the hole 3.

Furthermore, the ends of the leads 15 are integrally connected to the outer ends of the circuit patterns 7 outside the upper ceramic frame 8 by brazing or the like, and the leads I5 are extended outward from the lower ceramic frame 6.

The flat package 1b shown in FIGS. 8 and 9 is constructed as described above.

Next, an example of its use will be explained.

As shown in FIGS. 10 and 11, the left and right conductors 12a of the resistor 12 are provided in the bottomed hole 3 provided in the lower ceramic frame 6 directly below the removed portion of the circuit pattern 7.
The divided left and right ends of the circuit pattern 7 near the conductor are connected via a thin band-shaped metal member 16.

Here, the left and right conductors 12a of the resistor 12, the ends of the circuit pattern 7, and the thin band-shaped metal member 16 are made of Au-
By brazing using a low-temperature brazing material such as 5L Au-Ge, by adhering using a conductive paste or adhesive, or by adding a gold plating layer etc. integrally provided on the end face of the resistor 12. Connect by thermocompression bonding.

Next, a high frequency element (not shown) is mounted on the stage 4 on the upper surface of the bottom plate 5 inside the lower ceramic frame 6.

Then, the electrodes of the element and the inner end of the circuit pattern 7 inside the upper ceramic frame 8 are connected with a wire (not shown).
Connect with.

Thereafter, the upper surface of the upper ceramic frame 8 is integrally covered with a cap (not shown), and the periphery of the cap is covered with the upper surface of the upper ceramic frame 8.
Deposit via ll.

Then, when a power supply current or an electric signal is passed through the lead 15, the current or signal flows through the circuit pattern 7, one conductor 12a of the resistor 12 connected to the circuit pattern 7 through the metal member 16,
Resistor component 12 integrally sandwiched between conductors 12a
The signal is transmitted to the other conductor 12a of the b register 12, the circuit pattern 7 connected to the conductor 12 by a metal member 16, and the electrode of the high-frequency element connected to the circuit pattern 7 with a wire, and the high-frequency element sealed inside the flat package lb. can be operated using the current or signal.

At that time, the register accommodated in hole 3 of package lb! 2 has the same effect as connecting the removed intermediate portions of the circuit pattern 7 with the resistor 12.

12 to 16 show another preferred embodiment of the substrate which is the first substrate for electronic components of the present invention.
13 is a partial plan view of the substrate, FIG. 13 is a sectional view taken along the line X-X of the substrate, and FIG. 14 is a sectional view taken along the Y-Y line of the substrate. below,
The embodiment shown in the above figure will be explained.

The lc is a multilayered ceramic substrate having a circuit pattern 7a made of a metallized layer or the like on which electronic components are mounted on its upper surface, and an internal circuit pattern 7b along the inside thereof.

The circuit pattern 7a on the upper surface of the substrate 1b is cut in the middle,
After removing the circuit pattern 7a, the substrate 1c directly below the removed circuit pattern 7a is provided with a vertically long bottomed hole 3a having a rectangular cross section for accommodating a ferroelectric material of a capacitor component to be described later.

In addition, a capacitor component member, which will be described later, is inserted into the substrate 1c immediately below the divided left and right ends of the circuit pattern 7a, and which penetrates a part of the divided ends of the circuit pattern 7a and reaches an intermediate part inside the substrate 1c. Vertical bottomed hole 3b for accommodating the conductor
Be prepared.

Further, a part of the circuit pattern 7a on the top surface of the board 1c is penetrated to the board lc between another circuit pattern 7a on the top surface of the board IC and the internal circuit pattern 7b immediately below the internal circuit pattern 7a on the top surface of the board 1c. 7b is provided with a vertically long bottomed hole 3 having a hexagonal cross section and accommodating a register to be described later.

The substrate 1c shown in FIGS. 12 to 14 has the above structure.

Next, an example of its use will be explained.

As shown in FIG. 15, a solid ferroelectric material 13λ having a rectangular cross section of a capacitor component is inserted into a bottomed hole 31 provided in the substrate 1c directly below the removed portion of the circuit pattern 7a.
The ferroelectric material 13a is vertically erected and three-dimensionally housed without leaving a gap around it, and the housed ferroelectric body 13a is fixed to the inner circumferential surface of the hole 3& using an adhesive or the like.

In addition, a solid conductor I3b having a rectangular cross section of a capacitor component is vertically inserted into the bottomed hole 3b provided in the substrate 1c immediately below the left and right ends of the divided left and right ends of the circuit pattern 7a without leaving a gap around the solid conductor I3b. It is housed three-dimensionally by standing upright in the direction.

Then, the upper end of the conductor 13b accommodated in the hole 3b is inserted into the hole 3b.
The divided left and right ends of the circuit pattern 7a directly above b are connected using the already mentioned low temperature brazing material 13c or the like.・ Similarly, as shown in FIG. 16, a solid hexagonal shape is inserted into the bottomed hole 3 provided in the substrate 1c between another circuit pattern 7a and the internal circuit pattern 7b immediately below it. A resistor 12 is passed through the inside of the hole 3 and accommodated without leaving a gap around it, and the upper and lower ends of the accommodated resistor 12 are connected to the circuit pattern 7a directly above the hole 3 and the bottom surface of the hole directly below the hole 3. A low-temperature brazing material 13c or the like is used to connect to the internal circuit pattern 7b that closes the inner circuit pattern 7b.

Then, when an electronic component is mounted on the circuit pattern 7a on the top surface of the board 1'c and a power supply current or an electric signal is passed through the circuit pattern 7a, the circuit pattern 7a and the internal circuit pattern 7b are connected.
The current or signal flows through the circuit pattern 7a, and the electronic components mounted on the circuit pattern 7a can be operated by the current or signal.

At that time, the substrate 1 is placed directly under the removed portion of the circuit pattern 7a or directly under the divided left and right ends of the circuit pattern 7a.
The ferroelectric material 13a and the conductor 13b accommodated in the holes 3a and 3b provided in the holes 3a and 3b connected in the same way as the capacitor 13 made of the ferroelectric material 13a and the conductor 13b connect the removed middle part of the circuit pattern 7a. It plays a role.

Further, a resistor 12 accommodated in a hole 3 provided in the substrate 1c between another circuit pattern 7a and an internal circuit pattern 7b immediately below it connects the circuit pattern 7& and the internal circuit pattern 7b immediately below it with the register 12. It has the same effect as if it were connected.

FIG. 17 and FIG. 18 show another preferred embodiment of the substrate which is the second electronic component substrate of the present invention.
The figure is a partially enlarged sectional view of the vicinity of the signal line of the board, and FIG. 18 is an explanatory diagram of the usage state of the board. The embodiment shown in the above figure will be described below.

ld is a ceramic substrate with a multilayer structure, which has a circuit pattern 7a made of a metallized layer or the like on which electronic components are mounted on its upper surface, and an internal circuit pattern 7b along its inside.

The circuit pattern 7a on the upper surface of the substrate 1d is cut in the middle,
The substrate 1 directly under the removed circuit pattern 71 portion is removed.
d, board! A vertically long bottomed hole 3 having a rectangular cross section is provided, reaching the upper surface of the internal circuit pattern 7b inside d.

A capacitor 13, in which a ferroelectric material 13b is integrally sandwiched between upper and lower flat conductors 13a, is inserted into the hole 3 provided in the substrate 1d, with a slight gap between the periphery of the capacitor 13 and the inner peripheral surface of the hole 3. It is housed three-dimensionally by opening and standing up.

In addition, the capacitor 13 is made by sealing the bottom surface of the conductor 13a at its lower end with conductive adhesive, low-temperature brazing material, etc., so that the capacitor 13 does not separate from the hole 3. It is fixed to the upper surface of the internal circuit pattern 7b.

The substrate 1d shown in FIG. 17 is constructed as described above.

Next, an example of its use will be explained.

As shown in FIG. 18, the conductor 13a at the upper end of the capacitor 13 accommodated in the vertical bottomed hole 3 provided in the substrate 1d directly below the removed portion of the circuit pattern 7λ and the circuit pattern 7a on the upper surface of the substrate 1d are separated. The left and right ends are connected via a metal member 16 in the form of a thin plate band.

Here, the conductor 13a and the metal member 16 and the ends of each circuit pattern 7a and the metal member 16 are brazed using a low-temperature brazing material, or bonded using a conductive paste or adhesive. etc., and connect.

Then, when an electronic component is mounted on the circuit pattern 7a on the upper surface of the board 1d and a power supply current or an electric signal is passed through the circuit pattern 7a, the current or signal flows through the circuit pattern 7a and the circuit pattern 7b, and the circuit pattern 7a Electronic components mounted on the device can be operated using the above-mentioned currents and signals.

At that time, the capacitor 1 provided in the hole 3 of the substrate 1d
A conductor 13b covering the upper end of the circuit pattern 7a on the upper surface of the substrate 1d is electrically connected via a metal member 16 between the removed part of the circuit pattern 7a, and a capacitor 13 provided in the hole 3 is connected to the circuit pattern 7a. It achieves the same effect as if the capacitor 13 were connected to the internal circuit pattern 7b immediately below it.

In each of the above-described embodiments, the electronic component base 1 such as the same package or board is provided with vertically long bottomed holes 3, 3a, and 3b that accommodate or have accommodated the circuit elements 2 such as resistors, capacitors, and inductors. Circuit pattern 7.7a
, 7b, the circuit elements 2 and the circuit patterns 7.7a, 7b and the stage 4 are provided or provided in a portion of the electronic component base 1 remote from the chain holes 3.3a, 3b, and the circuit elements 2, the circuit patterns 7.7a, 7b, and the stage 4 are housed in the chain holes 3.3a, 3b.
The electrodes and the like of the semiconductor elements mounted on the device may be connected to each other by long wires or the like.

Furthermore, the electronic component substrate 1 of the present invention can be used not only for the flat packages 1a and 1b of the above-mentioned embodiments, but also for various packages such as chip carriers and pubd arrays, and also for packages made of an insulator such as resin. Needless to say, it can also be used for substrates, etc.

[Effects of the Invention] As explained above, in the first base for electronic components of the present invention, resistors, capacitors, inductors, etc. By standing up circuit elements and accommodating them three-dimensionally, circuit elements such as resistors, capacitors, and inductors can be provided on an electronic component substrate without occupying a large area along the surface of the substrate. Can be done.

Furthermore, in the second substrate for electronic components of the present invention, circuit elements such as resistors, capacitors, and inductors are made to stand up in vertical bottomed holes provided in the substrate for electronic components such as packages and substrates, thereby creating a three-dimensional structure. Therefore, circuit elements such as resistors, capacitors, and inductors provided on the electronic component base do not occupy a large area along the base surface.

Therefore, according to the first and second electronic component substrates such as packages and substrates of the present invention, various circuit patterns are provided along the surface of the substrate, or resistors, capacitors, etc. provided on the same electronic component substrate, It is now possible to freely and densely prepare circuit elements such as inductors without being obstructed by them.
High integration of electronic component substrates such as packages and substrates can be easily achieved.

In addition, since the holes provided or provided in the substrate for electronic components such as packages and circuit boards are bottomed, the airtightness of the substrate for electronic components is not impaired, and the holes for electronic components such as semiconductor devices are Store parts in a highly airtight manner,
Can be installed.

Further, in the first electronic component substrate having a hole for accommodating a circuit element of the present invention, the type and size of the circuit element such as a resistor, capacitor, inductor, etc. to be accommodated in the hole of the substrate may be varied. As a result, 1. Circuit elements such as resistors, capacitors, and inductors having various resistance values and capacitance values can be freely and easily provided on electronic component substrates such as packages and substrates.

[Brief explanation of the drawing]

Fig. 1 is a partially omitted plan view of the package of the present invention, Fig. 2 is a partially enlarged cross-sectional view taken along line A-A of the package of Fig. 1, and Fig. 3 is an enlarged plan view of the package of Fig. 1 around the signal line. Figure 4 is a partially enlarged BB sectional view of the package in Figure 1, Figure 5 is an enlarged plan view of the package in Figure 1 around the power supply line, and Figures 6 and 7 are the figures in Figure 1. 8 is a partially enlarged plan view of the package of the present invention, FIG. 9 is a partially enlarged sectional view of the package of FIG. 8 around the signal line, and FIGS. 10 and 11. are a plan view and a cross-sectional view of the package in use in FIG. 8, respectively, FIG. 12 is a partial plan view of the substrate of the present invention, and FIG.
-X sectional view, FIG. 14 is a Y-Y sectional view of the substrate in FIG. 12, FIGS. 15 and 16 are explanatory diagrams of the usage state of the substrate in FIG. Enlarged plan view, No. 18
The figure is an explanatory diagram of the state in which the board of FIG. 17 is used. l...Substrate for electronic components, la, 1b...package, l
c, ld... board, 2... circuit element, 3.3a, 3
b...hole, 5...bottom plate, 6...underwear ceramic frame, 7,'I11...circuit pattern, 7b...internal circuit pattern, 8...upper layer ceramic frame, 9...signal line, IO・
・Power line, 12...Resistor, I3...Capacitor.

Claims (2)

[Claims] 1. A substrate for electronic components such as a package or a board that stores and mounts electronic components, in which the substrate is provided with a vertical bottomed hole for erecting and three-dimensionally accommodating circuit elements such as resistors, capacitors, and inductors. A substrate for electronic components characterized by: 2. In substrates for electronic components such as packages and circuit boards that house and mount electronic components, a vertically long bottomed hole is provided in the substrate, and circuit elements such as resistors, capacitors, and inductors are placed upright in the holes to create a three-dimensional structure. 1. A substrate for electronic components, characterized in that it accommodates