JPH01194447A - Hybrid integrated circuit device - Google Patents

Hybrid integrated circuit device

Info

Publication number
JPH01194447A
JPH01194447A JP2008788A JP2008788A JPH01194447A JP H01194447 A JPH01194447 A JP H01194447A JP 2008788 A JP2008788 A JP 2008788A JP 2008788 A JP2008788 A JP 2008788A JP H01194447 A JPH01194447 A JP H01194447A
Authority
JP
Japan
Prior art keywords
substrate
island
hole
circuit
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2008788A
Other languages
Japanese (ja)
Inventor
Kazuo Kato
和夫 加藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Priority to JP2008788A priority Critical patent/JPH01194447A/en
Publication of JPH01194447A publication Critical patent/JPH01194447A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19105Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/142Arrangements of planar printed circuit boards in the same plane, e.g. auxiliary printed circuit insert mounted in a main printed circuit

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE:To easily automate adherence of circuit elements from the adherence of a circuit substrate, wiring of fine metal wirings, sorting, inspecting, etc., by forming a through hole at an island, and engaging fixedly the substrate having a protrusion corresponding to the hole. CONSTITUTION:A through hole 9 is formed simultaneously when the pattern of a base ribbon is punched by pressing or formed by etching. Then, a circuit substrate 2 having a protrusion is engaged fixedly with the through hole 9 of an island 10. The substrate 2 employs that selected from a polyimide substrate, a glass polyimide substrate, an epoxy substrate, a porous ceramic epoxy resin substrate, etc. The substrate 2 is formed in advance with a passive element 4, pads or a conductor circuit, etc., by a copper foil etching, a thick film, a thin film forming method, etc. Thus, in order to secure the island 10 to the substrate 2, at least one of the periphery of the island 10 or the ground face of the substrate 2 in contact with the periphery is preferably coated with necessary adhesive 3 and pressed. Thus, facilities of steps of mounting circuit elements, wiring fine metal wirings, sorting, inspecting, etc., can be automated.

Description

【発明の詳細な説明】 (産業上の利用分Yf) 本発明は、金属製のベースリボンのアイランド部に、回
路素子が装着された回路基板が接着剤にて固定され、さ
らに樹脂によって封止されてなる混成集積回路装置に関
する。
DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Yf) The present invention is characterized in that a circuit board on which circuit elements are mounted is fixed to an island portion of a metal base ribbon with an adhesive, and then sealed with a resin. The present invention relates to a hybrid integrated circuit device.

(従来の技術) 従来の混成束I11回路装置は、第3図に示すように、
アルミナ(Ax20))からなるセラミック基板(10
1)にPj膜或いは厚膜回路(102)を形成し、接着
剤を用いて歯動素子(103)や受動素子(104)を
接着し、必要に応して金などの金属細線(1口5)を用
いて配線を行い、パッシベーション樹脂(106)を塗
布して回路素子を保護するようになっている。また、半
III(108)を用いて引出しソート(11)9)を
付け、ざらに樹脂(107)を用いてM+トする4I造
を採っている。
(Prior Art) A conventional hybrid bundle I11 circuit device, as shown in FIG.
Ceramic substrate (10
A Pj film or thick film circuit (102) is formed on 1), a toothed element (103) and a passive element (104) are bonded using an adhesive, and if necessary, a thin metal wire such as gold (1 piece) is attached. 5) is used to perform wiring, and a passivation resin (106) is applied to protect the circuit elements. In addition, a 4I structure is used in which drawer sorting (11) 9) is attached using semi-III (108), and M+to is made using rough resin (107).

しかしながら、このような構造は、セラミック基板(l
ot)の寸法精度が低く、樹脂(+07)の外形の寸法
精度も低いために1組立・選別・検査等の自動化は容易
てはなく、仮に自動化を行った場合でも、設備か複雑に
なり、稼動率の向りが期待できないばかりでなく、過大
な設備投資か必要になり負担か大きいという欠点を有し
ている。さらに、セラミツクツ、(板(1月)と外装の
樹脂(107)との熱膨張係数の差か1オーダー以J二
あるため、引出しり−ト(+09)をプリント配線板に
゛4’−ETI接合するときの熱衝撃により、外装の樹
脂(107)にクラックか生したり、能動素子(10:
l)や金属細線(IQs)に多大の負荷かかかるなどの
問題かあった。
However, such a structure is difficult to achieve on a ceramic substrate (l
Since the dimensional accuracy of ot) is low and the dimensional accuracy of the outer shape of resin (+07) is also low, it is not easy to automate the assembly, sorting, inspection, etc. Even if automation were done, the equipment would be complicated, Not only is the operating rate unpredictable, but it also has the disadvantage of requiring excessive capital investment, which is a heavy burden. Furthermore, since there is a difference in the coefficient of thermal expansion between the ceramic board (January) and the exterior resin (107), which is more than one order of magnitude, the drawer plate (+09) is attached to the printed wiring board. Thermal shock during bonding may cause cracks in the exterior resin (107) or cause damage to the active element (10:
There were problems such as a large load being placed on the metal wires (l) and thin metal wires (IQs).

これらの問題を解決する手段として特開昭60−194
553壮公報に開示されている技術かある。この技術は
、第4図及び第5図に示すように、金属製のベースリボ
ンのアイランド部(110)に回路素子(+15)を装
着した回路基板(112)を接着剤(118)で接着し
、樹脂によって封止した混成集積回路装置である。
As a means to solve these problems, JP-A-60-194
There is a technique disclosed in the 553 Soho Gazette. As shown in FIGS. 4 and 5, this technology uses an adhesive (118) to bond a circuit board (112) on which a circuit element (+15) is attached to an island portion (110) of a metal base ribbon. , a hybrid integrated circuit device sealed with resin.

(発明か解決しようとする課’Jf) しかしながら、このような構造においては、アイランド
部(+10)と回路基板(112)の位置合わせか難し
く、作業に時間かかかり自動化が進めにくい。そのため
、稼動率の実質的な向上かほとんど期待できないという
151題かあった。
(Section 'Jf to be solved by the invention) However, in such a structure, it is difficult to align the island part (+10) and the circuit board (112), and the work is time-consuming, making it difficult to proceed with automation. As a result, there were 151 issues that could hardly be expected to substantially improve utilization rates.

すなわち、未発Illか解決しようとする問題点は、従
来技術における、アイランド部に回路基板を精度よく接
着固定するのに要す時間の長さにあり、そして本発明の
目的は、このような従来技術の問題点を解決し、回路基
板の接着から回路素子の接着・金属細線の配線・選別・
検査等のr1動化な容易にする生産性の高い混成集積回
路装置の提供にある。
In other words, the problem to be solved by the prior art is the length of time required to accurately adhesively fix the circuit board to the island part, and the object of the present invention is to solve this problem. Solving the problems of conventional technology, it can be used for everything from bonding circuit boards to bonding circuit elements, wiring and sorting thin metal wires, and
The object of the present invention is to provide a highly productive hybrid integrated circuit device that facilitates r1 optimization such as inspection.

(課題な解決するための手段及び作用)以東のような問
題点を解決するために本発明の採った手段は、 「金属製のベースリボンのアイランド部に1回路素子の
装着された回路基板か接着剤にて固定され、さらに樹脂
によって封1トされてなる混成集積回路装置において、 前記アイランド部に4通孔を形成し、この〔T通孔に対
応する凸部を備えた回路基板な嵌合固定することを特徴
とする混成集積回路装置Jである。
(Means and effects for solving the problems) The means taken by the present invention to solve the above-mentioned problems are as follows: ``A circuit board in which one circuit element is mounted on the island part of a metal base ribbon. In a hybrid integrated circuit device which is fixed with a T-shaped adhesive and further sealed with a resin, four through holes are formed in the island portion, and a circuit board having a convex portion corresponding to the T-through hole is formed. This is a hybrid integrated circuit device J characterized by fitting and fixing.

未発[J]によれば、金属製ベースリボンに回路基板を
接着固定するときに、該金属製ベースリボンのアイラン
ド部に設けた貫通孔に、この貫通孔に対応する凸部を備
えた回路基板を嵌合する方法を採っているので、金属製
ベースリボンに対する回路基板の位置精度が高く1位置
ずれも生し難いものになワている。
According to Unissued [J], when a circuit board is adhesively fixed to a metal base ribbon, a through hole provided in an island portion of the metal base ribbon is provided with a convex portion corresponding to the through hole. Since the method of fitting the circuit boards is adopted, the positional accuracy of the circuit board with respect to the metal base ribbon is high, and even one positional deviation is unlikely to occur.

(実施例) 以下、図面に示す実施例に従って本発明の詳細な説明す
る。
(Example) Hereinafter, the present invention will be described in detail according to an example shown in the drawings.

第1図は本発明に係る混成集積回路装置の内に固定され
る金属製ベースリボンのアイランド部(lO)に形成し
た貫通孔(9)の一実施例を示すモ面図である。ベース
リボンの材料としては、銅合金、鉄・ニッケル(42ア
ロイ)、純鉄、リン青銅、ステンレスなどが好適に使用
できる。この貫通孔(9)は、ベースリボンのパターン
をブレス打抜加]二或いはエツチング加工で形成すると
きに同時に形成てきる。また、貫通孔(9)の大きさは
、アイランドi’jR(10)の周囲の巾か少なくとも
0.5mmあれば強度的には支障かないため、この範囲
内で自由に選択することかてきる。
FIG. 1 is a top view showing one embodiment of a through hole (9) formed in an island portion (10) of a metal base ribbon to be fixed in a hybrid integrated circuit device according to the present invention. Suitable materials for the base ribbon include copper alloy, iron/nickel (42 alloy), pure iron, phosphor bronze, and stainless steel. This through hole (9) is formed at the same time as the pattern of the base ribbon is formed by press punching or etching. Furthermore, the size of the through hole (9) can be freely selected within this range, as long as the width around the island i'jR (10) is at least 0.5 mm, which will not affect the strength. .

次いで、凸部を備えた回路基板(2)をアイランド部(
10)の4通孔(9)に嵌合固定する。回路基板(2)
には、ポリイミド基板、ガラスポリイミド基板、エポキ
シ基板、ガラスエポキシ基板、ガラスビスマレイミドト
リアジン基板、アルミ基板、多孔質セラミックエポキシ
樹脂基板の中から選ばれる基板を用いることがてきる。
Next, the circuit board (2) with the convex portion is placed on the island portion (
10) and securely fit into the four through holes (9). Circuit board (2)
For this purpose, a substrate selected from a polyimide substrate, a glass polyimide substrate, an epoxy substrate, a glass epoxy substrate, a glass bismaleimide triazine substrate, an aluminum substrate, and a porous ceramic epoxy resin substrate can be used.

回路基板(2)は、予め銅箔エツチング、厚膜、薄膜形
成方法等を用いて受動素子(4)、バット或いは導体回
路等を形成しておく、この回路基板(2)は、導体回路
か基板の片面にしか形成されていない片面板、スルーホ
ールを有する両面板、さらに内層も有する多層板のいず
れにも好適に用いることかできる。回路基板(2)に凸
部を形成するには、ルータ−による研削加工か適用でき
る。また、回路基板(2)をアイランド部(10)に固
定するには、アイランド部(10)周辺か、或いはそこ
に接触する回路基板(2)の研削した面の少なくともい
ずれか一方に必要なたけ接着剤(3)を塗布して圧着す
るのか好適である。
The circuit board (2) has passive elements (4), batts, conductor circuits, etc. formed in advance using copper foil etching, thick film, thin film forming methods, etc. It can be suitably used for a single-sided board formed only on one side of the substrate, a double-sided board with through holes, and a multilayer board that also has an inner layer. To form the convex portion on the circuit board (2), grinding using a router can be applied. In addition, in order to fix the circuit board (2) to the island part (10), a necessary amount of heat is applied to at least one of the area around the island part (10) or the ground surface of the circuit board (2) that contacts there. It is preferable to apply an adhesive (3) and press it.

次いで、回路を形成するのに必要な能動素子(5)を接
着剤(3)を用いて接着するか、或いはフリップチップ
実装を行う。さらに必要に応じ、金属細線(1)を用い
て能動素子(5)から回路基板(2)上のパッドから金
属製ベースリボン(7)に配線する。
Next, active elements (5) necessary to form a circuit are bonded using adhesive (3) or flip-chip mounting is performed. Furthermore, if necessary, wiring is made from the active element (5) to the pad on the circuit board (2) using the thin metal wire (1) to the metal base ribbon (7).

最後にトランスファーモールド方式で樹脂(8)封止を
する。トランスファーモールド用樹脂(8)には、熱可
塑性樹脂、熱硬化性樹脂のいずれも用いることができる
か1回路基板(2)との熱膨張係数のマツチング性の点
てエポキシ樹脂か特に好適に使用てきる。
Finally, it is sealed with resin (8) using a transfer molding method. Can either a thermoplastic resin or a thermosetting resin be used for the transfer molding resin (8)?1 Epoxy resin is particularly preferably used in terms of thermal expansion coefficient matching with the circuit board (2). I'll come.

(発明の効果) 以1−のように本発明によれば、金属製ベースリボンに
対する回路基板の位置精度か高く、位置ずれも生じ難い
ものになっている。この位置合せ操作か極めて簡単にな
ることから1回路素子の装着をはじめ、金属細線による
配線・選別・検査等の1程を含めた設備の自動化か容易
になり、混成集積回路装置の、9賀か安定し、生産性か
高くなる。
(Effects of the Invention) As described in 1- above, according to the present invention, the positional accuracy of the circuit board with respect to the metal base ribbon is high, and positional deviation is less likely to occur. Since this positioning operation is extremely simple, it becomes easy to automate equipment including the installation of a single circuit element, wiring with thin metal wires, screening, and inspection, etc. It is stable and productivity is high.

従って、本発明か産業に寄与するところは大きい。Therefore, the present invention greatly contributes to industry.

【図面の簡単な説明】[Brief explanation of the drawing]

it図は本発明の混成集積回路装置の中にあって金属製
ベースリボンのアイランド部に形成する貫通孔の一実施
例を示す平面図、第2図は第1図の金属製ベースリボン
を用いて作製される混成集積回路装置を示す部分断面図
、第3図は従来の混成集積回路装置の一例を示す断面図
、第4図は従来の混成集積回路装置の他の例を示す平面
図、第5図は第4図のx−X線に沿ってみた部分断面図
である。 符号の説明 l・・・金属細線、2・・・回路基板、3・・・接着剤
、4・・・受動素子、5・・・能動素子、6・・・受動
素子、7・・・金属製ベースリボン、8・・・樹脂、9
・・・貫通孔、lO・・・アイランド部、101−・・
セラミック基板、+02・・・厚膜・薄膜回路、I[1
3・・・fお動素子、+04・・・受動素子、+05・
・・金属細線、tOa −・パッシベーション樹脂、1
07−・・樹脂、108・・・半IH,109・・・引
出しリート、110・・・アイランド部、11!・・・
金属細線、+12・・・回路基板、 11:l−・・配
線回路、114−・・受動素1’−,+15・・・能動
素子、+16・・・パット、117・・・受動素子、t
ta−・・接着剤、119・・・樹脂。 特 許 出 願 人  イビデン株式会社、′27 第1図 第2図 (102〕
The IT diagram is a plan view showing an embodiment of the through hole formed in the island portion of the metal base ribbon in the hybrid integrated circuit device of the present invention, and FIG. 3 is a sectional view showing an example of a conventional hybrid integrated circuit device; FIG. 4 is a plan view showing another example of a conventional hybrid integrated circuit device; FIG. 5 is a partial cross-sectional view taken along line XX in FIG. 4. Explanation of symbols 1...Metal thin wire, 2...Circuit board, 3...Adhesive, 4...Passive element, 5...Active element, 6...Passive element, 7...Metal base ribbon, 8...resin, 9
...Through hole, lO...Island part, 101-...
Ceramic substrate, +02...Thick film/thin film circuit, I[1
3...f dynamic element, +04...passive element, +05.
・・Metal thin wire, tOa −・Passivation resin, 1
07-...Resin, 108...Semi-IH, 109...Drawer leet, 110...Island part, 11! ...
Metal thin wire, +12...Circuit board, 11:l-...Wiring circuit, 114-...Passive element 1'-, +15...Active element, +16...Put, 117...Passive element, t
ta-...adhesive, 119...resin. Patent applicant: IBIDEN Co., Ltd., '27 Figure 1 Figure 2 (102)

Claims (1)

【特許請求の範囲】 金属製のベースリボンのアイランド部に、回路素子の装
着された回路基板が接着剤にて固定され、さらに樹脂に
よって封止されてなる混成集積回路装置において、 前記アイランド部に貫通孔を形成し、この貫通孔に対応
する凸部を備えた回路基板を嵌合固定することを特徴と
する混成集積回路装置。
[Scope of Claims] A hybrid integrated circuit device in which a circuit board on which circuit elements are mounted is fixed with an adhesive to an island portion of a metal base ribbon, and further sealed with a resin, wherein the island portion is sealed with a resin. A hybrid integrated circuit device characterized in that a through hole is formed and a circuit board having a convex portion corresponding to the through hole is fitted and fixed.
JP2008788A 1988-01-29 1988-01-29 Hybrid integrated circuit device Pending JPH01194447A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008788A JPH01194447A (en) 1988-01-29 1988-01-29 Hybrid integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008788A JPH01194447A (en) 1988-01-29 1988-01-29 Hybrid integrated circuit device

Publications (1)

Publication Number Publication Date
JPH01194447A true JPH01194447A (en) 1989-08-04

Family

ID=12017325

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008788A Pending JPH01194447A (en) 1988-01-29 1988-01-29 Hybrid integrated circuit device

Country Status (1)

Country Link
JP (1) JPH01194447A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1143514A3 (en) * 2000-03-07 2004-03-31 Mitsubishi Denki Kabushiki Kaisha Resin-sealed power semiconductor device including substrate with all electronic components for control circuit mounted thereon
JP2017103394A (en) * 2015-12-03 2017-06-08 ラピスセミコンダクタ株式会社 Semiconductor device and semiconductor device manufacturing method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1143514A3 (en) * 2000-03-07 2004-03-31 Mitsubishi Denki Kabushiki Kaisha Resin-sealed power semiconductor device including substrate with all electronic components for control circuit mounted thereon
JP2017103394A (en) * 2015-12-03 2017-06-08 ラピスセミコンダクタ株式会社 Semiconductor device and semiconductor device manufacturing method

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