JPH0118587B2 - - Google Patents

Info

Publication number
JPH0118587B2
JPH0118587B2 JP56179653A JP17965381A JPH0118587B2 JP H0118587 B2 JPH0118587 B2 JP H0118587B2 JP 56179653 A JP56179653 A JP 56179653A JP 17965381 A JP17965381 A JP 17965381A JP H0118587 B2 JPH0118587 B2 JP H0118587B2
Authority
JP
Japan
Prior art keywords
power supply
potential level
power source
control element
internal circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56179653A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5882560A (ja
Inventor
Teruji Fujii
Mutsuo Kataoka
Takashi Hamano
Atsushi Iwata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Original Assignee
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp, Oki Electric Industry Co Ltd filed Critical Nippon Telegraph and Telephone Corp
Priority to JP56179653A priority Critical patent/JPS5882560A/ja
Publication of JPS5882560A publication Critical patent/JPS5882560A/ja
Publication of JPH0118587B2 publication Critical patent/JPH0118587B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H10D84/854—Complementary IGFETs, e.g. CMOS comprising arrangements for preventing bipolar actions between the different IGFET regions, e.g. arrangements for latchup prevention

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP56179653A 1981-11-11 1981-11-11 Ｃｍｏｓ集積回路 Granted JPS5882560A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56179653A JPS5882560A (ja) 1981-11-11 1981-11-11 Ｃｍｏｓ集積回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56179653A JPS5882560A (ja) 1981-11-11 1981-11-11 Ｃｍｏｓ集積回路

Publications (2)

Publication Number Publication Date
JPS5882560A JPS5882560A (ja) 1983-05-18
JPH0118587B2 true JPH0118587B2 (enrdf_load_stackoverflow) 1989-04-06

Family

ID=16069531

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56179653A Granted JPS5882560A (ja) 1981-11-11 1981-11-11 Ｃｍｏｓ集積回路

Country Status (1)

Country Link
JP (1) JPS5882560A (enrdf_load_stackoverflow)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59153331A (ja) * 1983-02-21 1984-09-01 Toshiba Corp 半導体装置
US4571505A (en) * 1983-11-16 1986-02-18 Inmos Corporation Method and apparatus of reducing latch-up susceptibility in CMOS integrated circuits
JPH01220470A (ja) * 1988-02-29 1989-09-04 Fujitsu Ltd 相補型半導体集積回路装置
US8685800B2 (en) * 2012-07-27 2014-04-01 Freescale Semiconductor, Inc. Single event latch-up prevention techniques for a semiconductor device

Also Published As

Publication number Publication date
JPS5882560A (ja) 1983-05-18

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