JPH01179645U - - Google Patents
Info
- Publication number
- JPH01179645U JPH01179645U JP7537088U JP7537088U JPH01179645U JP H01179645 U JPH01179645 U JP H01179645U JP 7537088 U JP7537088 U JP 7537088U JP 7537088 U JP7537088 U JP 7537088U JP H01179645 U JPH01179645 U JP H01179645U
- Authority
- JP
- Japan
- Prior art keywords
- transfer rate
- serial
- clock
- detection unit
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 4
- 238000006243 chemical reaction Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Information Transfer Systems (AREA)
- Communication Control (AREA)
Description
第１図は、本考案にかかるシリアルデータ転送
速度における転送速度自動設定装置構成図、第２
図は、従来のシリアルデータ転送速度設定装置構
成図、第３図は、本考案にかかる転送速度検出部
の一例を示すブロツク図である。
１……転送速度検出部、２……クロツク選択部
、３……シリアル／パラレルデータ変換部、４…
…コマンドレジスタ部、１１……分周部、１２…
…シフト部、１３……ステータレジスタ部。
Fig. 1 is a configuration diagram of a transfer rate automatic setting device for serial data transfer rate according to the present invention;
1 is a block diagram showing the configuration of a conventional serial data transfer rate setting device, and FIG. 3 is a block diagram showing an example of a transfer rate detecting section according to the present invention. 1...Transfer rate detection section, 2...Clock selection section, 3...Serial/parallel data conversion section, 4...
...Command register section, 11... Frequency division section, 12...
...Shift section, 13...Stator register section.
Claims (1)
を検出する転送速度検出部と、シリアルデータを
パラレルデータに変換する機能を持つたシリアル
／パラレルデータ変換部と、前期転送速度検出部
で検出される結果を基にし主クロツクを受けその
主クロツクを内部カウンタで分周した各分周クロ
ツクの何れかをシリアル／パラレルデータ変換部
に供給する為のシフトクロツクとして選択するク
ロツク選択部よりなるシリアルデータ転送におけ
る転送速度自動設定装置。 A transfer rate detection unit that receives serial data and detects the data transfer rate, a serial/parallel data conversion unit that has the function of converting serial data to parallel data, and a transfer rate detection unit that converts the results detected by the former transfer rate detection unit. The transfer rate in serial data transfer consists of a clock selection section that receives the main clock based on the clock and divides the frequency of the main clock by an internal counter and selects one of the divided clocks as the shift clock to supply to the serial/parallel data conversion section. Automatic configuration device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7537088U JPH01179645U (en) | 1988-06-07 | 1988-06-07 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7537088U JPH01179645U (en) | 1988-06-07 | 1988-06-07 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01179645U true JPH01179645U (en) | 1989-12-22 |
Family
ID=31300436
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7537088U Pending JPH01179645U (en) | 1988-06-07 | 1988-06-07 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01179645U (en) |
-
1988
- 1988-06-07 JP JP7537088U patent/JPH01179645U/ja active Pending
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