JPH01168093A - Structure of circuit board - Google Patents

Structure of circuit board

Info

Publication number
JPH01168093A
JPH01168093A JP32767787A JP32767787A JPH01168093A JP H01168093 A JPH01168093 A JP H01168093A JP 32767787 A JP32767787 A JP 32767787A JP 32767787 A JP32767787 A JP 32767787A JP H01168093 A JPH01168093 A JP H01168093A
Authority
JP
Japan
Prior art keywords
signal
hole
circuit board
pattern
ground
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP32767787A
Other languages
Japanese (ja)
Inventor
Kenichiro Tsubone
坪根 健一郎
Hidenori Tanizawa
谷沢 秀徳
Yuko Suzuki
優子 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP32767787A priority Critical patent/JPH01168093A/en
Publication of JPH01168093A publication Critical patent/JPH01168093A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0237High frequency adaptations
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections

Abstract

PURPOSE:To eliminate impedance mismatching, by forming a grounding layer at the surrounding part of a signal through hole, and providing a coaxial structure. CONSTITUTION:A signal through hole 2 is formed in a circuit board 1 comprising ceramics and the like. A position, whose center is the signal through hole 2, is obtained by the diameter of the signal through hole 2 and the dielectric constant of the material of the circuit board 1. A horseshoe type hole for forming a grounding layer is provided at said position at the surrounding part of the signal through hole 2. A conductor layer is formed on the circuit board 1, on which the signal through hole 2 and the horseshoe type hole are formed by a thick film method, a plating method and the like. A horseshoe type grounding layer 5 is formed in the circuit board 1. Signal patterns 3 such as strip lines, which are connected to the signal through holes 2, are formed on both surfaces of the circuit board 1. Grounding patterns 4 are formed on the surrounding parts of the signal pattern 3 and the signal through hole 2 and the rear surface of the circuit board 1. The horseshoe type grounding layer 5 is connected to the grounding pattern 4. The signal through hole 2 has a coaxial structure.

Description

【発明の詳細な説明】 〔概 要〕 回路基板の厚さ方向に導通ずる信号用スルーホールを囲
む環状アースを形成して同軸構造とした回路基板の構造
に関し、 信号用スルーホールの周辺にアース層を形成してインピ
ーダンス整合が行なえる同軸構造となし、インピーダン
スのミスマツチングによる信号の反射を防止することを
目的とし、 回路基板の厚さ方向に導通する信号線には、該信号線を
囲む環状アースが回路基板の内部に形成されてなる構成
とする。
[Detailed Description of the Invention] [Summary] Regarding the structure of a circuit board that has a coaxial structure by forming an annular ground surrounding a signal through hole that conducts in the thickness direction of the circuit board, the ground is connected around the signal through hole. The purpose is to form a coaxial structure in which impedance matching can be performed by forming layers, and to prevent signal reflection due to impedance mismatching. The configuration is such that the ground is formed inside the circuit board.

〔産業上の利用分野〕[Industrial application field]

本発明は、回路基板の厚さ方向に導通する信号用スルー
ホールを囲む環状アースを形成した回路基板の構造に関
する。
The present invention relates to the structure of a circuit board in which an annular ground is formed surrounding a signal through hole that conducts in the thickness direction of the circuit board.

近年、通信機器の長足の進歩と、使用される範囲の拡大
に伴ない、これら通信機器に用いられる周波数も高くな
り超高周波帯に及ぶ傾向にある。
In recent years, with the rapid progress of communication devices and the expansion of the range of their use, the frequencies used in these communication devices have also tended to become higher and extend into ultra-high frequency bands.

ところで、回路基板に形成した高周波信号伝送用のスル
ーホールが回路基板の厚み間でインピーダンス整合を行
なう構造となっていないので、このスルーホール部にお
いてインピーダンスのミスマツチングによる信号の反射
が発生する恐れがある。
By the way, the through-holes formed on the circuit board for transmitting high-frequency signals are not structured to perform impedance matching across the thickness of the circuit board, so there is a risk of signal reflection due to impedance mismatching in the through-holes. .

〔従来の技術〕[Conventional technology]

第6図及び第7図は、従来の回路基板の構造を説明する
図で、第6図は回路基板の要部斜視図。
6 and 7 are diagrams for explaining the structure of a conventional circuit board, and FIG. 6 is a perspective view of the main parts of the circuit board.

第7図は第6図のA−A’断面図である。FIG. 7 is a sectional view taken along line A-A' in FIG.

図において、弗素樹脂、セラミック等からなる回路基板
1の両面にはアースパターン4.4と、信号用パターン
3.3とが形成され、両面の信号パターン3,3は信号
用スルーホール2の内面の導体により接続されている。
In the figure, a ground pattern 4.4 and a signal pattern 3.3 are formed on both sides of a circuit board 1 made of fluororesin, ceramic, etc., and the signal patterns 3, 3 on both sides are formed on the inner surface of a signal through hole 2. connected by conductors.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上記従来の回路基板の構造にあっては、信号用パターン
はストリップライン(又はトリプレートライン)が形成
されて高周波に適した構造であるが、信号用スルーホー
ルが回路基板の厚み間で高周波に適した構造となってい
ないので、この信号用スルーホール部において、インピ
ーダンスのミスマツチングによる信号の反射が生じ、高
周波特性に悪影響を及ぼすという問題点があった。
In the structure of the conventional circuit board mentioned above, the signal pattern has a strip line (or triplate line) and is suitable for high frequencies, but the signal through holes are formed between the thickness of the circuit board and are suitable for high frequencies. Since this structure is not suitable, there is a problem in that signal reflection occurs due to impedance mismatching in this signal through-hole section, which adversely affects high frequency characteristics.

〔問題点を解決するための手段〕[Means for solving problems]

本考案は、上記の問題点を解決して信号用スルーホール
の周辺にアース層を形成して同軸構造とし、インピーダ
ンスのミスマツチングを解消した回路基板の構造を提供
するものである。
The present invention solves the above problems and provides a circuit board structure that eliminates impedance mismatching by forming a ground layer around the signal through hole to create a coaxial structure.

すなわち、回路基板の厚さ方向に導通ずる信号線には、
該信号線を囲む環状アースを回路基板の内部に形成した
ことによって解決される。
In other words, the signal line that conducts in the thickness direction of the circuit board has
This problem is solved by forming an annular ground inside the circuit board surrounding the signal line.

〔作 用〕[For production]

このようにした回路基板の構造は、回路基板の信号用ス
ルーホールの回路基板の厚み間を同軸構造としたことに
より、信号用スルーホール部におけるインピーダンスの
ミスマツチングが解消できる。
The structure of the circuit board as described above makes it possible to eliminate impedance mismatching in the signal through-hole portion by making the signal through-hole of the circuit board coaxial across the thickness of the circuit board.

〔実施例〕〔Example〕

第1図及び第2図は、本発明の一実施例を説明する図で
、第1図は回路基板あ要部斜視図、第2図は第1図のB
−B’断面図で、第6図と同等の部分については同一符
号を付している。
1 and 2 are diagrams for explaining one embodiment of the present invention. FIG. 1 is a perspective view of the main part of the circuit board, and FIG.
In the -B' sectional view, the same parts as in FIG. 6 are designated by the same reference numerals.

図において、セラミック等からなる回路基板1に形成し
た信号用スルーホール2の周辺に、該信号用スルーホー
ル2の直径及び回路基板1の材料の誘電率から求められ
、第1図に示す如(信号用スルーホール2を中心とする
位置に、アース層を形成するための馬蹄形孔をグリーン
シート状態で設け、該信号用スルーホール2及び馬蹄形
孔を形成した回路基板1に厚膜法やメツキ法等により導
体層を形成して馬蹄形アース層5が形成された回路基板
lの両面に、信号用スルーホール2に接続されるストリ
ップライン等の信号パターン3を形成し、該信号パター
ン3及び信号用スルーホール2の周辺並びに回路基板1
の裏面にアースパターン4を形成し、前記馬蹄形アース
層5がアースパターン4に接続され、信号用スルーホー
ル2が同軸構造となる。
In the figure, the area around a signal through hole 2 formed in a circuit board 1 made of ceramic or the like is determined from the diameter of the signal through hole 2 and the dielectric constant of the material of the circuit board 1, as shown in FIG. A horseshoe-shaped hole for forming a ground layer is provided in a green sheet at a position centered on the signal through-hole 2, and a thick film method or plating method is applied to the signal through-hole 2 and the circuit board 1 on which the horseshoe-shaped hole is formed. A signal pattern 3 such as a strip line connected to the signal through-hole 2 is formed on both sides of the circuit board l on which a conductive layer is formed and a horseshoe-shaped ground layer 5 is formed. Around through hole 2 and circuit board 1
A ground pattern 4 is formed on the back surface of the ground pattern 4, the horseshoe-shaped ground layer 5 is connected to the ground pattern 4, and the signal through hole 2 has a coaxial structure.

第3図は、本発明の他の実施例を説明する要部斜視図で
、第1図と同等の部分については同一符号を付している
FIG. 3 is a perspective view of essential parts for explaining another embodiment of the present invention, in which the same parts as in FIG. 1 are given the same reference numerals.

セラミック等からなる回路基板1に形成した信号用スル
ーホール2の周辺に、該信号用スルーホール2の直径及
び回路基板1の材料の誘電率から求められ、図に示す如
く信号用スルーホール2を中心とする位置に、アース層
を形成するための複数の孔をグリーンシート状態で設け
、該信号用スルーホール2及び馬蹄形孔を形成した回路
基板1に厚膜法やメツキ法等により導体層を形成して馬
蹄形配列アース層6が形成された回路基板1の表面に、
信号用スルーホール2に接続されるストリップライン等
の信号パターン3を形成し、該信号パターン3及び信号
用スルーホール2の周辺並びに回路基板1の裏面にアー
スパターン4を形成し、前記馬蹄形配列アース層5がア
ースパターン4に接続され、信号用スルーホール2が同
軸構造となる。
A signal through hole 2 is formed around a signal through hole 2 formed in a circuit board 1 made of ceramic or the like, as determined from the diameter of the signal through hole 2 and the dielectric constant of the material of the circuit board 1, as shown in the figure. A plurality of holes for forming a ground layer are provided in the form of a green sheet at the center position, and a conductive layer is formed by a thick film method, plating method, etc. on the circuit board 1 on which the signal through hole 2 and the horseshoe-shaped hole are formed. On the surface of the circuit board 1 on which the horseshoe-shaped ground layer 6 is formed,
A signal pattern 3 such as a strip line connected to the signal through hole 2 is formed, a ground pattern 4 is formed around the signal pattern 3 and the signal through hole 2, and on the back side of the circuit board 1, and the horseshoe-shaped arrangement ground The layer 5 is connected to the ground pattern 4, and the signal through hole 2 has a coaxial structure.

第4図及び第5図は、本発明の他の実施例を説明する図
で、第4図は多層基板の要部斜視図、第5図は第4図の
c−c’断面図で、第1図と同等の部分については同一
符号を付している。
4 and 5 are diagrams for explaining other embodiments of the present invention, in which FIG. 4 is a perspective view of essential parts of a multilayer board, and FIG. 5 is a sectional view taken along line c-c' in FIG. Parts equivalent to those in FIG. 1 are given the same reference numerals.

第4図は、グリーンシートを複数枚の積層して多層基板
7の信号用バイアホール2′の周辺に、第1図で説明し
たと同じ位置に第5図に示す如く複数層(図面では3N
を示す)にグリーンシート状態で複数の孔を円状に配列
して設け、該信号用バイアホール2′及び該信号用バイ
アホール2′の周辺に形成した複数の孔を設けた回路基
板7に厚膜法やメツキ法により導体層を形成すれば、信
号用スルーホール2′の周辺に円状アース層8が形成さ
れる。この多層基板7の表面に、信号用スルーホール2
に接続されるストリップライン等の信号パターン3を形
成し、該信号パターン3及び信号用バイアホール2′の
周辺並びに多層基板7の裏面にアースパターン4を形成
し、前記円状アースN8がアースパターン4に接続され
、信号用バイアホール2′が同軸構造となる。
FIG. 4 shows that a plurality of green sheets are laminated and placed around the signal via hole 2' of the multilayer board 7, as shown in FIG.
A circuit board 7 is provided with a plurality of holes arranged in a circle in a green sheet state, and a plurality of holes are formed around the signal via hole 2' and the signal via hole 2'. If the conductor layer is formed by a thick film method or a plating method, a circular ground layer 8 will be formed around the signal through hole 2'. A signal through hole 2 is provided on the surface of this multilayer board 7.
A signal pattern 3 such as a strip line connected to the signal pattern 3 is formed, and a ground pattern 4 is formed around the signal pattern 3 and the signal via hole 2' and on the back side of the multilayer board 7, and the circular ground N8 is connected to the ground pattern. 4, and the signal via hole 2' has a coaxial structure.

このようにすることによって、信号用スルーホール2並
びに信号用バイアホール2′は同軸構造となり、信号用
スルーホール2並びに信号用バイアホール2′部におけ
るインピーダンスのミスマツチングが解消できる。
By doing so, the signal through hole 2 and the signal via hole 2' have a coaxial structure, and impedance mismatching in the signal through hole 2 and the signal via hole 2' can be eliminated.

本発明のアース導体は馬蹄形に限らず基板内部で円環状
に連続するものを含んで環状アースと称する。
The ground conductor of the present invention is not limited to a horseshoe shape, but includes a ring-shaped ground conductor that is continuous inside the board and is referred to as a ring-shaped ground conductor.

〔発明の効果〕〔Effect of the invention〕

以上の説明から明らかなように、本発明によれば信号用
スルーホール部をインピーダンス整合が行なえる同軸構
造となるので、インピーダンスのミスマツチングが解消
できるので、信号の反射が防止でき高周波特性の向上に
極めて有効である。
As is clear from the above description, according to the present invention, the signal through-hole part has a coaxial structure that allows impedance matching, which eliminates impedance mismatching, prevents signal reflection, and improves high frequency characteristics. Extremely effective.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図及び第2図は、本発明の一実施例を説明する図で
、第1図は回路基板の要部斜視図、第2図は第1図のB
−B’断面図、 第3図は、本発明の他の実施例を説明する要部斜視図、 第4図及び第5図は、本発明の他の実施例を説明する図
で、第4図は回路基板の要部斜視図、第5図は第4図の
c−c’断面図、 第6図及び第7図は、従来の回路基板の構造を説明する
図で、第6図は回路基板の要部斜視図。 第7図は第6図のA−A’断面図である。 図において、1は回路基板、2は信号用スルーホール、
2′は信号用バイアホール、3は信号用パターン、4は
アースパターン、5は馬蹄形アース層、6は馬蹄形配列
アース層、7は多層基板、8は円状アース層をそれぞれ
示す。 第1図     丁1図tr+B=8’R面図第2図 、l)〒5eJ(、イ1=ニー、0nlEjltrfJ
if=f’f f! l!]第3図
1 and 2 are diagrams for explaining one embodiment of the present invention, in which FIG. 1 is a perspective view of the main parts of a circuit board, and FIG. 2 is a B of FIG. 1.
-B' sectional view; Figure 3 is a perspective view of main parts for explaining another embodiment of the present invention; Figures 4 and 5 are diagrams for explaining other embodiments of the present invention; The figure is a perspective view of the main parts of the circuit board, FIG. 5 is a sectional view taken along line c-c' in FIG. 4, FIGS. 6 and 7 are diagrams for explaining the structure of a conventional circuit board, and FIG. 2 is a perspective view of essential parts of a circuit board. FIG. 7 is a sectional view taken along line AA' in FIG. In the figure, 1 is a circuit board, 2 is a signal through hole,
2' is a signal via hole, 3 is a signal pattern, 4 is a ground pattern, 5 is a horseshoe-shaped ground layer, 6 is a horseshoe-shaped arranged ground layer, 7 is a multilayer substrate, and 8 is a circular ground layer. Figure 1 Figure 1 tr+B=8'R view Figure 2, l)〒5eJ(,I1=nee,0nlEjltrfJ
if=f'f f! l! ]Figure 3

Claims (1)

【特許請求の範囲】[Claims]  回路基板(1)の厚さ方向に導通する信号線には、該
信号線を囲む環状アースが回路基板(1)の内部に形成
されてなることを特徴とする回路基板の構造。
A circuit board structure characterized in that a signal line conductive in the thickness direction of the circuit board (1) has an annular ground surrounding the signal line formed inside the circuit board (1).
JP32767787A 1987-12-23 1987-12-23 Structure of circuit board Pending JPH01168093A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP32767787A JPH01168093A (en) 1987-12-23 1987-12-23 Structure of circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP32767787A JPH01168093A (en) 1987-12-23 1987-12-23 Structure of circuit board

Publications (1)

Publication Number Publication Date
JPH01168093A true JPH01168093A (en) 1989-07-03

Family

ID=18201739

Family Applications (1)

Application Number Title Priority Date Filing Date
JP32767787A Pending JPH01168093A (en) 1987-12-23 1987-12-23 Structure of circuit board

Country Status (1)

Country Link
JP (1) JPH01168093A (en)

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10335763A (en) * 1997-05-27 1998-12-18 Alps Electric Co Ltd Circuit substrate
JP2001135899A (en) * 1999-11-05 2001-05-18 Mitsubishi Electric Corp High frequency printed circuit board and manufacturing method therefor
JP2002232143A (en) * 2001-01-31 2002-08-16 Toppan Printing Co Ltd Coaxial via hole and its forming method, multilayer wiring board and its producing method
JP2002344149A (en) * 2001-05-15 2002-11-29 Oki Electric Ind Co Ltd Wiring structure board
JP2003204128A (en) * 2002-01-10 2003-07-18 Sharp Corp Printed wiring board, converter for receiving radio wave, and antenna device
US6700789B2 (en) 2002-01-07 2004-03-02 Kyocera Corporation High-frequency wiring board
JP2004273509A (en) * 2003-03-05 2004-09-30 Sharp Corp Mounting structure of high-frequency semiconductor device, high-frequency semiconductor device using the same, and high-frequency receiving device
JP2005108893A (en) * 2003-09-26 2005-04-21 Kyocera Corp Wiring board
JP2006005052A (en) * 2004-06-16 2006-01-05 Dainippon Printing Co Ltd Multilayered wiring board and its manufacturing method
JPWO2004110120A1 (en) * 2003-06-09 2006-07-20 富士通株式会社 Printed circuit board and printed circuit board unit
JP2006279086A (en) * 2006-07-14 2006-10-12 Sharp Corp Printed wiring board
WO2006127988A1 (en) * 2005-05-23 2006-11-30 Intel Corporation Low inductance via structures
JP2007305756A (en) * 2006-05-11 2007-11-22 Sumitomo Bakelite Co Ltd Circuit board
US7549222B2 (en) 2004-05-10 2009-06-23 Fujitsu Limited Method of producing wiring board
JP2018085244A (en) * 2016-11-24 2018-05-31 日本航空電子工業株式会社 Coaxial connector and connector assembly

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10335763A (en) * 1997-05-27 1998-12-18 Alps Electric Co Ltd Circuit substrate
JP2001135899A (en) * 1999-11-05 2001-05-18 Mitsubishi Electric Corp High frequency printed circuit board and manufacturing method therefor
JP2002232143A (en) * 2001-01-31 2002-08-16 Toppan Printing Co Ltd Coaxial via hole and its forming method, multilayer wiring board and its producing method
JP4734723B2 (en) * 2001-01-31 2011-07-27 凸版印刷株式会社 Manufacturing method of multilayer wiring board using coaxial via hole
JP4694035B2 (en) * 2001-05-15 2011-06-01 Okiセミコンダクタ株式会社 Wiring structure board
JP2002344149A (en) * 2001-05-15 2002-11-29 Oki Electric Ind Co Ltd Wiring structure board
US6700789B2 (en) 2002-01-07 2004-03-02 Kyocera Corporation High-frequency wiring board
JP2003204128A (en) * 2002-01-10 2003-07-18 Sharp Corp Printed wiring board, converter for receiving radio wave, and antenna device
US7378599B2 (en) 2002-01-10 2008-05-27 Sharp Kabushiki Kaisha Printed circuit board, radio wave receiving converter, and antenna device
JP2004273509A (en) * 2003-03-05 2004-09-30 Sharp Corp Mounting structure of high-frequency semiconductor device, high-frequency semiconductor device using the same, and high-frequency receiving device
JPWO2004110120A1 (en) * 2003-06-09 2006-07-20 富士通株式会社 Printed circuit board and printed circuit board unit
US7372143B2 (en) 2003-06-09 2008-05-13 Fujitsu Limited Printed circuit board including via contributing to superior characteristic impedance
JP2005108893A (en) * 2003-09-26 2005-04-21 Kyocera Corp Wiring board
US7549222B2 (en) 2004-05-10 2009-06-23 Fujitsu Limited Method of producing wiring board
JP4598438B2 (en) * 2004-06-16 2010-12-15 大日本印刷株式会社 Manufacturing method of multilayer wiring board
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