JP2002344149A - Wiring structure board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a wiring structure board intended to reduce spurious radiations. SOLUTION: The board comprises a first insulation layer 16 having a first main surface 12, a second insulation layer 18 having a second main surface 14, a first signal wiring pattern 20 formed on other regions than electronic circuit component mounting regions of the first main surface, a first conductor layer 22 formed on the backside of the first insulation layer, a second signal wiring pattern 24 formed on the second main surface, a second conductor layer 26 formed on the surface of the second insulation layer, signal vias 30 piercing a board 10 to electrically connect the first signal wiring pattern with the second signal wiring pattern, a third conductor layer 32 provided on other regions than the electronic circuit component mounting regions and the first signal wiring pattern forming region of the first main surface, a fourth conductor layer 34 provided on other regions than the second signal wiring pattern of the second main surface, first return path ensuring vias 36 for electrically connecting the second conductor layer with the third conductor layer, and second return path ensuring vias 40 for electrically connecting the first conductor layer with the fourth conductor layer.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an EMI (Electro
The present invention relates to a wiring structure board capable of reducing electromagnetic interference (electromagnetic interference), and more particularly to a wiring structure board capable of reducing unnecessary radiation from a printed circuit board on which electronic circuit components are mounted.

[0002]

2. Description of the Related Art FIG. 7 shows a basic configuration example of a conventional printed circuit board on which a digital circuit is mounted. FIG.
FIG. 2A is a perspective view partially showing a part of wiring of an electronic component constituting a digital circuit and a substrate on which the wiring is formed. FIG. 7B is a cross-sectional view of the structure in FIG. 7A taken along a direction in which a current flows. FIG.
According to this, a multi-layer substrate (also referred to as a multi-layer board) having a laminated structure of a first insulating layer 102, a ground layer 104, an interlayer insulating layer 106, a power supply layer 108, and a second insulating layer 110 in order from the top surface; A first signal wiring pattern 112 formed on the first insulating layer 102, a second signal wiring pattern 114 formed on the back surface side of the second insulating layer 110, and a hole penetrating the multilayer substrate; Has a signal via 116 embedded in a conductive material or covered by plating or the like. The first signal wiring pattern 112 and the second signal wiring pattern 114 are electrically connected by the signal via 116. First signal wiring pattern 112 and second signal wiring pattern 114
Has a microstrip line structure and is used, for example, as a wiring connecting electronic components.

[0003]

However, the wiring structure board having the above-described structure emits unnecessary electromagnetic waves. Explanation using the configuration example of FIG.
In this structure, the first and second signal wiring patterns 112 and 114 are both formed on the surface of a wiring structure substrate (also simply referred to as a substrate), and are formed on the first and second signal wiring patterns 112 and 114. The surrounding area is open. Therefore, the electromagnetic field leaks to the opposite sides of the first and second signal wiring patterns 112 and 114 from the substrate side and to both sides of the patterns 112 and 114.

As is apparent from FIG. 7B, the signal pattern current is changed to the first signal wiring pattern 112.
Between the second signal wiring pattern 114 and the signal via 116.
Flows through. Here, considering the path of the return current (return path) of the signal pattern current, when a high-frequency current flows through the first signal wiring pattern 112,
The return current flows through the ground layer 104 immediately below the first signal wiring pattern 112. When a high-frequency current flows through the second signal wiring pattern 114, the return current flows through the power supply layer 108 immediately above. However, the first
When a current flows from the signal wiring pattern 112 to the second signal wiring pattern 114 via the signal via 116, a return current path from the ground layer 104 to the power supply layer 108 is not secured. As a result, the return current having nowhere to go is widely distributed in the ground layer 104 or the power supply layer 108.

Therefore, the leakage of the electromagnetic field and the return current that has been widely distributed may become a radiation source and cause EMI. For this reason, conventionally, it has been necessary to take measures such as using a noise suppression component or providing an external shield.

Therefore, the appearance of a wiring structure substrate capable of reducing unnecessary radiation has been desired.

[0007]

For this purpose, the wiring structure board of the present invention is configured as described below. In the configuration described below, the first main surface and the second main surface of the substrate (wiring structure substrate) refer to either the front surface or the rear surface of the substrate. For example, when the surface of the substrate is the first main surface, the back surface of the substrate is referred to as the second main surface. In a multilayer substrate, for example, when the uppermost surface is the first main surface, the lowermost surface is the second main surface.

Therefore, the wiring structure board according to the present invention comprises:
This is a multilayer substrate on which electronic circuit components are mounted on the first main surface. The substrate includes a first insulating layer having a first main surface, a second insulating layer having a second main surface, a first signal wiring pattern, a first conductor layer, a second signal wiring pattern, and a second insulating layer. A conductor layer, a signal via, a third conductor layer, a fourth conductor layer,
A via and a second via are provided. The first signal wiring pattern is formed in a region other than the electronic circuit component mounting region on the first main surface of the substrate. The first conductor layer is formed on the opposite side of the first signal wiring pattern with the first insulating layer interposed therebetween. The second signal wiring pattern is formed on the second main surface. The second conductor layer is formed on the opposite side of the second signal wiring pattern with the second insulating layer interposed therebetween. The signal via is provided to penetrate the substrate and electrically connects the first signal wiring pattern and the second signal wiring pattern. The third conductor layer is provided on the first main surface of the substrate in a region other than the mounting region of the electronic circuit component and in a region other than the formation region of the first signal wiring pattern. It is provided so as not to be electrically connected, that is, in an electrically disconnected state. 4th
The conductor layer is provided in a region other than the second signal wiring pattern on the second main surface of the substrate in a state of being electrically disconnected from the second signal wiring pattern. The first via is provided through the first insulating layer for securing a return path, and electrically connects the second conductor layer and the third conductor layer. The second via is provided to penetrate the second insulating layer for securing a return path, and is connected to the first conductor layer and the fourth via.
The conductor layer is electrically connected.

[0009] The wiring structure board having the above-described structure is composed of the first substrate.
In addition, since the conductor layer is provided on the same surface as the surface on which the second signal wiring pattern is formed, the conductor layer functions as a shield. That is, the distribution of the electromagnetic field from the signal wiring pattern can be suppressed by the conductor layer.

This conductor layer may be provided along the direction in which the signal pattern current of the signal wiring pattern flows, and may be formed on one side of the signal wiring pattern, but is preferably formed on both sides. It may be formed in a U shape or an O shape so as to surround the open end of the signal wiring pattern, or
It may be formed over the entire surface on which the signal wiring pattern is provided around the signal wiring pattern in a state of being electrically disconnected from the signal wiring pattern. The closer the distance between the conductor layer and the signal wiring pattern is, the more effective the effect of suppressing the distribution of the electromagnetic field is.

The third conductor layer provided on the first main surface is electrically connected to the second conductor layer via the first via for securing a return path. Similarly, the fourth conductor layer provided on the second main surface is electrically connected to the first conductor layer via the return path securing second via. Therefore, when a signal pattern current flows from the first signal wiring pattern to the second signal wiring pattern via the signal via, the return from the second conductor layer to the third conductor layer through the first via for return path securing. Electric current flows. Conversely, when a signal pattern current flows from the second signal wiring pattern to the first signal wiring pattern, a return current flows from the first conductor layer to the fourth conductor layer through the second via for securing return. Therefore, when a signal pattern current flows between the first signal wiring pattern and the second signal wiring pattern via the signal via, a return current path can be secured. Can be suppressed from being widely distributed. Therefore, unnecessary radiation from the wiring structure substrate can be suppressed. This eliminates the need to take measures such as providing a shield against unnecessary radiation or using noise suppression components. Therefore, the manufacturing cost of the wiring structure substrate can be reduced. For this reason, the effect of reducing the manufacturing cost of products such as information processing equipment using this substrate can also be expected.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. It should be noted that the drawings merely schematically show the shapes, sizes, and arrangements of the components so that the present invention can be understood, and thus the present invention is not limited to the illustrated examples. In the drawings, hatching (hatched lines) showing a cross section is omitted except for a part for easy understanding of the drawings.

FIG. 1 is a structural view of a wiring structure board according to an embodiment of the present invention, which is shown in a perspective view. FIG.
FIG. 3 is a cross-sectional view of the wiring structure substrate taken along a straight line passing through the center of a signal via in a direction orthogonal to a direction in which a wiring pattern current flows.

First, the wiring structure substrate 10 according to this embodiment
Is a multilayer substrate, the front surface 12 of which is referred to as a first main surface, and the surface (back surface) 14 opposite to the front surface is referred to as a second main surface. Then, for example, electronic circuit components are mounted on the first main surface 12 (not shown).

The wiring structure substrate 10 includes a first insulating layer 16 having the first main surface 12 and a second insulating layer 18 having the second main surface 14. Then, a first signal wiring pattern 20 is formed in a region other than the electronic component mounting region on the surface (first main surface of the substrate) 12 of the first insulating layer 16. The first signal wiring pattern 20 is opposite to the first signal wiring pattern 20 with the first insulating layer 16 interposed therebetween, that is, the first insulating layer 1.
6, a first conductor layer 22 is formed on the back surface.

The back surface of the second insulating layer 18 (the second
The second signal wiring pattern 24 is formed on the main surface 14. Then, the second conductor layer 26 is formed on the opposite side of the second signal wiring pattern 24, that is, on the surface of the second insulating layer 18.

Therefore, the multi-layer substrate 1 of this embodiment
The layer configuration of No. 0 includes, in order from the lower layer side, the second signal wiring pattern 24, the second insulating layer 18, the second conductor layer 26, and the first conductor layer 2.
2, a configuration including a first insulating layer 16 and a first signal wiring pattern 20. Note that an interlayer insulating layer 28 is formed between the second conductor layer 26 and the first conductor layer 22.

A via 30 is formed through the multi-layer substrate (also simply referred to as a substrate) 10, and the via 30 electrically connects the first signal wiring pattern 20 and the second signal wiring pattern 24. It is connected to the. Therefore, this via 30 is referred to as a signal via.

The wiring structure substrate 10 of this embodiment
In (3), the third conductor layer 32 is formed in a region other than the region where the electronic circuit components are mounted and the region where the first signal wiring pattern 20 is formed on the first main surface 12. The third conductor layer 32 is formed of the electronic circuit component and the first signal wiring pattern 20.
Are provided so as not to be electrically connected. Also, the second
A fourth conductor layer 34 is formed on the main surface 14 in a region other than the second signal wiring pattern 24. This fourth conductor layer 3
4 is provided so as not to be electrically connected to the second signal wiring pattern 24 (see FIG. 2).

In this embodiment, the third conductor layer 3
2 is formed over the entire first main surface 12 except for the electronic circuit component mounting area and the first signal wiring pattern 20 forming area. Then, similarly to the third conductor layer 32, the fourth conductor layer 34 is formed over the entire second main surface 14 except for the region where the second signal wiring pattern 24 is formed (FIG. 1).
reference).

A via 36 penetrating the first insulating layer 16
Are formed. The via 36 electrically connects the second conductor layer 26 and the third conductor layer 32. Therefore, the first conductive layer between the second conductive layer 26 and the third conductive layer 32
The via 36 is not electrically connected to the conductor layer 22. This via 36 is used as the first return path securing
Called via. Therefore, an opening 38 larger than the diameter of the return path securing first via 36 is formed in the first conductor layer 22 in the region where the return path securing first via 36 is formed (see FIG. 2). . Then, the first via 36 for securing a return path is formed inside the opening 38.

The second insulating layer 18 also has a via 40 penetrating the layer 18. The via 40 electrically connects the first conductor layer 22 and the fourth conductor layer 34. Therefore, the second conductor layer 26 between the first conductor layer 22 and the fourth conductor layer 34 prevents the via 40 from being electrically connected. This via 40 is referred to as a return path securing second via. Therefore, an opening 42 larger than the diameter of the return path securing second via 40 is formed in the second conductor layer 26 in the region where the return path securing second via 40 is formed (see FIG. 2). . The second via 40 for securing a return path is formed inside the opening 42.

Next, the behavior of the electromagnetic field around the signal wiring patterns 20, 24 when a high-frequency current is applied to the signal wiring patterns 20, 24 of the wiring structure substrate 10 having the above-described configuration will be described.

First, when a high-frequency current as a signal pattern current flows through the first signal wiring pattern 20, the return current passes through the region of the first conductor layer 22 directly below the first signal wiring pattern 20 to the first signal wiring pattern. The current flows in the direction opposite to the direction of the current flowing in the pattern 20. At this time, the third conductor layer 32 formed on the entire surface of the surface 12 of the first insulating layer 16 other than the region where the first signal wiring pattern 20 is formed and the region where the electronic circuit component is mounted is attached to the first signal wiring pattern. 2
Although it is not in contact with 0, it is formed in a region adjacent along this pattern 20. Therefore, considering that the current flowing through the first signal wiring pattern 20 is a high-frequency current, the third conductor layer 32 is a ground layer, that is, a layer having the same function as the ground layer. Therefore,
Since the electromagnetic field around the first signal wiring pattern 20 is formed between the first signal wiring pattern 20 and the third conductor layer 32, it is possible to prevent the electromagnetic field from leaking to the outside.

Next, when a high-frequency current flows from the first signal wiring pattern 20 to the second signal wiring pattern 24 via the signal via 30, the return current flows from the second conductor layer 26 to the first via for securing a return path. It flows to the third conductor layer 32 via.

Accordingly, it is possible to secure a return current path for the signal pattern current.

The return current can take another path. That is, it is a path that flows from the fourth conductor layer 34 to the first conductor layer 22 via the return path securing second via 40.

Therefore, it is possible to reduce the possibility that the high-frequency current caused by the return current is widely distributed in the conductor layer in the substrate 10.

Conversely, when a high-frequency current flows from the second signal wiring pattern 24 to the first signal wiring pattern 20 via the signal via 30, the return current is changed to the first signal wiring pattern.
It flows from the conductor layer 22 to the fourth conductor layer 34 via the return path securing second via 40.

In this case, another path of the return current can be considered. That is, the second conductor layer 26 is transferred from the third conductor layer 32 via the return path securing first via 36.
It is a route to reach.

Therefore, a return current path can be secured.

When a current flows through the second signal wiring pattern 24, the fourth conductor layer 34 formed close to the second signal wiring pattern 24 is located between the second signal wiring pattern 24 and the second signal wiring pattern 24. To form an electromagnetic field. Therefore, the possibility that the electromagnetic field formed around the second signal wiring pattern 24 spreads and leaks to the outside is reduced.

As described above, according to the configuration of the present invention, the leakage of the electromagnetic field around the signal wiring pattern and the high-frequency current with no destination due to the return current, which have caused unnecessary radiation, are generated in the substrate 10. Can be suppressed or eliminated, so that unnecessary radiation from the substrate 10 can be significantly reduced.

Therefore, the generation of noise due to unnecessary radiation can be suppressed, so that a noise countermeasure component and a shield are not required.

Thus, unnecessary radiation can be suppressed at a low cost, which leads to a reduction in the cost of the substrate itself.

[0036]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to more specific examples. It should be noted that the numerical conditions such as the materials of the constituent components and the dimensions of each part used in the examples are merely examples of the configuration examples of the present invention, and are not limited to these.

FIG. 3 is a schematic diagram showing the configuration of the wiring structure board of this embodiment, and is shown in a plan view seen from above.
FIG. 4 is a schematic sectional view of a region around the signal wiring pattern.

In FIGS. 3 and 4, components similar to those of the above-described embodiment are denoted by the same reference numerals as those used in FIGS. 1 and 2.

The wiring structure board 10 of this embodiment has a first insulating layer 16 and a second insulating layer 16 each having a thickness of about 0.2 mm.
An insulating layer 18 and a first layer each having a thickness of about 0.035 mm;
About 1.034 mm with the conductor layer 22 and the second conductor layer 26
And an interlayer insulating layer 28 having a thickness of

Then, on the surface 12 of the first insulating layer 16,
The first signal wiring pattern 20 having a thickness of about 0.043 mm is formed, and the back surface 14 of the second insulating layer 18
A second signal wiring pattern 24 having a thickness of about 0.043 mm is formed.

In this embodiment, the first insulating layer 16
A third conductor layer 32 having a thickness of 0.043 mm is formed in a region other than the first signal wiring pattern 20 on the surface 12 of the substrate so as not to be electrically connected to the first signal wiring pattern 20.

In a region other than the second signal wiring pattern 24 on the back surface 14 of the second insulating layer 18, a thickness of 0.1 mm is used so as not to be electrically connected to the second signal wiring pattern 24.
A fourth conductor layer 34 of 043 mm is formed (FIG. 4).

The first insulating layer 16, the second insulating layer 18, and the interlayer insulating layer 28 are made of glass epoxy resin (FR-
4). The first conductor layer 22 and the second conductor layer 26 are made of copper foil.

The first and second signal wiring patterns 20, 24, the third conductor layer 32, and the fourth conductor layer 34
Has a two-layer structure of copper foils 20a, 24a, 32a, 34a and plating layers 20b, 24b, 32b, 34b formed on the copper foil (FIG. 4).

The first and second signal wiring patterns 2
0 and 24 are respectively provided along the same arrangement line facing each other.

The entire upper side of the first insulating layer 16 and the entire lower side of the second insulating layer are covered with a resist film 44 (FIG. 4).

As shown in FIG. 3, in this embodiment, six first signal wiring patterns 20 (20p, 2
0q, 20r, 20s, 20t, 20u) are formed in different directions.

Then, these six signal wiring patterns 2
0 is connected to the driver IC 50 at one end.

On the other hand, the other end of the signal wiring pattern 20 is open. First signal wiring patterns 20q and 20t
Are provided so as to extend on the same straight line in directions opposite to each other with the driver IC 50 as a center.

The first signal wiring patterns 20p, 20r, 2
0s and 20u are provided in a broken line state in which both ends are straight lines parallel to each other and the center is an oblique straight line.

The parallel straight part and the oblique straight part intersect at an obtuse angle and are connected.

The first signal wiring patterns 20u and 20s are arranged symmetrically with respect to the center line 20t, and the first signal wiring patterns 20p and 20r are arranged symmetrically with respect to the center line 20q. Have been.

The first signal wiring patterns are close to each other in the driver IC 50, but are far apart from each other at the open ends.

In this example, the six first signal wiring patterns 20 are connected to the second signal wiring patterns 24 (24q, 24r, 24) by different numbers of signal vias 30, respectively.
s, 24t, 24u).

In the first pattern 20p, the number of signal vias is zero.
It is.

The second pattern 20q includes eight signal vias 3
0 indicates the second pattern 24q of the second signal wiring pattern.
Is connected to

The third pattern 20r includes two signal vias 3
0 indicates the third pattern 24r of the second signal wiring pattern
Is connected to

The fourth pattern 20s includes six signal vias 3
0 indicates the fourth pattern 24s of the second signal wiring pattern
Is connected to

The fifth pattern 20t includes four signal vias 3
0 indicates the fifth pattern 24t of the second signal wiring pattern
Is connected to

The sixth pattern 20u is connected to the sixth pattern 24u of the second signal wiring pattern by one signal via 30 (FIG. 3).

The wiring width of the first and second signal wiring patterns 20, 24 is 0.18 mm.

In this embodiment, the first return path securing first region is provided in the region of the substrate 10 on both sides of each signal via 30.
The via 36 and the second via 40 are formed (see FIGS. 3 and 1).

A straight line connecting the center position of the first via 36 and the center position of the second via 40 is a straight line passing through the center of the signal via 30 and is orthogonal to the first signal wiring pattern 20. .

Further, from the center of the first via 36, the signal via 3
The distance d1 to the center of 0 is the same as the distance d2 from the center of the second via 40 to the center of the signal via 30. In this example, the distances d1 and d2 from the centers of the first and second vias to the center of the signal via are 1.5 mm. Each of the signal via 30 and the return path securing via (the first via 36 and the second via 40) has an inner wall plated with copper, and the plated via has a diameter of 0.3 mm.

The signal via 30 connects the first signal wiring pattern 20 and the second signal wiring pattern 24. Therefore, a copper land 52 that is continuous with the plated copper of the signal via 30 is formed in a ring shape on the surface 12 of the first insulating layer 16.

Similarly, a land 52 is formed on the back surface 14 of the second insulating layer 18. The land 52 is electrically connected to the first signal wiring pattern 20 or the second signal wiring pattern 24 (see FIGS. 1 and 2).

The return path securing first via 36 is also provided.
Is a via connecting the second conductor layer 26 and the third conductor layer 32.

Therefore, the first via 3 of the fourth conductor layer 34
An opening 54 is formed around the formation region 6 (see FIG. 2). Then, the back surface 14 of the second insulating layer 18 is exposed from the opening 54. Also, the first via 36
A land 56 having a diameter of 0.7 mm outside the ring is formed around the hole for use, and the size of the opening 54 is larger than the land 56. Therefore, the land 56 and the fourth conductor layer 34 are not electrically connected (FIG. 2).

The second via 40 for securing the return path
Is a via connecting the first conductor layer 16 and the fourth conductor layer 34.

Therefore, the second via 4 of the third conductor layer 32
An opening 58 is formed around the zero forming region. Then, the surface 12 of the first insulating layer 16 is
Is exposed.

A land 60 having a diameter of 0.7 mm outside the ring is formed around the hole for the second via 40.

The size of the opening 58 is determined by the land 6
Greater than zero.

Therefore, the land 60 and the third conductor layer 32
And is not electrically connected.

The external dimensions of the wiring structure board 10 are 149.86 mm × 231.14 mm.

The surface 12 of the first insulating layer 16 of the substrate 10
Is mounted with a driver IC 50 (FIG. 3). In this example, the driver is a standard logic IC 74A.
LVC04 (for example, TI (Texas Instruments)) is used.

Although not shown, a 50-MHz clock, a battery-driven power supply, and the like are mounted on the back surface of the substrate 10, and these are covered by a shield box. Therefore, the influence of the electromagnetic waves by these components does not reach around the signal wiring patterns 20 and 24.

As a result, a wiring structure substrate 10 which is a specific configuration example of the present invention is obtained.

Next, unnecessary radiation from the wiring structure substrate 10 described with reference to FIGS. 3 and 4 is measured.

Therefore, the first conductor layer 16 and the fourth conductor layer 34 of the wiring structure board 10 are used as ground layers, and the second conductor layer 18 and the third conductor layer 32 are used as power supply layers.

Also, here, VCCI (Voluntary Control Counci
l for Interference by Information Technology Equip
ment) is measured by a spectrum analyzer using a 3 m method in an anechoic chamber conforming to the standard of ment). Then, the horizontal polarization when the antenna is mounted in the horizontal direction and the vertical polarization when the antenna is mounted in the vertical direction are measured.

The antenna height is set to 1 m to 4 m for measurement, and the maximum value is obtained. The frequency range is 30 MH
z to 1000 MHz.

The measurement results are shown in FIGS. 5A and 5B. FIG. 5A is a change characteristic diagram of horizontal polarization caused by unnecessary radiation with respect to a frequency change. FIG. 5 (B)
FIG. 4 is a graph showing a change characteristic of vertical polarization caused by unnecessary radiation with respect to a frequency change.

FIGS. 5A and 5B both show the frequency (MHz) on the horizontal axis and the radiation intensity (dB (μV / m)) on the vertical axis.

In FIG. 5, the frequency is 50 MHz.
The measurement was performed every time, and the peak value is shown. And
The curve between the peaks is the antenna factor, which is corrected according to the frequency characteristics of the antenna.

Here, as a comparative example, FIG.
FIG. 6B shows the measurement results of the unnecessary radiation of the conventional wiring structure substrate. The configuration of the wiring structure board of the comparative example is different from the configuration of the example in the third conductor layer 3 provided on the first insulating layer 16.
2 and the fourth conductor layer 3 provided on the back surface 14 of the second insulating film 18.
4 and the first via 36 and the second via 40 for securing the return path.

According to FIGS. 5A and 5B, the unnecessary radiation from the wiring structure substrate 10 of this embodiment is generated by the horizontal polarization and the vertical polarization within the frequency range of 30 MHz to 1000 MHz. In both cases, they could be suppressed to almost 40 dB or less.

According to FIGS. 6 (A) and 6 (B), from the conventional substrate, higher unnecessary radiation is measured as the frequency becomes higher.
Unnecessary radiation having an intensity of 46 dB was measured at 50 MHz. In the case of vertical polarization, high unnecessary radiation near 58 dB was measured at a frequency of 655 MHz.

Therefore, by providing third conductor layer 32 and fourth conductor layer 34 on first main surface 12 and second main surface 14 of substrate 10, the same first main surface 12 and second main surface 14 are provided. The formed signal wiring pattern 2
When a high-frequency current flows through 0 and 24, leakage of an electromagnetic field from the signal wiring patterns 20 and 24 can be suppressed. Thereby, one of the causes of the unnecessary radiation can be eliminated.

Further, the second conductor layer 26 and the third conductor layer 3
2 and a return path securing second via 40 connecting the first conductor layer 22 and the fourth conductor layer 34 are provided close to the signal via 30. The first signal wiring pattern 20 and the second signal wiring pattern 2 via the signal via 30
When a signal pattern current flows between the four, a path for the return current can be secured.

Therefore, since the situation where the return current goes out disappears, the high frequency current can be prevented from being widely distributed to the conductor layer in the substrate 10.

If d1 and d2 are too long, the distribution range of the electromagnetic field from the return current may be widened. Therefore, d1 and d2 are preferably shorter within a range of about 2 mm or less. . Thereby, another cause of the unnecessary radiation can be eliminated.

Therefore, it is possible to provide a wiring structure substrate in which generation of unnecessary radiation is suppressed as compared with the related art. Further, since it is not necessary to use a noise suppression component, a shield, or the like to suppress unnecessary radiation, a less expensive wiring structure substrate can be provided.

The wiring structure board of the present invention can be applied to a general digital circuit board. Therefore, the substrate of the present invention is suitably applied to all products using digital circuits, such as information processing equipment.

Further, in the above-described embodiment, the example in which the interlayer insulating layer is interposed between the first conductor layer and the second conductor layer has been described. A plurality of different conductor layers sandwiched between insulating layers may be interposed between the conductor layers.

At this time, the signal via is a via connecting only the first signal wiring pattern and the second signal wiring pattern, and is electrically disconnected from the plurality of intervening conductor layers. I do.

[0096]

As is apparent from the above description, according to the wiring structure board of the present invention, the conductor layer provided around the first and second signal wiring patterns has an effect like a shield, The distribution of the electromagnetic field from the signal wiring pattern can be suppressed.

Further, the third conductor layer provided on the first main surface is electrically connected to the second conductor layer via the first via for securing the return path. Similarly, the fourth conductor layer provided on the second main surface is electrically connected to the first conductor layer via the return path securing second via. Therefore, when a signal pattern current flows from the first signal wiring pattern to the second signal wiring pattern via the signal via, the return from the second conductor layer to the third conductor layer through the first via for securing a return path. Electric current flows. Conversely, when a signal pattern current flows from the second signal wiring pattern to the first signal wiring pattern, a return current flows from the first conductor layer to the fourth conductor layer through the second via for securing return.

Therefore, when a signal pattern current flows between the first signal wiring pattern and the second signal wiring pattern via the signal via, a path for a return current can be secured. Widely distributed in the conductor layer of the first embodiment.

Therefore, unnecessary radiation from the wiring structure substrate can be suppressed.

[0100] Thus, it is not necessary to take measures such as providing a shield against unnecessary radiation or using a noise suppression component.

Therefore, the manufacturing cost of the wiring structure substrate can be reduced.

Therefore, the effect of reducing the manufacturing cost of products such as information processing equipment using this substrate can be expected.

[Brief description of the drawings]

FIG. 1 is a perspective view showing a schematic configuration of a wiring structure board of the present invention.

FIG. 2 is a cross-sectional view illustrating a schematic configuration of a wiring structure board according to the present invention.

FIG. 3 is a plan view seen from above of a wiring structure substrate, which is used for describing the embodiment.

FIG. 4 is a cross-sectional view of a wiring structure substrate for explaining an example.

5A and 5B are characteristic diagrams showing measurement results of an unnecessary radiation intensity from a wiring structure substrate, which are used for describing the embodiment, and FIG.
Is the measurement result of the unnecessary radiation intensity of the horizontal polarization, and (B)
Is a measurement result of the unnecessary radiation intensity of the vertically polarized wave.

FIG. 6 is a characteristic diagram showing a measurement result of an unnecessary radiation intensity from a conventional wiring structure substrate as a comparative example, and (A)
Is the measurement result of the unnecessary radiation intensity of the horizontal polarization, and (B)
Is a measurement result of the unnecessary radiation intensity of the vertically polarized wave.

FIG. 7A is a perspective view showing a schematic configuration of a conventional wiring structure board, and FIG. 7B is a cross-sectional view.

[Explanation of symbols]

 10: wiring structure substrate (multilayer substrate, substrate) 12: front surface (first main surface) 14: back surface (second main surface) 16, 102: first insulating layer 18, 110: second insulating layer 20, 112: first 1 signal wiring pattern 20a, 24a, 32a, 34a: copper foil 20b, 24b, 32b, 34b: plating layer 20p, 24p: first pattern 20q, 24q: second pattern 20r, 24r: third pattern 20s, 24s: first Four patterns 20t, 24t: Fifth pattern 20u, 24u: Sixth pattern 22: First conductor layer 24, 114: Second signal wiring pattern 26: Second conductor layer 28, 106: Interlayer insulating layer 30, 116: Via ( Signal via) 32: third conductor layer 34: fourth conductor layer 36: via (first via for securing return path, first via) 38, 42, 54, 58: opening 40: via (Return path second via for securing, the second via) 44: resist film 50: Driver IC 52, 56, 60: Land 104: Ground layer 108: power source layer

Claims (5)

[Claims] 1. A multi-layer wiring structure substrate on which electronic circuit components are mounted on a first main surface, wherein: a first insulating layer having the first main surface; and a second insulating layer having a first main surface opposite to the first main surface. A second insulating layer having two main surfaces; a first signal wiring pattern formed in a region of the first main surface other than a mounting region of the electronic circuit component; and a first signal wiring of the first insulating layer. A first conductor layer formed on a surface opposite to the pattern, a second signal wiring pattern formed on the second main surface, and a second signal wiring pattern on the second insulating layer opposite to the second signal wiring pattern; A second conductor layer formed on a surface, a signal via provided through the substrate and electrically connecting the first signal wiring pattern and the second signal wiring pattern; and the first main surface. Mounting area of the electronic circuit component and the first signal wiring A third conductor layer provided in a region other than the ground formation region and electrically disconnected from the electronic circuit component and the first signal wiring pattern; and a portion of the second main surface other than the second signal wiring pattern. A fourth conductor layer electrically disconnected from the second signal wiring pattern, and a second conductor layer and the third conductor layer provided through the first insulating layer. A first via for securing a return path electrically connecting the first conductor layer to the first conductor layer and a first via for securing a return path electrically connecting the first conductor layer to the fourth conductor layer. A wiring structure substrate, comprising: a second via for use. 2. The wiring structure board according to claim 1, wherein the first via and the second via are provided close to the signal via, respectively. 3. The wiring structure board according to claim 1, wherein the third conductor layer is provided along the first signal wiring pattern, and wherein the fourth conductor layer is provided on the second signal wiring pattern. A wiring structure substrate provided along a signal wiring pattern. 4. The wiring structure board according to claim 1, wherein the third conductor layer is formed in a region other than the mounting region and the first signal wiring pattern forming region. A wiring structure substrate, wherein the wiring layer is formed over the entire surface region, and the fourth conductor layer is formed over the entire second main surface region other than the second signal wiring pattern formation region. 5. The wiring structure board according to claim 1, wherein an interlayer insulating layer is provided between the first conductor layer and the second conductor layer. Characteristic wiring structure board.