JPH01149620U - - Google Patents
Info
- Publication number
- JPH01149620U JPH01149620U JP4647288U JP4647288U JPH01149620U JP H01149620 U JPH01149620 U JP H01149620U JP 4647288 U JP4647288 U JP 4647288U JP 4647288 U JP4647288 U JP 4647288U JP H01149620 U JPH01149620 U JP H01149620U
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- film transistor
- pixel electrode
- gate lines
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims description 2
- 239000010409 thin film Substances 0.000 claims 5
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Landscapes
- Liquid Crystal (AREA)
- Transforming Electric Information Into Light Information (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Thin Film Transistor (AREA)
Description
第1図は、本考案の一実施例のTFTパネルの
、TFTを形成した直後の部分平面図、第2図は
、TFTが正常であつた場合のコンタクトホール
の形成位置を示す上記TFTパネルの部分平面図
、第3図は、TFTに欠陥があつた場合のコンタ
クトホールの形成位置を示す上記TFTパネルの
部分平面図、第4図は、上記第3図のA―A′線
で切断した上記TFTパネルの断面図、第5図は
、液晶表示装置の斜視断面図である。
10……絶縁基板、11……ゲートライン、1
2……ドレインライン、20……TFT、21…
…ドレイン電極、22……ソース電極、23……
ゲート電極、24,26……コンタクトホール、
25……画素電極、27……ゲート絶縁膜、28
……半導体膜。
FIG. 1 is a partial plan view of a TFT panel according to an embodiment of the present invention immediately after forming TFTs, and FIG. 2 is a partial plan view of the TFT panel showing the formation positions of contact holes when the TFT is normal. FIG. 3 is a partial plan view of the TFT panel showing the formation position of a contact hole in the event of a defect in the TFT, and FIG. 4 is a partial plan view taken along line A-A' in FIG. 3 above. FIG. 5, which is a sectional view of the TFT panel, is a perspective sectional view of the liquid crystal display device. 10...Insulating substrate, 11...Gate line, 1
2...Drain line, 20...TFT, 21...
...Drain electrode, 22...Source electrode, 23...
Gate electrode, 24, 26...contact hole,
25...Pixel electrode, 27...Gate insulating film, 28
...Semiconductor film.
Claims (1)
ートライン及びドレインラインと、これらゲート
ラインとドレインラインとが交差する箇所毎に設
けられた薄膜トランジスタと、この薄膜トランジ
スタのソース電極と接続された複数の画素電極と
を備えた薄膜トランジスタパネルにおいて、 前記画素電極は、その画素電極に隣接して設け
られた画素電極を駆動する薄膜トランジスタのソ
ース電極と絶縁層を介して重なる突出部が形成さ
れていることを特徴とする薄膜トランジスタパネ
ル。[Claims for Utility Model Registration] A plurality of gate lines and drain lines arranged vertically and horizontally on a transparent insulating substrate, a thin film transistor provided at each intersection of these gate lines and drain lines, and this thin film transistor In a thin film transistor panel including a plurality of pixel electrodes connected to a source electrode of the pixel electrode, the pixel electrode overlaps, via an insulating layer, the source electrode of a thin film transistor that drives the pixel electrode provided adjacent to the pixel electrode. A thin film transistor panel characterized in that a protrusion is formed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4647288U JPH01149620U (en) | 1988-04-06 | 1988-04-06 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4647288U JPH01149620U (en) | 1988-04-06 | 1988-04-06 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01149620U true JPH01149620U (en) | 1989-10-17 |
Family
ID=31272740
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4647288U Pending JPH01149620U (en) | 1988-04-06 | 1988-04-06 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01149620U (en) |
-
1988
- 1988-04-06 JP JP4647288U patent/JPH01149620U/ja active Pending
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