JPH0185819U - - Google Patents
Info
- Publication number
- JPH0185819U JPH0185819U JP18107487U JP18107487U JPH0185819U JP H0185819 U JPH0185819 U JP H0185819U JP 18107487 U JP18107487 U JP 18107487U JP 18107487 U JP18107487 U JP 18107487U JP H0185819 U JPH0185819 U JP H0185819U
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- liquid crystal
- display element
- crystal display
- source
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000010408 film Substances 0.000 claims description 8
- 239000000758 substrate Substances 0.000 claims description 7
- 239000004973 liquid crystal related substance Substances 0.000 claims description 6
- 239000011159 matrix material Substances 0.000 claims description 5
- 239000010409 thin film Substances 0.000 claims description 4
- 239000004065 semiconductor Substances 0.000 claims description 2
Landscapes
- Liquid Crystal (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Description
第１図はこの考案の一実施例を示す断面図及び
平面図、第２図と第３図は従来のアクテイブマト
リクス型液晶表示素子の一例を示す断面図である
。
２０，３３……絶縁基板、２１……ゲート電極
、２２……ゲート絶縁膜、２３……半導体膜、２
４……画素電極、２５……ソース電極、２６……
ドレイン電極、２７……薄膜トランジスタ、２８
……絶縁膜、２９……チヤネル部、３０……補助
容量電極、３２……アレイ基板、３４……共通電
極、３７……対向基板、３８……液晶。
FIG. 1 is a sectional view and a plan view showing an embodiment of this invention, and FIGS. 2 and 3 are sectional views showing an example of a conventional active matrix liquid crystal display element. 20, 33... Insulating substrate, 21... Gate electrode, 22... Gate insulating film, 23... Semiconductor film, 2
4...Pixel electrode, 25...Source electrode, 26...
Drain electrode, 27...Thin film transistor, 28
... Insulating film, 29 ... Channel portion, 30 ... Auxiliary capacitance electrode, 32 ... Array substrate, 34 ... Common electrode, 37 ... Counter substrate, 38 ... Liquid crystal.
Claims (1)
半導体膜及びソース及びドレイン電極を順に形成
してなる薄膜トランジスタをマトリクス状に配し
且つ各々に画素電極を設けてなるアレイ基板と、
絶縁基板上に共通電極を形成してなる対向基板と
の間に液晶を挟持してなるアクテイブマトリクス
型液晶表示素子において、少なくとも薄膜トラン
ジスタ上を絶縁膜で覆つた後に、前記ソース或い
はドレイン電極のうち前記画素電極に接続される
方の電極上に前記ソース及びドレイン電極間のチ
ヤネル部を覆わない形で前記絶縁膜を介して補助
容量電極を設けたことを特徴とするアクテイブマ
トリクス型液晶表示素子。 (2) 前記対向基板上における前記薄膜トランジ
スタと対向する位置には遮光膜が形成されている
ことを特徴とする実用新案登録請求の範囲第１項
記載のアクテイブマトリクス型液晶表示素子。[Scope of claims for utility model registration] (1) Gate electrode, gate insulating film,
an array substrate in which thin film transistors each having a semiconductor film and a source and drain electrode formed in this order are arranged in a matrix, each having a pixel electrode;
In an active matrix type liquid crystal display element in which a liquid crystal is sandwiched between an insulating substrate and a counter substrate formed with a common electrode, after at least the thin film transistor is covered with an insulating film, the source or drain electrode is An active matrix type liquid crystal display element, characterized in that an auxiliary capacitance electrode is provided on the electrode connected to the pixel electrode via the insulating film in a manner that does not cover the channel portion between the source and drain electrodes. (2) The active matrix liquid crystal display element according to claim 1, wherein a light shielding film is formed on the opposing substrate at a position facing the thin film transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18107487U JPH0185819U (en) | 1987-11-30 | 1987-11-30 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18107487U JPH0185819U (en) | 1987-11-30 | 1987-11-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0185819U true JPH0185819U (en) | 1989-06-07 |
Family
ID=31472572
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18107487U Pending JPH0185819U (en) | 1987-11-30 | 1987-11-30 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0185819U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04366924A (en) * | 1991-06-14 | 1992-12-18 | Sharp Corp | Manufacture of active matrix substrate |
-
1987
- 1987-11-30 JP JP18107487U patent/JPH0185819U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04366924A (en) * | 1991-06-14 | 1992-12-18 | Sharp Corp | Manufacture of active matrix substrate |