JPH01139448U - - Google Patents
Info
- Publication number
- JPH01139448U JPH01139448U JP3481788U JP3481788U JPH01139448U JP H01139448 U JPH01139448 U JP H01139448U JP 3481788 U JP3481788 U JP 3481788U JP 3481788 U JP3481788 U JP 3481788U JP H01139448 U JPH01139448 U JP H01139448U
- Authority
- JP
- Japan
- Prior art keywords
- resin
- chip
- sealed
- electronic component
- main surfaces
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 description 2
- 238000005452 bending Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Details Of Resistors (AREA)
Description
第１図は、この考案の一実施例を示すリードレ
ス電子部品を示し、同図ａは、その平面図、同図
ｂは、その中央縦断面図、第２図は、上記リード
レス電子部品に使用するリードフレーム全体を示
し、同図ａは、その一部切欠平面図、同図ｂは、
その要部拡大断面図、第３図は、上記リードレス
電子部品に使用する内部リードの全体の平面図、
第４図は、この種のリードレス電子部品の従来構
造を示し、同図ａは、その断面図、同図ｂは、そ
の平面図、第５図ａ，ｂ，ｃは、従来構造のリー
ドレス電子部品におけるリードの折曲げ工程を示
す工程図である。
１０，１２……リード、１４……樹脂封止部、
１５……折曲げ部、１６……チツプ、１７……内
部リード、１８……つば部。
FIG. 1 shows a leadless electronic component showing an embodiment of this invention, FIG. 1A is a plan view thereof, FIG. The entire lead frame used for
FIG. 3 is an enlarged sectional view of the main part thereof, and a plan view of the entire internal lead used in the leadless electronic component.
Fig. 4 shows the conventional structure of this type of leadless electronic component, Fig. 4a is its sectional view, Fig. 4b is its plan view, and Fig. 5a, b, and c are the leads of the conventional structure. FIG. 3 is a process diagram showing a lead bending process in a wireless electronic component. 10, 12...Lead, 14...Resin sealing part,
15...Bend portion, 16...Tip, 17...Internal lead, 18...Brim portion.
Claims (1)
その両主面に固着され、かつ、前記チツプ両主面
に平行に樹脂封止部の側面から導出されたリード
がほぼ「コ」状に折曲げられて前記樹脂封止部の
外周を抱き込むようにしたリードレス電子部品に
おいて、前記チツプ両主面に固着させたリードの
前記樹脂封止部から外部へ導出される直前の内部
位置に前記チツプの主面に対し、ほぼ直角となる
折曲げ部を形成したことを特徴とするリードレス
電子部品。 The leads are fixed to both main surfaces of the resin-sealed portion with the chip sealed inside the resin-sealed portion sandwiched therebetween, and are led out from the side surfaces of the resin-sealed portion in parallel to both main surfaces of the chip in a substantially “U” shape. In a leadless electronic component that is bent to embrace the outer periphery of the resin-sealed part, the lead fixed to both main surfaces of the chip is placed at an internal position immediately before being led out from the resin-sealed part to the outside. A leadless electronic component characterized in that a bent portion is formed at a substantially right angle to the main surface of the chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3481788U JPH01139448U (en) | 1988-03-16 | 1988-03-16 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3481788U JPH01139448U (en) | 1988-03-16 | 1988-03-16 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01139448U true JPH01139448U (en) | 1989-09-22 |
Family
ID=31261492
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3481788U Pending JPH01139448U (en) | 1988-03-16 | 1988-03-16 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01139448U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH054499U (en) * | 1991-06-28 | 1993-01-22 | 関西日本電気株式会社 | Chip type electronic parts |
| JP2012235161A (en) * | 2012-08-01 | 2012-11-29 | Rohm Co Ltd | Structure of package type two-terminal semiconductor device |
-
1988
- 1988-03-16 JP JP3481788U patent/JPH01139448U/ja active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH054499U (en) * | 1991-06-28 | 1993-01-22 | 関西日本電気株式会社 | Chip type electronic parts |
| JP2012235161A (en) * | 2012-08-01 | 2012-11-29 | Rohm Co Ltd | Structure of package type two-terminal semiconductor device |