JPH01130589A - Manufacture of printed wiring board - Google Patents
Manufacture of printed wiring boardInfo
- Publication number
- JPH01130589A JPH01130589A JP28988287A JP28988287A JPH01130589A JP H01130589 A JPH01130589 A JP H01130589A JP 28988287 A JP28988287 A JP 28988287A JP 28988287 A JP28988287 A JP 28988287A JP H01130589 A JPH01130589 A JP H01130589A
- Authority
- JP
- Japan
- Prior art keywords
- film
- etching resist
- printed wiring
- copper
- etching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 9
- 238000005530 etching Methods 0.000 claims abstract description 42
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 15
- 238000004070 electrodeposition Methods 0.000 claims abstract description 10
- 239000011248 coating agent Substances 0.000 claims abstract description 7
- 238000000576 coating method Methods 0.000 claims abstract description 7
- 238000013007 heat curing Methods 0.000 claims abstract description 6
- 230000007261 regionalization Effects 0.000 claims abstract description 3
- 238000000034 method Methods 0.000 claims description 25
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 29
- 238000007747 plating Methods 0.000 abstract description 27
- 229910052802 copper Inorganic materials 0.000 abstract description 16
- 239000010949 copper Substances 0.000 abstract description 16
- 239000011889 copper foil Substances 0.000 abstract description 10
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 abstract description 4
- 230000018109 developmental process Effects 0.000 abstract description 3
- 229910021529 ammonia Inorganic materials 0.000 abstract description 2
- 239000003513 alkali Substances 0.000 abstract 2
- 239000007788 liquid Substances 0.000 abstract 2
- 239000002585 base Substances 0.000 abstract 1
- 239000002184 metal Substances 0.000 description 9
- 229910052751 metal Inorganic materials 0.000 description 9
- 230000001681 protective effect Effects 0.000 description 5
- 239000000463 material Substances 0.000 description 4
- 229910000679 solder Inorganic materials 0.000 description 4
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- -1 etc. are plated Substances 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 229920000139 polyethylene terephthalate Polymers 0.000 description 2
- 239000005020 polyethylene terephthalate Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- DGAQECJNVWCQMB-PUAWFVPOSA-M Ilexoside XXIX Chemical compound C[C@@H]1CC[C@@]2(CC[C@@]3(C(=CC[C@H]4[C@]3(CC[C@@H]5[C@@]4(CC[C@@H](C5(C)C)OS(=O)(=O)[O-])C)C)[C@@H]2[C@]1(C)O)C)C(=O)O[C@H]6[C@@H]([C@H]([C@@H]([C@H](O6)CO)O)O)O.[Na+] DGAQECJNVWCQMB-PUAWFVPOSA-M 0.000 description 1
- 125000000129 anionic group Chemical group 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- 150000001879 copper Chemical class 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 239000003973 paint Substances 0.000 description 1
- 238000002203 pretreatment Methods 0.000 description 1
- 229910052708 sodium Inorganic materials 0.000 description 1
- 239000011734 sodium Substances 0.000 description 1
- 239000002689 soil Substances 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 238000001029 thermal curing Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0094—Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/427—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は印刷配線板の製造力゛法、特にその回路パタ
ーン形成をエツチングによって行う場合に使用するエツ
チングレジスト（エツチング保護膜）の改良に関するも
である。[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a method for manufacturing printed wiring boards, and particularly to improvements in etching resists (etching protective films) used when circuit patterns are formed by etching. It is.
従来の印刷配線板の回路パターン形成に使用されるエツ
チングレジストは、感光性ドライフィルムを利用したテ
ンティング法、半田や金などをめっきする金属めっきレ
ジスト法、アルキルイミダゾールなどのパターン上に化
学結合により塗布する有機レジスト法などにより形成さ
れ、そのエツチングレジスト以外の部分をエツチングす
ることにより印刷配線板を製造していた。Etching resists used to form circuit patterns on conventional printed wiring boards include a tenting method using a photosensitive dry film, a metal plating resist method in which solder, gold, etc. are plated, and a chemical bonding method on a pattern using alkylimidazole. Printed wiring boards were manufactured by etching the parts other than the etching resist.
第２図（Ａ）〜（Ｃ）は従来の感光性ドライフィルムを
用いたテンティング法の工程を示す断面図である。図に
おいて、（１）は絶縁基材（１０）上に形成された銅箔
、（２）はこの銅箔（１）上に施された銅めっき層、（
３）はこの銅めっき層（２）上に被覆された感光性ドラ
イフィルムである。この方法では（Ａ）に示すように、
銅めっき層（２）を施した後感光性ドライフィルム（３
）を全面に被覆する。次に（Ｂ）に示すように、回路パ
ターンが印刷されたワークフィルム（図示せず）を用い
て感光性ドライフィルム（３）上に必要な回路パターン
を露光形成したのち、感光性ドライフィルム（３）の不
必要部分を現像にて除去する。そして（Ｃ）に示すよう
に、残された感光性ドライフィルム（３）をエツチング
保護膜としてエツチングを行い、必要な回路パターンを
形成させる。印刷配線板（１１）の表裏をつなぐスルー
ホール（９）における銅めっき層（２）壁に対するエツ
チング時の保護は、テンティングフィルム（４）によっ
て行われる。FIGS. 2(A) to 2(C) are cross-sectional views showing the steps of the conventional tenting method using a photosensitive dry film. In the figure, (1) is a copper foil formed on an insulating base material (10), (2) is a copper plating layer applied on this copper foil (1), (
3) is a photosensitive dry film coated on this copper plating layer (2). In this method, as shown in (A),
After applying the copper plating layer (2), photosensitive dry film (3)
) to cover the entire surface. Next, as shown in (B), a necessary circuit pattern is formed on the photosensitive dry film (3) by exposure using a work film (not shown) on which a circuit pattern is printed, and then a necessary circuit pattern is formed on the photosensitive dry film (3). 3) Unnecessary portions are removed by development. Then, as shown in (C), etching is performed using the remaining photosensitive dry film (3) as an etching protection film to form a necessary circuit pattern. The tenting film (4) protects the wall of the copper plating layer (2) in the through hole (9) connecting the front and back sides of the printed wiring board (11) during etching.
第３図（Ａ）〜（Ｃ）は従来の金属めっきレジスト法の
工程を示す断面図である。この方法では（Ａ）に示すよ
うに、第２図のテンティング法と同様に絶縁基材（１０
）および銅箔（１）上に銅めっき層（２）を形成し、そ
の上に感光性ドライフィルム（３）を被覆し、テンティ
ング法とは逆のパターンで回路パターンが印刷されたワ
ークフィルム（図示せず）を用いて露光形成したのち、
この感光性ドライフィルム（３）が付着す８以外の銅め
っき層（２）上に、エツチングレジストとして半田や金
などの金属めっき（５）を施す０次に（Ｂ）に示すよう
に、感光性ドライフィルム（３）を除去した後、（Ｃ）
に示すように、エツチングを行って回路パターンを形成
する。この時スルーホール（９）における銅めっき層（
２）壁に対するエツチング時の保護は、銅めっき層（２
）壁土に施された金属めっき（５）によって行われる。FIGS. 3A to 3C are cross-sectional views showing the steps of the conventional metal plating resist method. In this method, as shown in (A), an insulating base material (10
) and a copper plating layer (2) formed on the copper foil (1), covered with a photosensitive dry film (3), and a work film in which a circuit pattern is printed in a pattern opposite to the tenting method. After exposure and formation using (not shown),
On the copper plating layer (2) other than 8 to which this photosensitive dry film (3) is attached, metal plating (5) such as solder or gold is applied as an etching resist. After removing the dry film (3), (C)
Etching is performed to form a circuit pattern as shown in FIG. At this time, the copper plating layer (
2) The wall is protected by a copper plating layer (2) during etching.
) This is done by metal plating (5) applied to the wall soil.
第４図（Ａ）〜（Ｃ）は従来の有機レジスト法の工程を
示す断面図である。この方法では第３図の金属めっきレ
ジスト法と同様に感光性ドライフィルム（３）上に回路
パターンと逆のパターンが印刷されたワークフィルム（
図示せず）を用いて逆パターンを形成したのち、第３図
の金属めっき（５）の代わりにキレート状の有機保護膜
（６）を施す、（Ｂ）に示すように、感光性ドライフィ
ルム（３）を除去した後、（Ｃ）に示すように、有機保
護膜（６）をエツチングレジストとしてエツチングを行
い１回路パターンを形成する。この時スルーホール（９
）部における銅めっき層（２）壁に対するエツチング保
護は、壁部に付着した有機保護膜（６）によって行われ
る。FIGS. 4A to 4C are cross-sectional views showing steps of a conventional organic resist method. Similar to the metal plating resist method shown in Figure 3, this method uses a work film (3) on which a pattern opposite to the circuit pattern is printed on a photosensitive dry film (3).
After forming a reverse pattern using a photosensitive dry film (not shown), a chelate-like organic protective film (6) is applied in place of the metal plating (5) in Fig. 3, as shown in (B). After removing (3), as shown in (C), etching is performed using the organic protective film (6) as an etching resist to form one circuit pattern. At this time, the through hole (9
Etching protection for the wall of the copper plating layer (2) in ) is provided by an organic protective film (6) attached to the wall.
従来の印刷配線板の製造方法においては、エツチングレ
ジストを以上のように施すことにより印刷配線板を製造
するが、第２図のテンティング法ではスルーホール（９
）を覆っているテンティングフィルム（４）が剥離し、
内部にエツチング液が浸透してスルーホール（９）にお
ける銅めっき壁を侵すという問題点があった。−力筒３
図の金属めっきレジスト法では、電気めっきによりスル
ーホール（９）内の銅めっき層（２）上に金属めっき（
５）を施すため、印刷配線板の板厚が厚くなると、スル
ーホール（９）の中央部に電気めっきがつきにくくて薄
くなるため、充分なエツチングレジストとして作用しな
くなるという問題点があった。またはんだめっき時には
反応ガスが発生し、スルーホール（９）の穴径が小さい
場合には発生したガスが滞留してガス抜けが悪くなり、
金属めっき（５）が施されないという問題点があった。In the conventional manufacturing method of printed wiring boards, printed wiring boards are manufactured by applying an etching resist as described above, but in the tenting method shown in Fig. 2, through holes (9
) The tenting film (4) that covers it peels off,
There was a problem in that the etching solution penetrated inside and corroded the copper-plated wall in the through hole (9). -Rikitsutsu 3
In the metal plating resist method shown in the figure, metal plating (
5), when the thickness of the printed wiring board increases, the electroplating becomes difficult to adhere to the central part of the through hole (9) and becomes thinner, resulting in a problem that it no longer functions as a sufficient etching resist. Reactive gas is generated during solder plating, and if the diameter of the through hole (9) is small, the generated gas will remain and the gas release will be difficult.
There was a problem that metal plating (5) was not applied.
第４図の有機レジスト法では銅箔（１）の形成、銅めっ
き層（２）表面の前処理、および後処理において有機保
護膜（６）を塗布することによって均一に形成するには
工夫を要し、また特殊な有機剤を必要とするという問題
点があった。さらに以上の各従来法では回路パターンの
形成にはワークフィルムを使用しているが、ワークフィ
ルムはポリエチレンテレフタレート（ＰＥＴ）でできて
いて温度、湿度により伸縮するため、ワークフィルムを
用いて回路パターンを露光形成する場合には、温湿度の
コントロールが重要であって、温湿度をコントロールし
た部屋でワークフィルムの作成、保管および露光作業を
行う必要があり、温湿度をコントロールした部屋が必要
となり、設備等に多額の費用がかかるとともに、ワーク
フィルムの伸縮は高密度印刷配線板の回路パターン形成
に大きな障害となるなどの問題点がある。In the organic resist method shown in Fig. 4, in order to form the copper foil (1) uniformly by applying an organic protective film (6) during the pre-treatment and post-treatment of the surface of the copper plating layer (2), it is necessary to form the copper foil (1) uniformly. However, there was a problem in that it required a special organic agent. Furthermore, in each of the above conventional methods, a workpiece film is used to form the circuit pattern, but since the workpiece film is made of polyethylene terephthalate (PET) and expands and contracts depending on temperature and humidity, the workpiece film is used to form the circuit pattern. When forming by exposure, it is important to control the temperature and humidity, and it is necessary to create, store, and expose the workpiece film in a room with controlled temperature and humidity. In addition to requiring a large amount of cost, the expansion and contraction of the work film poses a major obstacle to the formation of circuit patterns on high-density printed wiring boards.
この発明は上記の問題点を解消するためになされたもの
で、スルーホールにおける銅めっき壁に直接作用し、簡
単な前処理によって、アルカリエツチングレジスト液に
対するエツチングレジスト膜を形成できる印刷配線板の
製造方法を提供することを目的とするものである。This invention was made to solve the above-mentioned problems, and it produces a printed wiring board that acts directly on the copper-plated walls of through holes and can form an etching resist film against alkaline etching resist solution through simple pretreatment. The purpose is to provide a method.
この発明に係る印刷配線板の製造方法は、印刷配線板用
銅張積層板の表面にエツチングによる回路パターンを形
成するに際して、電着塗装によって感光性フォトレジス
ト膜を形成し、パターン形成後熱キュアーを行って、そ
のキュアーされた膜をエツチングレジスト膜として利用
する方法である。In the method for manufacturing a printed wiring board according to the present invention, when forming a circuit pattern by etching on the surface of a copper-clad laminate for a printed wiring board, a photosensitive photoresist film is formed by electrodeposition coating, and after pattern formation, heat curing is performed. In this method, the cured film is used as an etching resist film.
この発明に係る印刷配線板の製造方法においては、エツ
チングレジスト膜の形成方法は、電着塗装により銅張積
層板の表面上およびスルーホールめっき上に必要な回路
パターンと同一パターンの感光性フォトレジスト膜を形
成した後、熱キュアーを施すことによってエツチングレ
ジスト液より保護し、皮膜のない部分をエツチングによ
り除去することで、必要なパターンを得ようとするもの
である。In the method for manufacturing a printed wiring board according to the present invention, the etching resist film is formed by applying a photosensitive photoresist film with the same pattern as the circuit pattern required on the surface of the copper-clad laminate and on the through-hole plating by electrodeposition coating. After the film is formed, it is protected from the etching resist solution by heat curing, and the parts without the film are removed by etching to obtain the desired pattern.
第１図（Ａ）〜（Ｆ）はこの発明の一実施例による印刷
配線板の製造工程を示す断面図であり２図において、（
１）、（２）、（９）、（１０）および（１１）は従来
例において説明したものと同じものである。（８）はエ
ツチングレジスト膜となる電着塗装による感光性フォト
レジスト膜である。FIGS. 1A to 1F are cross-sectional views showing the manufacturing process of a printed wiring board according to an embodiment of the present invention.
1), (2), (9), (10) and (11) are the same as those explained in the conventional example. (8) is a photosensitive photoresist film coated by electrodeposition, which becomes an etching resist film.
次に、この発明による印刷配線板の製造方法を説明する
。まず、第１図（Ａ）に示す絶縁基材（１０）および銅
箔（１）の表面に、無電解銅めっきにより（Ｂ）に示す
ように、銅めっき層（２）を施す。次に（Ｃ）に示すよ
うに、銅めっき層（２）の表面およびスルーホール（９
）の壁面に対して、アニオン型電着塗料により電着塗装
を行って感光性フォトレジスト膜（８）を形成する。そ
してマスクフィルムを用いて露光現像を行って、感光性
フォトレジスト膜（８）上に必要な回路パターンを露光
形成した後、（Ｄ）に示すように、感光性フォトレジス
ト膜（８）の不必要部分を炭化ナトリウム水溶液にて除
去する。Next, a method for manufacturing a printed wiring board according to the present invention will be explained. First, a copper plating layer (2) is applied to the surfaces of the insulating base material (10) and copper foil (1) shown in FIG. 1(A) by electroless copper plating as shown in FIG. 1(B). Next, as shown in (C), the surface of the copper plating layer (2) and the through hole (9
) A photosensitive photoresist film (8) is formed by electrodeposition coating using an anionic electrodeposition paint. After exposure and development is performed using a mask film to form a necessary circuit pattern on the photosensitive photoresist film (8), as shown in (D), the photosensitive photoresist film (8) is exposed and developed. The necessary portion is removed with an aqueous sodium carbide solution.
次に１３０℃、３０分間程度の熱キュアーを実施するこ
とにより、この感光性フォトレジスト膜（８）をアンモ
ニアを含むアルカリエツチングレジスト液に対するエツ
チングレジスト膜として作用させ。Next, thermal curing is carried out at 130° C. for about 30 minutes, so that this photosensitive photoresist film (8) acts as an etching resist film for an ammonia-containing alkaline etching resist solution.
（Ｅ）に示すようにアルカリエツチングレジスト液によ
り銅箔（１）および銅めっき層（２）に対するエツチン
グを行い、必要なパターンを形成する。その後（Ｆ）に
示すように、感光性フォトレジスト膜（８）を水酸化ナ
トリウム溶液等により溶解して除去し。As shown in (E), the copper foil (1) and the copper plating layer (2) are etched using an alkaline etching resist solution to form a necessary pattern. Thereafter, as shown in (F), the photosensitive photoresist film (8) is dissolved and removed using a sodium hydroxide solution or the like.
印刷配線板（１１）を得る。A printed wiring board (11) is obtained.
なお、上記実施例によるアルカリエツチングレジスト液
に対するエツチングレジスト膜は。Incidentally, the etching resist film for the alkaline etching resist solution according to the above embodiment is as follows.
ＨｚＯｔ／ＨｔＳＯ４液に対してもエツチングレジスト
膜を得る手段として同様の効果が得られる。Similar effects can be obtained using the HzOt/HtSO4 solution as a means of obtaining an etching resist film.
また上記実施例では、テンティング法について説明した
が、半田剥し法であってもよく、上記実施例と同様の効
果を奏する。Furthermore, although the tenting method has been described in the above embodiments, a soldering method may also be used, and the same effects as in the above embodiments can be obtained.
以上のように、この発明によれば、電着塗装によって形
成した感光性フォトレジスト膜を熱キュアーによってア
ルカリエツチングレジスト液に耐え得るようにしたので
、薬剤コストが低減でき、精度の高い充分な強度のエツ
チングレジスト膜を形成でき、また従来の電着法では不
可能であった半田剥し法への適用が可能となる。As described above, according to the present invention, the photosensitive photoresist film formed by electrodeposition coating is made resistant to alkaline etching resist solution by heat curing, which reduces chemical costs and provides sufficient strength with high precision. It is possible to form an etching resist film, and it also becomes possible to apply the solder stripping method, which was impossible with conventional electrodeposition methods.
第１図（Ａ）〜（Ｆ）はこの発明の一実施例の工程を示
す断面図、第２図ないし第４図の（Ａ）〜（Ｃ）は従来
法の工程を示す断面図である。
各図中、同一符号は同一または相当部分を示し。
（１）は銅箔、（２）は銅めっき層、（８）は感光性フ
ォトレジスト膜、（９）はスルーホール、（１０）は絶
縁基材、（１１）は印刷配線板である。Figures 1 (A) to (F) are cross-sectional views showing the steps of an embodiment of the present invention, and Figures 2 to 4 (A) to (C) are cross-sectional views showing the steps of the conventional method. . In each figure, the same reference numerals indicate the same or corresponding parts. (1) is a copper foil, (2) is a copper plating layer, (8) is a photosensitive photoresist film, (9) is a through hole, (10) is an insulating base material, and (11) is a printed wiring board.
Claims (1)
よる回路パターンを形成するに際して、電着塗装によっ
て感光性フォトレジスト膜を形成し、パターン形成後熱
キュアーを行って、そのキュアーされた膜をエッチング
レジスト膜として利用することを特徴とする印刷配線板
の製造方法。(1) When forming a circuit pattern by etching on the surface of a copper-clad laminate for printed wiring boards, a photosensitive photoresist film is formed by electrodeposition coating, heat curing is performed after pattern formation, and the cured film is 1. A method for manufacturing a printed wiring board, characterized in that it is used as an etching resist film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28988287A JPH01130589A (en) | 1987-11-17 | 1987-11-17 | Manufacture of printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28988287A JPH01130589A (en) | 1987-11-17 | 1987-11-17 | Manufacture of printed wiring board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01130589A true JPH01130589A (en) | 1989-05-23 |
Family
ID=17748992
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP28988287A Pending JPH01130589A (en) | 1987-11-17 | 1987-11-17 | Manufacture of printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01130589A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008058743A (en) * | 2006-08-31 | 2008-03-13 | Digital Electronics Corp | Component setting structure |
| JP2008077435A (en) * | 2006-09-21 | 2008-04-03 | Sony Computer Entertainment Inc | Method for manufacturing electronic equipment and electronic equipment |
-
1987
- 1987-11-17 JP JP28988287A patent/JPH01130589A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008058743A (en) * | 2006-08-31 | 2008-03-13 | Digital Electronics Corp | Component setting structure |
| JP2008077435A (en) * | 2006-09-21 | 2008-04-03 | Sony Computer Entertainment Inc | Method for manufacturing electronic equipment and electronic equipment |
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