JPS56144550A - Circuit substrate - Google Patents

Circuit substrate

Info

Publication number
JPS56144550A
JPS56144550A JP4720980A JP4720980A JPS56144550A JP S56144550 A JPS56144550 A JP S56144550A JP 4720980 A JP4720980 A JP 4720980A JP 4720980 A JP4720980 A JP 4720980A JP S56144550 A JPS56144550 A JP S56144550A
Authority
JP
Japan
Prior art keywords
positioning holes
copper foil
circuit substrate
solder resist
etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4720980A
Other languages
Japanese (ja)
Inventor
Takashi Abe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP4720980A priority Critical patent/JPS56144550A/en
Publication of JPS56144550A publication Critical patent/JPS56144550A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys

Abstract

PURPOSE:To improve the dimensional accuracy of the positioning holes in a circuit substrate and intensify the mechanical strength thereof by coating the whole metal foil or frame with an etching resisting film, which is different from a photo resist, except for the IC connecting portion and the portion to connect with an external board, when a circuit pattern is photoetched. CONSTITUTION:After a photo resist 3 has been applied to a copper foil 2, a back surface coat 4 is formed. Then, an etching resisting film (solder resist) 5 is printed, and positioning holes 6 are bored. Then, exposure, development and etching are performed. Then, the back surface coat is removed, and plating is applied to complete a circuit substrate. By said constitution, the solder resist 5 prevents the side surfaces of the copper foil from being etched, maintaining the accuracy of the positioning holes 6. Accordingly, workability in the mounting process improves. In addition, the whole substrate except for the IC connecting portion is coated with the solder resist 5, and if both surfaces are printed, the strength is much larger than the case of the copper foil only, so that workability thereof improves.
JP4720980A 1980-04-10 1980-04-10 Circuit substrate Pending JPS56144550A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4720980A JPS56144550A (en) 1980-04-10 1980-04-10 Circuit substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4720980A JPS56144550A (en) 1980-04-10 1980-04-10 Circuit substrate

Publications (1)

Publication Number Publication Date
JPS56144550A true JPS56144550A (en) 1981-11-10

Family

ID=12768755

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4720980A Pending JPS56144550A (en) 1980-04-10 1980-04-10 Circuit substrate

Country Status (1)

Country Link
JP (1) JPS56144550A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016025303A (en) * 2014-07-24 2016-02-08 大日本印刷株式会社 Multifaceted body of lead frame, multifaceted body of lead frame with resin, and multifaceted body of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016025303A (en) * 2014-07-24 2016-02-08 大日本印刷株式会社 Multifaceted body of lead frame, multifaceted body of lead frame with resin, and multifaceted body of semiconductor device

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