JPH01120044A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH01120044A JPH01120044A JP27770987A JP27770987A JPH01120044A JP H01120044 A JPH01120044 A JP H01120044A JP 27770987 A JP27770987 A JP 27770987A JP 27770987 A JP27770987 A JP 27770987A JP H01120044 A JPH01120044 A JP H01120044A
- Authority
- JP
- Japan
- Prior art keywords
- resin sealing
- terminals
- fixing sheet
- semiconductor device
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 22
- 239000011347 resin Substances 0.000 claims abstract description 13
- 229920005989 resin Polymers 0.000 claims abstract description 13
- 238000007789 sealing Methods 0.000 claims description 10
- 238000000034 method Methods 0.000 abstract description 5
- 238000005476 soldering Methods 0.000 abstract description 4
- 239000003566 sealing material Substances 0.000 abstract 3
- 241000283216 Phocidae Species 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 3
- 238000003909 pattern recognition Methods 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000009408 flooring Methods 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
〔発明の概要〕
本発明は、樹脂封止型半導体装置、特にフラットパッケ
ージニオいて、素子固着板に連なる帯状部材を樹脂封止
部材の外側に張り出させ、且、少なくても2つ以上の位
置決め用の穴を設ける事により、パッケージを高精度の
位置決めができる様にしたものである。[Detailed Description of the Invention] [Industrial Field of Application] [Summary of the Invention] The present invention relates to a resin-sealed semiconductor device, particularly a flat package, in which a strip member connected to an element fixing plate is placed outside the resin-sealed member. The package can be positioned with high accuracy by protruding from the package and providing at least two or more positioning holes.
従来のフラットパッケージの構造は第2図に示す如く、
樹脂封止部材21より四方に端子22が広っていた。パ
ッケージをプリント基板へハンダ付する時に、端子とハ
ンダ付されるプリント基板のパターンとを位置合わせす
る方法としては、樹脂封止部のコーナーを位置決圧23
で位置決めした後プリント基板に搭載していた。あるい
は、端子位置を機械的にパターン認識し、搭α時にズレ
量を補正していた。The structure of a conventional flat package is shown in Figure 2.
The terminals 22 were wider than the resin sealing member 21 in all directions. When soldering a package to a printed circuit board, a method of aligning the terminals and the pattern of the printed circuit board to be soldered is to apply positioning pressure 23 to the corner of the resin sealing part.
After positioning, it was mounted on a printed circuit board. Alternatively, the terminal positions were mechanically pattern recognized and the amount of deviation was corrected during installation.
しかし、前述の従来技術の内、樹脂封止部の、コーナー
を位置浅型で位置決する方法は、樹脂封止部と端子が相
対的なズレがある為、端子が微細ピッチになるに従がい
、接続の歩留り、信頼性が低下した。However, among the conventional techniques mentioned above, the method of positioning the corner of the resin sealing part using a shallow type has a relative misalignment between the resin sealing part and the terminal, so the terminals tend to have a finer pitch. , connection yield and reliability decreased.
又、端子位置をパターン認識する方法は、搭載機が非常
に高価になり、且パターン認識に時間を要し、槻械のサ
イクルタイムが低下した。In addition, the method of pattern recognition of terminal positions requires a very expensive machine and requires time for pattern recognition, reducing the cycle time of the machine.
そこで、本発明はこの様な間通を解決するもので、その
目的とするところは、フラットパッケージをプリント基
板にハンダ付する時に、端子とハング付するプリント基
板のパターンとの位置合わせする手段を安価で提供する
事にある。Therefore, the present invention is intended to solve this problem, and its purpose is to provide a means for aligning the terminals with the pattern of the printed circuit board to be hung when soldering the flat package to the printed circuit board. The purpose is to provide it at a low price.
C問題点を解決するための手段〕
本発明の半導体装置は、素子固着板に連なる帯状部材は
、樹脂封止部材の外側で幅が広がり、且この部分に少な
くても2つ以上の穴を育し、この穴は、プレス加工、あ
るいはエツチング加工等端子、部の形状加工と同一方法
で加工された事を特徴とする。Means for Solving Problem C] In the semiconductor device of the present invention, the band-like member connected to the element fixing plate is widened on the outside of the resin sealing member, and at least two or more holes are formed in this part. This hole is characterized by being processed by the same method as the shape of the terminal, such as press processing or etching.
〔実施例〕
等1図は、本発明の実施例における平面図で、樹脂封止
部材11の四辺より端子12が4出されている。[Embodiment] Figure 1 is a plan view of an embodiment of the present invention, in which four terminals 12 are protruded from the four sides of a resin sealing member 11.
素子固着板に連なる帯状部材13は幅が広がっている部
分14を有し、少なくても2つ以上のパッケージの位置
決め用の穴15がおいている。The strip member 13 connected to the element fixing plate has a widened portion 14, and has at least two or more holes 15 for positioning the packages.
第3図はミニフララフトパッケージに応用した例であり
、31は樹脂封止部材、32は端子、34は帯状部材の
広がり、35は位置決め用の穴である。FIG. 3 shows an example in which the present invention is applied to a mini flat raft package, in which 31 is a resin sealing member, 32 is a terminal, 34 is an extension of a band-shaped member, and 35 is a hole for positioning.
第4図は本発明の半導体装置41をプリント基板42に
搭載している図である。バット43で真空吸着された半
導体装置は、位置決め穴44に位置決めピン45が入り
位置決めされている為、端子46とパターン47の間に
ズレは生じない。FIG. 4 is a diagram showing a semiconductor device 41 of the present invention mounted on a printed circuit board 42. Since the semiconductor device vacuum-adsorbed by the bat 43 is positioned with the positioning pin 45 inserted into the positioning hole 44, no misalignment occurs between the terminal 46 and the pattern 47.
以上に述べた様に本発明によれば、帯状部材の広がり部
にある位置決め用の穴で半導体装置を位置決めする事に
より、ハンダ付時、端子と、プリント基板のパターンを
容易に合わせる事ができ、接続の歩留り、信超性を向上
させる事ができる。As described above, according to the present invention, by positioning the semiconductor device using the positioning hole in the widening part of the band-shaped member, it is possible to easily match the terminal and the pattern of the printed circuit board during soldering. , connection yield and reliability can be improved.
第1図は本発明の半導体装置を示す平面図。
第2図は従来の半導体装置を示す平面図。
第3図は本発明の半導体R’ Rの他の実施例を示す図
。
第4図は、本発明の半導体装置の実施例を示す図。
11・・・樹脂封止部材
12・・・端子
14・・・帯状部材床がり部
15・・・位置決め用穴
42・・・プリント基板
45・・・位置決めピン
46・・・端子
47・・・バターンFIG. 1 is a plan view showing a semiconductor device of the present invention. FIG. 2 is a plan view showing a conventional semiconductor device. FIG. 3 is a diagram showing another embodiment of the semiconductor R'R of the present invention. FIG. 4 is a diagram showing an embodiment of the semiconductor device of the present invention. 11... Resin sealing member 12... Terminal 14... Band-shaped member flooring portion 15... Positioning hole 42... Printed circuit board 45... Positioning pin 46... Terminal 47... Bataan
Claims (1)
着する素子固着板と 該素子固着板に連なる帯状部材と 該素子固着板近傍に先端部を有し 該先端部に前記半導体素子の電極が電気的に接続された
複数の端子と 前記半導体素子及び前記素子固着板を封止し外形が概略
四辺形で前記複数の端子が4つの辺から導出される樹脂
封止部材とを有する半導体装置において 前記帯状部材は、前記樹脂封止部材の外側で幅が広がり
、且この部分に少なくても2つ以上の穴があいている事
を特徴とする半導体装置。[Scope of Claims] A semiconductor element having a large number of electrodes, an element fixing plate for fixing the semiconductor element, a band-like member continuous to the element fixing plate, and a tip part in the vicinity of the element fixing plate; a resin sealing member that seals a plurality of terminals to which electrodes of a semiconductor element are electrically connected, the semiconductor element and the element fixing plate, and has an approximately quadrilateral outer shape and the plurality of terminals are led out from four sides; 2. A semiconductor device having a semiconductor device characterized in that the width of the band member increases on the outside of the resin sealing member, and at least two or more holes are formed in this portion.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP27770987A JPH01120044A (en) | 1987-11-02 | 1987-11-02 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP27770987A JPH01120044A (en) | 1987-11-02 | 1987-11-02 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01120044A true JPH01120044A (en) | 1989-05-12 |
Family
ID=17587221
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP27770987A Pending JPH01120044A (en) | 1987-11-02 | 1987-11-02 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01120044A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5643835A (en) * | 1992-12-18 | 1997-07-01 | Lsi Logic Corporation | Process for manufacturing and mounting a semiconductor device leadframe having alignment tabs |
-
1987
- 1987-11-02 JP JP27770987A patent/JPH01120044A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5643835A (en) * | 1992-12-18 | 1997-07-01 | Lsi Logic Corporation | Process for manufacturing and mounting a semiconductor device leadframe having alignment tabs |
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