JPH01116479U - - Google Patents
Info
- Publication number
- JPH01116479U JPH01116479U JP1117688U JP1117688U JPH01116479U JP H01116479 U JPH01116479 U JP H01116479U JP 1117688 U JP1117688 U JP 1117688U JP 1117688 U JP1117688 U JP 1117688U JP H01116479 U JPH01116479 U JP H01116479U
- Authority
- JP
- Japan
- Prior art keywords
- printed circuit
- circuit board
- utility
- model registration
- multilayer structure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000037431 insertion Effects 0.000 claims 4
- 238000003780 insertion Methods 0.000 claims 4
- 230000004323 axial length Effects 0.000 claims 2
- 239000002184 metal Substances 0.000 claims 2
- 125000006850 spacer group Chemical group 0.000 claims 2
- 239000000758 substrate Substances 0.000 claims 2
- 239000012790 adhesive layer Substances 0.000 claims 1
- 239000010410 layer Substances 0.000 claims 1
- 229920003002 synthetic resin Polymers 0.000 claims 1
- 239000000057 synthetic resin Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
Description
第1図は本考案の一実施例を示す断面図、第2
図及び第3図は本考案に係る連結ピンとしてのリ
ードピンの正面断面図及び側面断面図、第4図は
本考案における多層化加工の完了後の状態を示す
正面断面図、第5図及び第6図は従来の多層化加
工を説明する各層図及び積層断面図である。
1,2…プリント基板、4…スルーホール、5
…連結ピン(リードピン)、6…プリントパター
ン、51…ヘツド、52…膨出部。
Fig. 1 is a sectional view showing one embodiment of the present invention;
3 and 3 are a front sectional view and a side sectional view of a lead pin as a connecting pin according to the present invention, FIG. 4 is a front sectional view showing the state after completion of multilayer processing in the present invention, and FIGS. FIG. 6 is a diagram of each layer and a sectional view of the laminated layers for explaining conventional multilayer processing. 1, 2...Printed circuit board, 4...Through hole, 5
...Connecting pin (lead pin), 6...Print pattern, 51...Head, 52...Bulging portion.
Claims (1)
合せることにより、各プリント基板に設けられて
いるスルーホールを直線状に連通させて挿通孔を
形成し、外周面に突出部を有する硬質の連結ピン
を前記挿通孔に圧入して、前記突出部をスルーホ
ールの金属層に食い込ませることにより、各プリ
ント基板を多層に連結したことを特徴とするプリ
ント基板の多層構造体。 (2) 実用新案登録請求の範囲第(1)項記載におい
て、前記連結ピンが金属製のリードピンであるこ
とを特徴とするプリント基板の多層構造体。 (3) 実用新案登録請求の範囲第(1)項または第(2
)項記載において、連結ピンの外周部とプリント
基板のランド部との間が半田付けされていること
を特徴とするプリント基板の多層構造体。 (4) 実用新案登録請求の範囲第(1)項記載におい
て、重ね合されたプリント基板の間に接着剤層が
形成されていることを特徴とするプリント基板の
多層構造体。 (5) 実用新案登録請求の範囲第(1)項または第(2
)項記載において、前記突出部は前記連結ピンの
一部を押し潰して形成され、その断面形状が小判
形を成していることを特徴とするプリント基板の
多層構造体。 (6) 実用新案登録請求の範囲第(1)項記載におい
て、前記突出部の軸方向長さが前記挿通孔の軸方
向長さより短く、その突出部が挿通孔内に納めら
れていることを特徴とするプリント基板の多層構
造体。 (7) 実用新案登録請求の範囲第(1)項または第(2
)項記載において、前記連結ピンの一端に軸方向
と直交する方向に延びたヘツド部が設けられ、そ
のヘツド部がプリント基板のランド部に当接して
いることを特徴とするプリント基板の多層構造体
。 (8) 実用新案登録請求の範囲第(1)項記載におい
て、前記複数のプリント基板とともに導電パター
ンを設けないスペーサ基板が重ね合されているこ
とを特徴とするプリント基板の多層構造体。 (9) 実用新案登録請求の範囲第(8)項記載におい
て、前記スペーサ基板の機械強度がプリント基板
の強度よりも大であることを特徴とするプリント
基板の多層構造体。[Scope of Claim for Utility Model Registration] (1) By overlapping multiple synthetic resin printed circuit boards, the through holes provided in each printed circuit board are connected in a straight line to form an insertion hole, and the outer periphery is A printed circuit board characterized in that each printed circuit board is connected in multiple layers by press-fitting a hard connecting pin having a protrusion on the surface into the insertion hole and causing the protrusion to bite into the metal layer of the through hole. Multilayer structure. (2) The multilayer structure of a printed circuit board according to claim (1) of the utility model registration, characterized in that the connecting pin is a lead pin made of metal. (3) Scope of claims for utility model registration, paragraph (1) or (2)
3.) The multilayer structure of a printed circuit board according to item 1, wherein the outer periphery of the connecting pin and the land of the printed circuit board are soldered. (4) The multilayer structure of printed circuit boards as described in claim (1) of the utility model registration, characterized in that an adhesive layer is formed between the stacked printed circuit boards. (5) Scope of claims for utility model registration, paragraph (1) or (2)
2.) The multilayer structure of a printed circuit board according to item 1, wherein the protrusion is formed by crushing a part of the connection pin, and has an oval cross-sectional shape. (6) In claim (1) of the utility model registration, the axial length of the protrusion is shorter than the axial length of the insertion hole, and the protrusion is housed in the insertion hole. Features a multilayer printed circuit board structure. (7) Scope of claims for utility model registration, paragraph (1) or (2)
In the multilayer structure of the printed circuit board according to item (), one end of the connecting pin is provided with a head portion extending in a direction perpendicular to the axial direction, and the head portion is in contact with a land portion of the printed circuit board. body. (8) The multilayer structure of a printed circuit board as set forth in claim (1) of the utility model registration, characterized in that a spacer substrate without a conductive pattern is superimposed with the plurality of printed circuit boards. (9) The multilayer structure of a printed circuit board according to claim (8) of the utility model registration, characterized in that the mechanical strength of the spacer substrate is greater than the strength of the printed circuit board.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1117688U JPH01116479U (en) | 1988-02-01 | 1988-02-01 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1117688U JPH01116479U (en) | 1988-02-01 | 1988-02-01 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01116479U true JPH01116479U (en) | 1989-08-07 |
Family
ID=31219498
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1117688U Pending JPH01116479U (en) | 1988-02-01 | 1988-02-01 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01116479U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05259648A (en) * | 1992-01-22 | 1993-10-08 | Internatl Business Mach Corp <Ibm> | Electronic circuit package and manufacture therefor |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS49124559A (en) * | 1973-04-02 | 1974-11-28 | ||
JPS50140857A (en) * | 1974-04-30 | 1975-11-12 | ||
JPS534855A (en) * | 1976-05-27 | 1978-01-17 | Fujitsu Ltd | Multiprint circuit board |
JPS5379276A (en) * | 1976-12-23 | 1978-07-13 | Fujitsu Ltd | Method of laminating multilayer printed board |
JPS55157295A (en) * | 1979-05-28 | 1980-12-06 | Iriso Denshi Kogyo Kk | Method of mounting pin in printed circuit board |
JPS60101998A (en) * | 1983-11-07 | 1985-06-06 | イビデン株式会社 | Plug-in package and method of producing same |
JPS617692A (en) * | 1984-06-21 | 1986-01-14 | イビデン株式会社 | Method of securing conductor pin and printed circuit board secured with conductor pin |
JPS62204592A (en) * | 1986-03-05 | 1987-09-09 | 株式会社日立製作所 | Press-fit pin injection into printed wiring board |
-
1988
- 1988-02-01 JP JP1117688U patent/JPH01116479U/ja active Pending
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS49124559A (en) * | 1973-04-02 | 1974-11-28 | ||
JPS50140857A (en) * | 1974-04-30 | 1975-11-12 | ||
JPS534855A (en) * | 1976-05-27 | 1978-01-17 | Fujitsu Ltd | Multiprint circuit board |
JPS5379276A (en) * | 1976-12-23 | 1978-07-13 | Fujitsu Ltd | Method of laminating multilayer printed board |
JPS55157295A (en) * | 1979-05-28 | 1980-12-06 | Iriso Denshi Kogyo Kk | Method of mounting pin in printed circuit board |
JPS60101998A (en) * | 1983-11-07 | 1985-06-06 | イビデン株式会社 | Plug-in package and method of producing same |
JPS617692A (en) * | 1984-06-21 | 1986-01-14 | イビデン株式会社 | Method of securing conductor pin and printed circuit board secured with conductor pin |
JPS62204592A (en) * | 1986-03-05 | 1987-09-09 | 株式会社日立製作所 | Press-fit pin injection into printed wiring board |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05259648A (en) * | 1992-01-22 | 1993-10-08 | Internatl Business Mach Corp <Ibm> | Electronic circuit package and manufacture therefor |