JP7804753B2 - セラミックス基板、接合体、半導体装置、セラミックス基板の製造方法、およびセラミックス回路基板の製造方法 - Google Patents

セラミックス基板、接合体、半導体装置、セラミックス基板の製造方法、およびセラミックス回路基板の製造方法

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Publication number
JP7804753B2
JP7804753B2 JP2024512711A JP2024512711A JP7804753B2 JP 7804753 B2 JP7804753 B2 JP 7804753B2 JP 2024512711 A JP2024512711 A JP 2024512711A JP 2024512711 A JP2024512711 A JP 2024512711A JP 7804753 B2 JP7804753 B2 JP 7804753B2
Authority
JP
Japan
Prior art keywords
opening
cutout portion
silicon nitride
cutout
shape
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2024512711A
Other languages
English (en)
Japanese (ja)
Other versions
JPWO2023190738A5 (https=
JPWO2023190738A1 (https=
Inventor
健太郎 岩井
亮人 佐々木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Niterra Materials Co Ltd
Original Assignee
Toshiba Materials Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Materials Co Ltd filed Critical Toshiba Materials Co Ltd
Publication of JPWO2023190738A1 publication Critical patent/JPWO2023190738A1/ja
Publication of JPWO2023190738A5 publication Critical patent/JPWO2023190738A5/ja
Priority to JP2025167502A priority Critical patent/JP2025182048A/ja
Application granted granted Critical
Publication of JP7804753B2 publication Critical patent/JP7804753B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09145—Edge details
    • H05K2201/09163—Slotted edge
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09854—Hole or via having special cross-section, e.g. elliptical
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10409—Screws
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/10—Using electric, magnetic and electromagnetic fields; Using laser light
    • H05K2203/107—Using laser light
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
    • H05K3/1283—After-treatment of the printed patterns, e.g. sintering or curing methods
    • H05K3/1291—Firing or sintering at relative high temperatures for patterns on inorganic boards, e.g. co-firing of circuits on green ceramic sheets
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/25—Arrangements for cooling characterised by their materials
    • H10W40/255—Arrangements for cooling characterised by their materials having a laminate or multilayered structure, e.g. direct bond copper [DBC] ceramic substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Structure Of Printed Boards (AREA)
JP2024512711A 2022-03-30 2023-03-29 セラミックス基板、接合体、半導体装置、セラミックス基板の製造方法、およびセラミックス回路基板の製造方法 Active JP7804753B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2025167502A JP2025182048A (ja) 2022-03-30 2025-10-03 半導体モジュールの製造方法及び窒化珪素基板

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2022055240 2022-03-30
JP2022055240 2022-03-30
PCT/JP2023/012928 WO2023190738A1 (ja) 2022-03-30 2023-03-29 セラミックス基板、接合体、半導体装置、セラミックス基板の製造方法、およびセラミックス回路基板の製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2025167502A Division JP2025182048A (ja) 2022-03-30 2025-10-03 半導体モジュールの製造方法及び窒化珪素基板

Publications (3)

Publication Number Publication Date
JPWO2023190738A1 JPWO2023190738A1 (https=) 2023-10-05
JPWO2023190738A5 JPWO2023190738A5 (https=) 2024-08-01
JP7804753B2 true JP7804753B2 (ja) 2026-01-22

Family

ID=88202707

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2024512711A Active JP7804753B2 (ja) 2022-03-30 2023-03-29 セラミックス基板、接合体、半導体装置、セラミックス基板の製造方法、およびセラミックス回路基板の製造方法
JP2025167502A Pending JP2025182048A (ja) 2022-03-30 2025-10-03 半導体モジュールの製造方法及び窒化珪素基板

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2025167502A Pending JP2025182048A (ja) 2022-03-30 2025-10-03 半導体モジュールの製造方法及び窒化珪素基板

Country Status (5)

Country Link
US (1) US20240324105A1 (https=)
EP (1) EP4503114A4 (https=)
JP (2) JP7804753B2 (https=)
CN (1) CN118414697A (https=)
WO (1) WO2023190738A1 (https=)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002176119A (ja) 2000-12-06 2002-06-21 Toshiba Corp 窒化珪素基板およびそれを用いた窒化珪素回路基板並びにその製造方法
JP2005159083A (ja) 2003-11-27 2005-06-16 Kyocera Corp 多数個取り配線基板
JP2006203108A (ja) 2005-01-24 2006-08-03 Hitachi Metals Ltd セラミックス回路基板の接合構造およびパワーモジュール
WO2011004798A1 (ja) 2009-07-06 2011-01-13 株式会社 東芝 素子搭載用セラミックス基板、ｌｅｄ搭載用セラミックス基板、ｌｅｄランプ及びヘッドライト並びに電子部品
JP2015065431A (ja) 2013-08-30 2015-04-09 日亜化学工業株式会社 発光素子搭載用基板及び該基板の固定方法
JP2020088245A (ja) 2018-11-28 2020-06-04 京セラ株式会社 配線基板、電子装置および電子モジュール
JP2021185611A (ja) 2015-03-31 2021-12-09 日立金属株式会社 窒化珪素系セラミックス集合基板

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2555394B1 (fr) * 1983-11-22 1986-03-28 Eurofarad Support pour composant rapide, notamment composant hyperfrequence, a elements de decouplage incorpores
JP4078042B2 (ja) * 2001-06-12 2008-04-23 ローム株式会社 複数の素子を有するチップ型電子部品の製造方法
JP2005056933A (ja) 2003-08-06 2005-03-03 Ngk Spark Plug Co Ltd 放熱部材、回路基板および半導体装置
JP5379465B2 (ja) * 2008-12-17 2013-12-25 パナソニック株式会社 発光装置

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002176119A (ja) 2000-12-06 2002-06-21 Toshiba Corp 窒化珪素基板およびそれを用いた窒化珪素回路基板並びにその製造方法
JP2005159083A (ja) 2003-11-27 2005-06-16 Kyocera Corp 多数個取り配線基板
JP2006203108A (ja) 2005-01-24 2006-08-03 Hitachi Metals Ltd セラミックス回路基板の接合構造およびパワーモジュール
WO2011004798A1 (ja) 2009-07-06 2011-01-13 株式会社 東芝 素子搭載用セラミックス基板、ｌｅｄ搭載用セラミックス基板、ｌｅｄランプ及びヘッドライト並びに電子部品
JP2015065431A (ja) 2013-08-30 2015-04-09 日亜化学工業株式会社 発光素子搭載用基板及び該基板の固定方法
JP2021185611A (ja) 2015-03-31 2021-12-09 日立金属株式会社 窒化珪素系セラミックス集合基板
JP2020088245A (ja) 2018-11-28 2020-06-04 京セラ株式会社 配線基板、電子装置および電子モジュール

Also Published As

Publication number Publication date
EP4503114A4 (en) 2026-03-25
JP2025182048A (ja) 2025-12-11
US20240324105A1 (en) 2024-09-26
WO2023190738A1 (ja) 2023-10-05
CN118414697A (zh) 2024-07-30
JPWO2023190738A1 (https=) 2023-10-05
EP4503114A1 (en) 2025-02-05

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