JP7630430B2 - 半導体装置、電子機器 - Google Patents

半導体装置、電子機器 Download PDF

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Publication number
JP7630430B2
JP7630430B2 JP2021541742A JP2021541742A JP7630430B2 JP 7630430 B2 JP7630430 B2 JP 7630430B2 JP 2021541742 A JP2021541742 A JP 2021541742A JP 2021541742 A JP2021541742 A JP 2021541742A JP 7630430 B2 JP7630430 B2 JP 7630430B2
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Japan
Prior art keywords
transistor
wiring
region
semiconductor
memory
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JP2021541742A
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English (en)
Japanese (ja)
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JPWO2021038363A1 (https=
JPWO2021038363A5 (https=
Inventor
肇 木村
達也 大貫
寛司 國武
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Publication of JPWO2021038363A1 publication Critical patent/JPWO2021038363A1/ja
Publication of JPWO2021038363A5 publication Critical patent/JPWO2021038363A5/ja
Priority to JP2025016608A priority Critical patent/JP2025069338A/ja
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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/405Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4097Bit-line organisation, e.g. bit-line layout, folded bit lines
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/16Multiple access memory array, e.g. addressing one storage element via at least two independent addressing line groups
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/70Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • H10D86/423Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
JP2021541742A 2019-08-29 2020-08-17 半導体装置、電子機器 Active JP7630430B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2025016608A JP2025069338A (ja) 2019-08-29 2025-02-04 半導体装置

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP2019156245 2019-08-29
JP2019156245 2019-08-29
JP2019220154 2019-12-05
JP2019220154 2019-12-05
PCT/IB2020/057716 WO2021038363A1 (ja) 2019-08-29 2020-08-17 半導体装置、電子機器

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2025016608A Division JP2025069338A (ja) 2019-08-29 2025-02-04 半導体装置

Publications (3)

Publication Number Publication Date
JPWO2021038363A1 JPWO2021038363A1 (https=) 2021-03-04
JPWO2021038363A5 JPWO2021038363A5 (https=) 2023-08-07
JP7630430B2 true JP7630430B2 (ja) 2025-02-17

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JP2021541742A Active JP7630430B2 (ja) 2019-08-29 2020-08-17 半導体装置、電子機器
JP2025016608A Pending JP2025069338A (ja) 2019-08-29 2025-02-04 半導体装置

Family Applications After (1)

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JP2025016608A Pending JP2025069338A (ja) 2019-08-29 2025-02-04 半導体装置

Country Status (3)

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US (1) US20220328487A1 (https=)
JP (2) JP7630430B2 (https=)
WO (1) WO2021038363A1 (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116368602A (zh) 2020-10-02 2023-06-30 株式会社半导体能源研究所 半导体装置
KR20230106849A (ko) * 2022-01-07 2023-07-14 삼성전자주식회사 반도체 장치
CN116206643B (zh) * 2022-07-25 2024-03-15 北京超弦存储器研究院 动态随机存储单元、存储器、存储装置及读取方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017168809A (ja) 2015-10-22 2017-09-21 株式会社半導体エネルギー研究所 半導体装置、又は該半導体装置を有する記憶装置
JP2018157208A (ja) 2017-03-16 2018-10-04 東芝メモリ株式会社 半導体メモリ
JP2018206828A (ja) 2017-05-31 2018-12-27 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法
JP2019008862A (ja) 2017-06-26 2019-01-17 株式会社半導体エネルギー研究所 半導体装置、電子機器

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63121194A (ja) * 1986-11-11 1988-05-25 Hitachi Ltd 半導体記憶装置
US7710765B2 (en) * 2007-09-27 2010-05-04 Micron Technology, Inc. Back gated SRAM cell
KR102480794B1 (ko) * 2009-12-28 2022-12-22 가부시키가이샤 한도오따이 에네루기 켄큐쇼 기억 장치와 반도체 장치
WO2011145738A1 (en) * 2010-05-20 2011-11-24 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for driving semiconductor device
US8902637B2 (en) * 2010-11-08 2014-12-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor memory device comprising inverting amplifier circuit and driving method thereof
US9998119B2 (en) * 2016-05-20 2018-06-12 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, electronic component, and electronic device
KR20180055701A (ko) * 2016-11-17 2018-05-25 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 반도체 장치의 제작 방법
US10497712B2 (en) * 2017-03-16 2019-12-03 Toshiba Memory Corporation Semiconductor memory

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017168809A (ja) 2015-10-22 2017-09-21 株式会社半導体エネルギー研究所 半導体装置、又は該半導体装置を有する記憶装置
JP2018157208A (ja) 2017-03-16 2018-10-04 東芝メモリ株式会社 半導体メモリ
JP2018206828A (ja) 2017-05-31 2018-12-27 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法
JP2019008862A (ja) 2017-06-26 2019-01-17 株式会社半導体エネルギー研究所 半導体装置、電子機器

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JPWO2021038363A1 (https=) 2021-03-04
JP2025069338A (ja) 2025-04-30
US20220328487A1 (en) 2022-10-13
WO2021038363A1 (ja) 2021-03-04

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