JP7457006B2 - 半導体装置、及び半導体装置の動作方法 - Google Patents
半導体装置、及び半導体装置の動作方法 Download PDFInfo
- Publication number
- JP7457006B2 JP7457006B2 JP2021515316A JP2021515316A JP7457006B2 JP 7457006 B2 JP7457006 B2 JP 7457006B2 JP 2021515316 A JP2021515316 A JP 2021515316A JP 2021515316 A JP2021515316 A JP 2021515316A JP 7457006 B2 JP7457006 B2 JP 7457006B2
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- wiring
- transistor
- circuit
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- insulator
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
- G11C11/405—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/565—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using capacitive charge storage elements
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5642—Sensing or reading circuits; Data output circuits
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/674—Thin-film transistors [TFT] characterised by the active materials
- H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6757—Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/68—Floating-gate IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/69—IGFETs having charge trapping gate insulators, e.g. MNOS transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D87/00—Integrated devices comprising both bulk components and either SOI or SOS components on the same substrate
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
- G11C2211/563—Multilevel memory reading aspects
- G11C2211/5634—Reference cells
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Memories (AREA)
- Thin Film Transistor (AREA)
- Dram (AREA)
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Non-Volatile Memory (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2019085084 | 2019-04-26 | ||
| JP2019085084 | 2019-04-26 | ||
| PCT/IB2020/053526 WO2020217138A2 (ja) | 2019-04-26 | 2020-04-15 | 半導体装置、及び半導体装置の動作方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JPWO2020217138A1 JPWO2020217138A1 (https=) | 2020-10-29 |
| JPWO2020217138A5 JPWO2020217138A5 (https=) | 2023-04-06 |
| JP7457006B2 true JP7457006B2 (ja) | 2024-03-27 |
Family
ID=72941602
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2021515316A Active JP7457006B2 (ja) | 2019-04-26 | 2020-04-15 | 半導体装置、及び半導体装置の動作方法 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US11984147B2 (https=) |
| JP (1) | JP7457006B2 (https=) |
| WO (1) | WO2020217138A2 (https=) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US12069846B2 (en) * | 2019-01-29 | 2024-08-20 | Semiconductor Energy Laboratory Co., Ltd. | Memory device |
| TWI842855B (zh) * | 2019-03-29 | 2024-05-21 | 日商半導體能源研究所股份有限公司 | 半導體裝置 |
| WO2023148571A1 (ja) * | 2022-02-04 | 2023-08-10 | 株式会社半導体エネルギー研究所 | 半導体装置 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2016219089A (ja) | 2015-05-14 | 2016-12-22 | 株式会社半導体エネルギー研究所 | 半導体装置、記憶装置、電子機器及び半導体装置の駆動方法 |
| WO2019003045A1 (ja) | 2017-06-27 | 2019-01-03 | 株式会社半導体エネルギー研究所 | 記憶装置 |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63149900A (ja) | 1986-12-15 | 1988-06-22 | Toshiba Corp | 半導体メモリ |
| JPH01192083A (ja) * | 1988-01-27 | 1989-08-02 | Matsushita Electric Ind Co Ltd | 半導体メモリ |
| KR101698193B1 (ko) | 2009-09-15 | 2017-01-19 | 삼성전자주식회사 | 3차원 반도체 메모리 장치 및 그 제조 방법 |
| US9177872B2 (en) | 2011-09-16 | 2015-11-03 | Micron Technology, Inc. | Memory cells, semiconductor devices, systems including such cells, and methods of fabrication |
| TWI695375B (zh) | 2014-04-10 | 2020-06-01 | 日商半導體能源研究所股份有限公司 | 記憶體裝置及半導體裝置 |
| US9634097B2 (en) | 2014-11-25 | 2017-04-25 | Sandisk Technologies Llc | 3D NAND with oxide semiconductor channel |
-
2020
- 2020-04-15 US US17/602,431 patent/US11984147B2/en active Active
- 2020-04-15 WO PCT/IB2020/053526 patent/WO2020217138A2/ja not_active Ceased
- 2020-04-15 JP JP2021515316A patent/JP7457006B2/ja active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2016219089A (ja) | 2015-05-14 | 2016-12-22 | 株式会社半導体エネルギー研究所 | 半導体装置、記憶装置、電子機器及び半導体装置の駆動方法 |
| WO2019003045A1 (ja) | 2017-06-27 | 2019-01-03 | 株式会社半導体エネルギー研究所 | 記憶装置 |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2020217138A3 (ja) | 2021-02-18 |
| WO2020217138A2 (ja) | 2020-10-29 |
| US20220172766A1 (en) | 2022-06-02 |
| US11984147B2 (en) | 2024-05-14 |
| JPWO2020217138A1 (https=) | 2020-10-29 |
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