JP7402395B2 - コンフォーマル膜の交互積層成長のための方法 - Google Patents
コンフォーマル膜の交互積層成長のための方法 Download PDFInfo
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- JP7402395B2 JP7402395B2 JP2021525735A JP2021525735A JP7402395B2 JP 7402395 B2 JP7402395 B2 JP 7402395B2 JP 2021525735 A JP2021525735 A JP 2021525735A JP 2021525735 A JP2021525735 A JP 2021525735A JP 7402395 B2 JP7402395 B2 JP 7402395B2
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- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
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- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
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- G03F7/40—Treatment after imagewise removal, e.g. baking
- G03F7/405—Treatment with inorganic or organometallic reagents after imagewise removal
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- H01L21/0228—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
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- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
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- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
- H01L21/02304—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment formation of intermediate layers, e.g. buffer layers, layers to improve adhesion, lattice match or diffusion barriers
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76816—Aspects relating to the layout of the pattern or to the size of vias or trenches
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- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
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- C09D179/00—Coating compositions based on macromolecular compounds obtained by reactions forming in the main chain of the macromolecule a linkage containing nitrogen, with or without oxygen, or carbon only, not provided for in groups C09D161/00 - C09D177/00
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- Polymers & Plastics (AREA)
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Description
本開示は、2018年11月13日に出願された米国仮特許出願第62/760607号の利益を主張するものであり、その全体が参照により本明細書に組み込まれる。
Claims (18)
- 基板の加工処理方法であって、
基材を提供することと;
予め定められた刺激に応じて酸を発生するように構成される酸発生剤を含む自己集合単層(SAM)の第1の膜を前記基材上に堆積させることと;
予め定められた現像剤に対して可溶性であり、且つ前記酸への曝露に応じて溶解度を変化させるように構成されるポリマーの第1の膜を前記SAMの前記第1の膜上に堆積させることと;
前記酸発生剤を刺激することと;
前記酸発生剤から前記ポリマーの前記第1の膜中に前記酸を拡散することと;
前記予め定められた現像剤によって前記ポリマーの前記第1の膜を現像させ、前記予め定められた現像剤から保護されていない前記ポリマーの前記第1の膜の部分を除去することと
を含む方法。 - 前記予め定められた刺激に応じて酸を発生するように構成される前記酸発生剤を含む前記SAMの第2の膜を前記ポリマーの前記第1の膜上に堆積させることと;
前記予め定められた現像剤に対して可溶性であり、且つ前記酸への曝露に応じて溶解度を変化させるように構成される前記ポリマーの第2の膜を前記SAMの前記第2の膜上に堆積させることと;
前記酸発生剤を刺激することと;
前記酸発生剤から前記ポリマーの前記第2の膜中に前記酸を拡散することと;
前記予め定められた現像剤によって前記ポリマーの前記第2の膜を現像させ、前記予め定められた現像剤から保護されていない前記ポリマーの前記第2の膜の部分を除去することと
をさらに含む、請求項1に記載の方法。 - 前記SAMの所与の膜の堆積、前記ポリマーの所与の膜の堆積、前記酸発生剤の刺激、前記酸の拡散、及び前記予め定められた現像剤による前記ポリマーの前記所与の膜の現像の少なくとも1つの繰り返しを繰り返すことをさらに含む、請求項2に記載の方法。
- 前記SAMの膜及び前記ポリマーの膜の厚さの合計の予め定められた厚さが達成されるまで、前記繰り返しが実行される、請求項3に記載の方法。
- 前記酸が、前記ポリマー中に拡散される時、前記予め定められた現像剤から前記ポリマーを保護するために架橋反応を開始する、請求項1に記載の方法。
- 前記ポリマーの前記第1の膜の厚さが、前記ポリマーの前記第1の膜中への前記酸の酸拡散長さに基づく、請求項1に記載の方法。
- 前記酸の前記酸拡散長さが、前記酸の焼成時間、焼成温度及び分子量の少なくとも1つによって決定される、請求項6に記載の方法。
- 前記酸拡散長さが、前記焼成温度及び前記焼成時間によって決定される、請求項7に記載の方法。
- 前記基材が、前記基材の表面上に配置される構造を含む、請求項1に記載の方法。
- 前記SAMの構造が、ヘッド基、テール及び官能基を含み、前記テールによって前記ヘッド基が前記官能基に連結され、前記ヘッド基が前記基材の表面に付加し、前記官能基が、前記予め定められた刺激に応じて前記酸を発生するように構成される、請求項1に記載の方法。
- 前記酸発生剤が、加熱に応じて酸を発生する、請求項1に記載の方法。
- 前記酸発生剤が、予め定められた波長を有する放射線への曝露に応じて酸を発生する、請求項1に記載の方法。
- 前記SAMの前記第1の膜がスピンオン堆積によって堆積される、請求項1に記載の方法。
- トラックベース加工処理モジュールにおいて実行される、請求項1に記載の方法。
- 前記酸発生剤を刺激することが、直接書き込み投射ツールによって実行される前記SAMの空間的標的加熱に基づく、請求項1に記載の方法。
- 前記酸発生剤を刺激することが、直接書き込み投射ツールによって実行される予め定められた波長を有する放射線で前記SAMの空間的標的照射に基づく、請求項1に記載の方法。
- 基板の加工処理方法であって、
基材を提供することと;
自己集合単層(SAM)の構造がヘッド基、テール及び官能基を含み、前記テールによって前記ヘッド基が前記官能基に連結され、前記ヘッド基が前記基材の表面に付加し、前記官能基がアミン官能基を含む、前記SAMの第1の膜を前記基材上に堆積させることと;
二無水物分子を含む二無水物の第1の膜を前記SAMの前記第1の膜上に堆積させることと;
前記アミン官能基を前記二無水物分子の無水物末端と反応させて、イミド結合を形成することと;
前記アミン官能基と反応しなかった残留二無水物分子を前記基材から除去することと
を含む方法。 - 前記官能基がニトロ基である前記SAMの前記第1の膜を堆積させ、且つ前記二無水物の前記第1の膜を堆積させる前に、放射線を使用して、前記ニトロ基がアミン基に変換される、請求項17に記載の方法。
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