JP7372505B2 - 電子回路のビルトインセルフテストのためのシステム及び方法 - Google Patents

電子回路のビルトインセルフテストのためのシステム及び方法 Download PDF

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JP7372505B2
JP7372505B2 JP2019522635A JP2019522635A JP7372505B2 JP 7372505 B2 JP7372505 B2 JP 7372505B2 JP 2019522635 A JP2019522635 A JP 2019522635A JP 2019522635 A JP2019522635 A JP 2019522635A JP 7372505 B2 JP7372505 B2 JP 7372505B2
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signal
receiver
input
multiplexer
response
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JP2019523429A (ja
JP2019523429A5 (enExample
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フロイド ペイン ロバート
ヤコブ ヘルマン ランバート
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テキサス インスツルメンツ インコーポレイテッド
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40—Circuits
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/30—Marginal testing, e.g. by varying supply voltage
    • G01R31/3004—Current or voltage test
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2884—Testing of integrated circuits [IC] using dedicated test connectors, test elements or test circuits on the IC under test
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/30—Marginal testing, e.g. by varying supply voltage
    • G01R31/3016—Delay or race condition test, e.g. race hazard test
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B17/00—Monitoring; Testing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31708—Analysis of signal quality
    • G01R31/31711—Evaluation methods, e.g. shmoo plots

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electromagnetism (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Dc Digital Transmission (AREA)
JP2019522635A 2016-07-15 2017-07-17 電子回路のビルトインセルフテストのためのシステム及び方法 Active JP7372505B2 (ja)

Priority Applications (1)

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JP2023082708A JP7678459B2 (ja) 2016-07-15 2023-05-19 電子回路のビルトインセルフテストのためのシステム及び方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US15/211,782 2016-07-15
US15/211,782 US10014899B2 (en) 2016-07-15 2016-07-15 System and method for built-in self-test of electronic circuits
PCT/US2017/042403 WO2018014024A1 (en) 2016-07-15 2017-07-17 System and method for built-in self-test of electronic circuits

Related Child Applications (1)

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JP2023082708A Division JP7678459B2 (ja) 2016-07-15 2023-05-19 電子回路のビルトインセルフテストのためのシステム及び方法

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JP2019523429A JP2019523429A (ja) 2019-08-22
JP2019523429A5 JP2019523429A5 (enExample) 2020-08-20
JP7372505B2 true JP7372505B2 (ja) 2023-11-01

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JP2023082708A Active JP7678459B2 (ja) 2016-07-15 2023-05-19 電子回路のビルトインセルフテストのためのシステム及び方法

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US (1) US10014899B2 (enExample)
EP (1) EP3485285B1 (enExample)
JP (2) JP7372505B2 (enExample)
CN (1) CN109477868B (enExample)
WO (1) WO2018014024A1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
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JP2023101589A (ja) * 2016-07-15 2023-07-21 テキサス インスツルメンツ インコーポレイテッド 電子回路のビルトインセルフテストのためのシステム及び方法

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CN112820344B (zh) * 2019-11-18 2023-04-18 华为技术有限公司 数据信号的裕量检测方法、装置及存储设备
US11619667B2 (en) * 2020-03-31 2023-04-04 Advantest Corporation Enhanced loopback diagnostic systems and methods
JP2023550646A (ja) * 2020-11-24 2023-12-04 テクトロニクス・インコーポレイテッド 高速入出力マージン試験のためのシステム、方法及び装置
KR20220083914A (ko) 2020-12-11 2022-06-21 삼성전자주식회사 내부 루프백 테스트를 수행하는 송수신기 및 그것의 동작 방법
US11835991B2 (en) * 2021-03-22 2023-12-05 Stmicroelectronics International N.V. Self-test controller, and associated method

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US20010016929A1 (en) 1999-12-22 2001-08-23 International Business Machines Corporation Built-in self test system and method for high speed clock and data recovery circuit
US20050193290A1 (en) 2004-02-25 2005-09-01 Cho James B. Built-in self test method and apparatus for jitter transfer, jitter tolerance, and FIFO data buffer
JP2014174131A (ja) 2013-03-13 2014-09-22 Fujitsu Semiconductor Ltd 受信回路、半導体集積回路及び試験方法
JP2023101589A (ja) 2016-07-15 2023-07-21 テキサス インスツルメンツ インコーポレイテッド 電子回路のビルトインセルフテストのためのシステム及び方法

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EP1146343B1 (en) * 2000-03-09 2005-02-23 Texas Instruments Incorporated Adapting Scan-BIST architectures for low power operation
US7490275B2 (en) 2001-02-02 2009-02-10 Rambus Inc. Method and apparatus for evaluating and optimizing a signaling system
US7007213B2 (en) * 2001-02-15 2006-02-28 Syntest Technologies, Inc. Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test
EP1441439A1 (en) * 2003-01-23 2004-07-28 Infineon Technologies AG Analogue amplifier with multiplexing capability
CN100547425C (zh) * 2003-02-10 2009-10-07 Nxp股份有限公司 集成电路的测试
US7225379B2 (en) 2004-04-23 2007-05-29 Oki Electric Industry Co., Ltd. Circuit and method for testing semiconductor device
JP4811902B2 (ja) * 2004-12-24 2011-11-09 ルネサスエレクトロニクス株式会社 半導体装置および半導体装置のテスト方法
ATE436028T1 (de) * 2005-02-01 2009-07-15 Nxp Bv Prüfbare elektronische schaltung
US7735037B2 (en) * 2005-04-15 2010-06-08 Rambus, Inc. Generating interface adjustment signals in a device-to-device interconnection system
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US8472883B2 (en) * 2008-09-23 2013-06-25 Intel Mobile Communications GmbH Self calibration method for radio equipment with receive and transmit circuitry
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US8536888B2 (en) * 2010-12-30 2013-09-17 Taiwan Semiconductor Manufacturing Co., Ltd. Built in self test for transceiver
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US20010016929A1 (en) 1999-12-22 2001-08-23 International Business Machines Corporation Built-in self test system and method for high speed clock and data recovery circuit
US20050193290A1 (en) 2004-02-25 2005-09-01 Cho James B. Built-in self test method and apparatus for jitter transfer, jitter tolerance, and FIFO data buffer
JP2014174131A (ja) 2013-03-13 2014-09-22 Fujitsu Semiconductor Ltd 受信回路、半導体集積回路及び試験方法
JP2023101589A (ja) 2016-07-15 2023-07-21 テキサス インスツルメンツ インコーポレイテッド 電子回路のビルトインセルフテストのためのシステム及び方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2023101589A (ja) * 2016-07-15 2023-07-21 テキサス インスツルメンツ インコーポレイテッド 電子回路のビルトインセルフテストのためのシステム及び方法
JP7678459B2 (ja) 2016-07-15 2025-05-16 テキサス インスツルメンツ インコーポレイテッド 電子回路のビルトインセルフテストのためのシステム及び方法

Also Published As

Publication number Publication date
JP7678459B2 (ja) 2025-05-16
CN109477868B (zh) 2022-04-05
EP3485285B1 (en) 2023-05-03
WO2018014024A1 (en) 2018-01-18
US10014899B2 (en) 2018-07-03
US20180019781A1 (en) 2018-01-18
EP3485285A1 (en) 2019-05-22
JP2019523429A (ja) 2019-08-22
JP2023101589A (ja) 2023-07-21
CN109477868A (zh) 2019-03-15
EP3485285A4 (en) 2019-08-21

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