CN109477868B - 用于电子电路的内建自测试的系统和方法 - Google Patents

用于电子电路的内建自测试的系统和方法 Download PDF

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Publication number
CN109477868B
CN109477868B CN201780043151.7A CN201780043151A CN109477868B CN 109477868 B CN109477868 B CN 109477868B CN 201780043151 A CN201780043151 A CN 201780043151A CN 109477868 B CN109477868 B CN 109477868B
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signal
output
input
multiplexer
coupled
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Chinese (zh)
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CN109477868A (zh
Inventor
R·F·佩恩
L·J·赫勒曼
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Texas Instruments Inc
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Texas Instruments Inc
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40—Circuits
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/30—Marginal testing, e.g. by varying supply voltage
    • G01R31/3004—Current or voltage test
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2884—Testing of integrated circuits [IC] using dedicated test connectors, test elements or test circuits on the IC under test
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/30—Marginal testing, e.g. by varying supply voltage
    • G01R31/3016—Delay or race condition test, e.g. race hazard test
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B17/00—Monitoring; Testing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31708—Analysis of signal quality
    • G01R31/31711—Evaluation methods, e.g. shmoo plots

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electromagnetism (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Dc Digital Transmission (AREA)
CN201780043151.7A 2016-07-15 2017-07-17 用于电子电路的内建自测试的系统和方法 Active CN109477868B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US15/211,782 2016-07-15
US15/211,782 US10014899B2 (en) 2016-07-15 2016-07-15 System and method for built-in self-test of electronic circuits
PCT/US2017/042403 WO2018014024A1 (en) 2016-07-15 2017-07-17 System and method for built-in self-test of electronic circuits

Publications (2)

Publication Number Publication Date
CN109477868A CN109477868A (zh) 2019-03-15
CN109477868B true CN109477868B (zh) 2022-04-05

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Country Status (5)

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US (1) US10014899B2 (enExample)
EP (1) EP3485285B1 (enExample)
JP (2) JP7372505B2 (enExample)
CN (1) CN109477868B (enExample)
WO (1) WO2018014024A1 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10014899B2 (en) * 2016-07-15 2018-07-03 Texas Instruments Incorporated System and method for built-in self-test of electronic circuits
CN112820344B (zh) 2019-11-18 2023-04-18 华为技术有限公司 数据信号的裕量检测方法、装置及存储设备
US11619667B2 (en) * 2020-03-31 2023-04-04 Advantest Corporation Enhanced loopback diagnostic systems and methods
WO2022115494A1 (en) * 2020-11-24 2022-06-02 Tektronix, Inc. Systems, methods, and devices for high-speed input/output margin testing
KR20220083914A (ko) 2020-12-11 2022-06-21 삼성전자주식회사 내부 루프백 테스트를 수행하는 송수신기 및 그것의 동작 방법
US11835991B2 (en) * 2021-03-22 2023-12-05 Stmicroelectronics International N.V. Self-test controller, and associated method

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1519577A (zh) * 2003-01-23 2004-08-11 印芬龙科技股份有限公司 具有多路复用功能的模拟放大器
CN1623098A (zh) * 2001-02-15 2005-06-01 美国华腾科技股份有限公司 在自一测试和扫描一测试期间检测或查找交叉时钟域故障的多一捕获为测试而设计的系统
CN1748154A (zh) * 2003-02-10 2006-03-15 皇家飞利浦电子股份有限公司 集成电路的测试
KR100790238B1 (ko) * 2000-03-09 2007-12-31 텍사스 인스트루먼츠 인코포레이티드 스캔 회로
CN101163978A (zh) * 2005-02-01 2008-04-16 Nxp股份有限公司 可测试电子电路

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3474214B2 (ja) 1992-10-22 2003-12-08 株式会社東芝 論理回路及びこの論理回路を備えたテスト容易化回路
US6834367B2 (en) 1999-12-22 2004-12-21 International Business Machines Corporation Built-in self test system and method for high speed clock and data recovery circuit
US7490275B2 (en) 2001-02-02 2009-02-10 Rambus Inc. Method and apparatus for evaluating and optimizing a signaling system
US20050193290A1 (en) 2004-02-25 2005-09-01 Cho James B. Built-in self test method and apparatus for jitter transfer, jitter tolerance, and FIFO data buffer
US7225379B2 (en) 2004-04-23 2007-05-29 Oki Electric Industry Co., Ltd. Circuit and method for testing semiconductor device
JP4811902B2 (ja) * 2004-12-24 2011-11-09 ルネサスエレクトロニクス株式会社 半導体装置および半導体装置のテスト方法
US7735037B2 (en) * 2005-04-15 2010-06-08 Rambus, Inc. Generating interface adjustment signals in a device-to-device interconnection system
US7525348B1 (en) 2005-04-19 2009-04-28 National Semiconductor Corporation Differential voltage comparator
US8472883B2 (en) * 2008-09-23 2013-06-25 Intel Mobile Communications GmbH Self calibration method for radio equipment with receive and transmit circuitry
US8686736B2 (en) * 2010-11-23 2014-04-01 Infineon Technologies Ag System and method for testing a radio frequency integrated circuit
US8536888B2 (en) * 2010-12-30 2013-09-17 Taiwan Semiconductor Manufacturing Co., Ltd. Built in self test for transceiver
US8904248B2 (en) * 2012-07-10 2014-12-02 Apple Inc. Noise rejection for built-in self-test with loopback
JP2014174131A (ja) * 2013-03-13 2014-09-22 Fujitsu Semiconductor Ltd 受信回路、半導体集積回路及び試験方法
US9323633B2 (en) * 2013-03-28 2016-04-26 Stmicroelectronics, Inc. Dual master JTAG method, circuit, and system
US8803716B1 (en) * 2013-04-10 2014-08-12 Stmicroelectronics International N.V. Memoryless sliding window histogram based BIST
US9891276B2 (en) * 2015-07-28 2018-02-13 International Business Machines Corporation Performance-screen ring oscillator (PSRO) using an integrated circuit test signal distribution network
TWI580984B (zh) * 2015-10-27 2017-05-01 力晶科技股份有限公司 電壓校正電路及電壓校正系統
US10014899B2 (en) * 2016-07-15 2018-07-03 Texas Instruments Incorporated System and method for built-in self-test of electronic circuits

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100790238B1 (ko) * 2000-03-09 2007-12-31 텍사스 인스트루먼츠 인코포레이티드 스캔 회로
CN1623098A (zh) * 2001-02-15 2005-06-01 美国华腾科技股份有限公司 在自一测试和扫描一测试期间检测或查找交叉时钟域故障的多一捕获为测试而设计的系统
CN1519577A (zh) * 2003-01-23 2004-08-11 印芬龙科技股份有限公司 具有多路复用功能的模拟放大器
CN1748154A (zh) * 2003-02-10 2006-03-15 皇家飞利浦电子股份有限公司 集成电路的测试
CN101163978A (zh) * 2005-02-01 2008-04-16 Nxp股份有限公司 可测试电子电路

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
基于SoC的嵌入式DRAM存储器内建自测试设计;田勇 等;《计算机测量与控制》;20121231;第2350-2352页 *

Also Published As

Publication number Publication date
JP2019523429A (ja) 2019-08-22
JP7678459B2 (ja) 2025-05-16
US10014899B2 (en) 2018-07-03
EP3485285A1 (en) 2019-05-22
JP7372505B2 (ja) 2023-11-01
US20180019781A1 (en) 2018-01-18
WO2018014024A1 (en) 2018-01-18
EP3485285A4 (en) 2019-08-21
JP2023101589A (ja) 2023-07-21
EP3485285B1 (en) 2023-05-03
CN109477868A (zh) 2019-03-15

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