JP7371340B2 - 電力増幅装置及び電磁波放射装置 - Google Patents
電力増幅装置及び電磁波放射装置 Download PDFInfo
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- JP7371340B2 JP7371340B2 JP2019053358A JP2019053358A JP7371340B2 JP 7371340 B2 JP7371340 B2 JP 7371340B2 JP 2019053358 A JP2019053358 A JP 2019053358A JP 2019053358 A JP2019053358 A JP 2019053358A JP 7371340 B2 JP7371340 B2 JP 7371340B2
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- conductive film
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Classifications
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Description
(2)式に示すように、電流Idは偶数次高調波の重ね合わせであり、電圧Vdは、奇数次高調波の重ね合わせである。電力増幅装置においてF級動作を実現するためには、奇数次高調波(主に3倍波)に対するインピーダンスを無限大とし、偶数次高調波(主に2倍波)に対するインピーダンスをゼロにすればよい。このような高調波に対するインピーダンス調整は、例えば、図3に示すように、電力増幅用のトランジスタ200の出力端子(ドレイン)に、高調波のインピーダンスを調整する高調波処理回路201を接続することにより実現される。なお、2倍波及び3倍波の双方に対するインピーダンスを適切なインピーダンスに調整する事が望ましいが、2倍波に対してのみインピーダンス調整を行う場合でも、変換効率PAEは10%程度改善する。
基本波整合回路40、40D、40Gは、開示の技術における基本波整合回路の一例である。導電膜41は開示の技術における第1の導電膜の一例である。高調波処理回路60、60A、60B、60D、60Gは開示の技術における高調波処理回路の一例である。導電膜61は開示の技術における第2の導電膜の一例である。第1の誘電体層D1は開示の技術における第1の誘電体層の一例である。第2の誘電体層D2は開示の技術における第2の誘電体層の一例である。導電膜50は開示の技術における第3の導電膜の一例である。導電膜62は開示の技術における第4の導電膜の一例である。導電膜63は開示の技術における第5の導電膜の一例である。チップキャパシタ64は開示の技術におけるキャパシタの一例である。電磁波放射装置100は開示の技術における電磁波放射装置の一例である。
入力信号が入力される入力端子及び出力信号を出力する出力端子を有するトランジスタと、
前記トランジスタ上に積層され且つ前記入力端子及び前記出力端子の少なくとも一方に接続された第1の導電膜を含み、前記入力信号及び前記出力信号の少なくとも一方の基本波に対する負荷インピーダンスを、前記トランジスタのインピーダンスに整合させる基本波整合回路と、
前記第1の導電膜との間に誘電体層を挟んで前記第1の導電膜上に積層され且つ前記誘電体層を貫通するビアを介して前記入力端子及び前記出力端子の少なくとも一方に接続された第2の導電膜を含み、前記入力信号及び前記出力信号の少なくとも一方の高調波に対するインピーダンスを調整する高調波処理回路と、
を含む電力増幅装置。
前記第1の導電膜上に積層された第1の誘電体層と、
前記第1の誘電体層上に積層され、所定の電位が印加される第3の導電膜と、
前記第3の導電膜と前記第2の導電膜との間に設けられた第2の誘電体層と、
を含む
付記1に記載の電力増幅装置。
前記高調波処理回路は、
前記第2の誘電体層上に積層され、前記第2の誘電体層を貫通するビアを介して前記第3の導電膜に接続された第4の導電膜と、
前記第2の導電膜に一方の電極が接続され、前記第4の導電膜に他方の電極が接続されたキャパシタと、
を含む
付記2に記載の電力増幅装置。
前記高調波処理回路は、前記第2の誘電体層上に積層され、フローティング電位とされた第5の導電膜を含む
付記3に記載の電力増幅装置。
前記高調波処理回路は、前記入力信号及び前記出力信号の少なくとも一方の2倍波に対するインピーダンスをゼロとするように構成されている
付記1から付記4のいずれか1つに記載の電力増幅装置。
供給される信号に対して所定の処理を行う信号処理装置と、前記信号処理装置によって処理された信号が入力信号として入力され、前記入力信号の電力を増幅して出力する電力増幅装置と、前記電力増幅装置から出力された出力信号を電磁波として放射するアンテナと、を含む電磁波放射装置であって、
入力信号が入力される入力端子及び出力信号を出力する出力端子を有するトランジスタと、
前記トランジスタ上に積層され且つ前記入力端子及び前記出力端子の少なくとも一方に接続された第1の導電膜を含み、前記入力信号及び前記出力信号の少なくとも一方の基本波に対する負荷インピーダンスを、前記トランジスタのインピーダンスに整合させる基本波整合回路と、
前記第1の導電膜との間に誘電体層を挟んで前記第1の導電膜上に積層され且つ前記誘電体層を貫通するビアを介して前記入力端子及び前記出力端子の少なくとも一方に接続された第2の導電膜を含み、前記入力信号及び前記出力信号の少なくとも一方の高調波に対するインピーダンスを調整する高調波処理回路と、
を含む電磁波放射装置。
前記第1の導電膜上に積層された第1の誘電体層と、
前記第1の誘電体層上に積層され、所定の電位が印加される第3の導電膜と、
前記第3の導電膜と前記第2の導電膜との間に設けられた第2の誘電体層と、
を含む
付記6に記載の電磁波放射装置。
前記高調波処理回路は、
前記第2の誘電体層上に積層され、前記第2の誘電体層を貫通するビアを介して前記第3の導電膜に接続された第4の導電膜と、
前記第2の導電膜に一方の電極が接続され、前記第4の導電膜に他方の電極が接続されたキャパシタと、
を含む
付記7に記載の電磁波放射装置。
前記高調波処理回路は、前記第2の誘電体層上に積層され、フローティング電位とされた第5の導電膜を含む
付記8に記載の電磁波放射装置。
入力信号が入力される入力端子及び出力信号を出力する出力端子を有するトランジスタ上に、前記入力信号及び前記出力信号の少なくとも一方の基本波に対する負荷インピーダンスを前記トランジスタのインピーダンスに整合させる基本波整合回路を構成し且つ前記入力端子及び前記出力端子の少なくとも一方に接続された第1の導電膜を積層する工程と、
前記入力信号及び前記出力信号の少なくとも一方の高調波に対するインピーダンスを調整する高調波処理回路を構成し且つ前記第1の導電体膜との間に設けられた誘電体層を貫通するビアを介して前記入力端子及び前記出力端子の少なくとも一方に接続された第2の導電膜を、前記誘電体層を間に挟んで前記第1の導電膜上に積層する工程と、
を含む電力増幅装置の製造方法。
12、13、14 ビア
20 トランジスタ
21 ドレイン電極
22 ソース電極
23 ゲート電極
30 多層基板
40、40D、40G 基本波整合回路
41、42、50、61、62、63 導電膜
60、60A、60B、60D、60G 高調波処理回路
64 チップキャパシタ
100 電磁波放射装置
101 信号処理装置
102 ドライバアンプ
103 アンテナ
D1 第1の誘電体層
D2 第2の誘電体層
Claims (6)
- 入力信号が入力される入力端子及び出力信号を出力する出力端子を有するトランジスタと、
前記トランジスタ上に積層され且つ前記入力端子及び前記出力端子の少なくとも一方に接続された第1の導電膜を含み、前記入力信号及び前記出力信号の少なくとも一方の基本波に対する負荷インピーダンスを、前記トランジスタのインピーダンスに整合させる基本波整合回路と、
前記第1の導電膜との間に第1の誘電体層を挟んで前記第1の導電膜上に積層され且つ前記第1の誘電体層を貫通するビアを介して前記入力端子及び前記出力端子の少なくとも一方に接続された第2の導電膜を含み、前記入力信号及び前記出力信号の少なくとも一方の高調波に対するインピーダンスを調整する高調波処理回路と、
を含み、
前記高調波処理回路は、フローティング電位とされる第5の導電膜を含み、
前記第1の導電膜は、前記トランジスタと前記第1の誘電体層との間に設けられており、
前記第5の導電膜は、前記第2の導電膜が設けられた導電体層と同じ導体層において、前記第2の導電膜の周囲に設けられている
電力増幅装置。 - 前記第1の誘電体層上に積層され、所定の電位が印加される第3の導電膜と、
前記第3の導電膜と前記第2の導電膜との間に設けられた第2の誘電体層と、
を含む
請求項1に記載の電力増幅装置。 - 前記高調波処理回路は、
前記第2の誘電体層上に積層され、前記第2の誘電体層を貫通するビアを介して前記第3の導電膜に接続された第4の導電膜と、
前記第2の導電膜に一方の電極が接続され、前記第4の導電膜に他方の電極が接続されたキャパシタと、
を含む
請求項2に記載の電力増幅装置。 - 前記第1の導電膜は、前記入力端子及び前記出力端子の少なくとも一方に接する導電体層を含み、
前記第1の誘電体層は、前記導電体層に積層され、
前記第2の導電膜は、前記第1の誘電体層を貫通するビア及び前記導電体層を介して、前記入力端子及び前記出力端子の少なくとも一方に接続される
請求項1に記載の電力増幅装置。 - 前記高調波処理回路は、前記第2の導電膜を含んで構成されるインダクタと、前記キャパシタとが直列接続されたLC共振回路を形成しており、前記入力信号及び前記出力信号の少なくとも一方の2倍波に対するインピーダンスをゼロとするように構成されている
請求項3に記載の電力増幅装置。 - 供給される信号に対して所定の処理を行う信号処理装置と、前記信号処理装置によって処理された信号が入力信号として入力され、前記入力信号の電力を増幅して出力する電力増幅装置と、前記電力増幅装置から出力された出力信号を電磁波として放射するアンテナと、を含む電磁波放射装置であって、
前記電力増幅装置は、
入力信号が入力される入力端子及び出力信号を出力する出力端子を有するトランジスタと、
前記トランジスタ上に積層され且つ前記入力端子及び前記出力端子の少なくとも一方に接続された第1の導電膜を含み、前記入力信号及び前記出力信号の少なくとも一方の基本波に対する負荷インピーダンスを、前記トランジスタのインピーダンスに整合させる基本波整合回路と、
前記第1の導電膜との間に第1の誘電体層を挟んで前記第1の導電膜上に積層され且つ前記第1の誘電体層を貫通するビアを介して前記入力端子及び前記出力端子の少なくとも一方に接続された第2の導電膜を含み、前記入力信号及び前記出力信号の少なくとも一方の高調波に対するインピーダンスを調整する高調波処理回路と、
を含み、
前記高調波処理回路は、フローティング電位とされる第5の導電膜を含み、
前記第1の導電膜は、前記トランジスタと前記第1の誘電体層との間に設けられており、
前記第5の導電膜は、前記第2の導電膜が設けられた導電体層と同じ導体層において、前記第2の導電膜の周囲に設けられている
電磁波放射装置。
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JP2002141757A (ja) | 2000-08-08 | 2002-05-17 | Tdk Corp | パワーアンプモジュール、パワーアンプモジュール用誘電体基板及び通信端末装置 |
JP2003218646A (ja) | 2001-11-16 | 2003-07-31 | Matsushita Electric Ind Co Ltd | 電力増幅装置、及び無線通信装置 |
JP2005521312A (ja) | 2002-03-21 | 2005-07-14 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | 電力増幅器デバイス |
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JP2003218646A (ja) | 2001-11-16 | 2003-07-31 | Matsushita Electric Ind Co Ltd | 電力増幅装置、及び無線通信装置 |
JP2005521312A (ja) | 2002-03-21 | 2005-07-14 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | 電力増幅器デバイス |
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