JP7363921B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP7363921B2
JP7363921B2 JP2021562407A JP2021562407A JP7363921B2 JP 7363921 B2 JP7363921 B2 JP 7363921B2 JP 2021562407 A JP2021562407 A JP 2021562407A JP 2021562407 A JP2021562407 A JP 2021562407A JP 7363921 B2 JP7363921 B2 JP 7363921B2
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Japan
Prior art keywords
wiring
power line
power
line
power supply
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JP2021562407A
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English (en)
Japanese (ja)
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JPWO2021111604A1 (enExample
JPWO2021111604A5 (enExample
Inventor
淳 岡本
紘宜 武野
ウェンゼン ワン
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Socionext Inc
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Socionext Inc
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Publication of JPWO2021111604A1 publication Critical patent/JPWO2021111604A1/ja
Publication of JPWO2021111604A5 publication Critical patent/JPWO2021111604A5/ja
Priority to JP2023171195A priority Critical patent/JP7639871B2/ja
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Publication of JP7363921B2 publication Critical patent/JP7363921B2/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/10—Integrated device layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/903—Masterslice integrated circuits comprising field effect technology
    • H10D84/907—CMOS gate arrays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Layout of the interconnection structure
    • H01L23/5286—Arrangements of power or ground buses
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/535—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including internal interconnections, e.g. cross-under constructions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/903—Masterslice integrated circuits comprising field effect technology
    • H10D84/907—CMOS gate arrays
    • H10D84/968—Macro-architecture
    • H10D84/974—Layout specifications, i.e. inner core regions
    • H10D84/975—Wiring regions or routing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/903—Masterslice integrated circuits comprising field effect technology
    • H10D84/907—CMOS gate arrays
    • H10D84/968—Macro-architecture
    • H10D84/974—Layout specifications, i.e. inner core regions
    • H10D84/981—Power supply lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/903—Masterslice integrated circuits comprising field effect technology
    • H10D84/907—CMOS gate arrays
    • H10D84/992—Noise prevention, e.g. preventing crosstalk

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP2021562407A 2019-12-05 2019-12-05 半導体装置 Active JP7363921B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2023171195A JP7639871B2 (ja) 2019-12-05 2023-10-02 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2019/047688 WO2021111604A1 (ja) 2019-12-05 2019-12-05 半導体装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2023171195A Division JP7639871B2 (ja) 2019-12-05 2023-10-02 半導体装置

Publications (3)

Publication Number Publication Date
JPWO2021111604A1 JPWO2021111604A1 (enExample) 2021-06-10
JPWO2021111604A5 JPWO2021111604A5 (enExample) 2022-12-08
JP7363921B2 true JP7363921B2 (ja) 2023-10-18

Family

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JP2021562407A Active JP7363921B2 (ja) 2019-12-05 2019-12-05 半導体装置
JP2023171195A Active JP7639871B2 (ja) 2019-12-05 2023-10-02 半導体装置

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JP2023171195A Active JP7639871B2 (ja) 2019-12-05 2023-10-02 半導体装置

Country Status (4)

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US (2) US12284828B2 (enExample)
JP (2) JP7363921B2 (enExample)
CN (1) CN114762113B (enExample)
WO (1) WO2021111604A1 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2023053203A1 (enExample) * 2021-09-28 2023-04-06
JPWO2023095616A1 (enExample) * 2021-11-29 2023-06-01
US20230420369A1 (en) * 2022-06-28 2023-12-28 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit device and manufacturing method
WO2024214205A1 (ja) * 2023-04-12 2024-10-17 株式会社ソシオネクスト 半導体装置
CN120958979A (zh) * 2023-04-12 2025-11-14 株式会社索思未来 半导体装置
WO2024252660A1 (ja) * 2023-06-09 2024-12-12 株式会社ソシオネクスト 半導体装置

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000223575A (ja) 1999-01-28 2000-08-11 Hitachi Ltd 半導体装置の設計方法、半導体装置および半導体装置の製造方法
JP2009302198A (ja) 2008-06-11 2009-12-24 Elpida Memory Inc 半導体チップ、半導体チップ群および半導体装置
JP2011159810A (ja) 2010-02-01 2011-08-18 Renesas Electronics Corp 半導体集積回路及びその制御方法
JP2014165358A (ja) 2013-02-26 2014-09-08 Panasonic Corp 半導体装置及びその製造方法
US20150187642A1 (en) 2013-12-30 2015-07-02 International Business Machines Corporation Double-sided segmented line architecture in 3d integration
JP2018190760A (ja) 2017-04-28 2018-11-29 株式会社ソシオネクスト 半導体装置
WO2019194007A1 (ja) 2018-04-05 2019-10-10 株式会社ソシオネクスト 半導体集積回路装置

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JPS5326689A (en) * 1976-08-25 1978-03-11 Hitachi Ltd Semiconductor integrated circuit unit
JP2972425B2 (ja) * 1992-01-30 1999-11-08 日本電気アイシーマイコンシステム株式会社 半導体集積回路
JPH11102910A (ja) * 1997-09-29 1999-04-13 Hitachi Ltd 半導体集積回路
JP2009177200A (ja) * 1998-05-01 2009-08-06 Sony Corp 半導体記憶装置
JP2009124667A (ja) * 2007-01-25 2009-06-04 Panasonic Corp 双方向スイッチ及びその駆動方法
JP4962173B2 (ja) * 2007-07-02 2012-06-27 ソニー株式会社 半導体集積回路
JP2012044042A (ja) * 2010-08-20 2012-03-01 Kawasaki Microelectronics Inc 半導体集積回路および半導体集積回路装置
US8530273B2 (en) 2010-09-29 2013-09-10 Guardian Industries Corp. Method of making oxide thin film transistor array
DE102013207324A1 (de) 2012-05-11 2013-11-14 Semiconductor Energy Laboratory Co., Ltd. Halbleitervorrichtung und elektronisches Gerät
EP2884542A3 (en) 2013-12-10 2015-09-02 IMEC vzw Integrated circuit device with power gating switch in back end of line
CN108028241B (zh) * 2015-09-25 2022-11-04 英特尔公司 通过硅来分配功率的两侧上的金属
US9754923B1 (en) 2016-05-09 2017-09-05 Qualcomm Incorporated Power gate placement techniques in three-dimensional (3D) integrated circuits (ICs) (3DICs)
EP3324436B1 (en) 2016-11-21 2020-08-05 IMEC vzw An integrated circuit chip with power delivery network on the backside of the chip
US10950546B1 (en) 2019-09-17 2021-03-16 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device including back side power supply circuit
US11004789B2 (en) 2019-09-30 2021-05-11 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device including back side power supply circuit

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000223575A (ja) 1999-01-28 2000-08-11 Hitachi Ltd 半導体装置の設計方法、半導体装置および半導体装置の製造方法
JP2009302198A (ja) 2008-06-11 2009-12-24 Elpida Memory Inc 半導体チップ、半導体チップ群および半導体装置
JP2011159810A (ja) 2010-02-01 2011-08-18 Renesas Electronics Corp 半導体集積回路及びその制御方法
JP2014165358A (ja) 2013-02-26 2014-09-08 Panasonic Corp 半導体装置及びその製造方法
US20150187642A1 (en) 2013-12-30 2015-07-02 International Business Machines Corporation Double-sided segmented line architecture in 3d integration
JP2018190760A (ja) 2017-04-28 2018-11-29 株式会社ソシオネクスト 半導体装置
WO2019194007A1 (ja) 2018-04-05 2019-10-10 株式会社ソシオネクスト 半導体集積回路装置

Also Published As

Publication number Publication date
US12284828B2 (en) 2025-04-22
US20250227996A1 (en) 2025-07-10
CN114762113A (zh) 2022-07-15
JP2023171884A (ja) 2023-12-05
JPWO2021111604A1 (enExample) 2021-06-10
US20220293634A1 (en) 2022-09-15
CN114762113B (zh) 2024-11-01
JP7639871B2 (ja) 2025-03-05
WO2021111604A1 (ja) 2021-06-10

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