JP7257390B2 - 高速スイッチング能力を備えた電荷平衡型半導体パワーデバイスのシステムおよび方法 - Google Patents
高速スイッチング能力を備えた電荷平衡型半導体パワーデバイスのシステムおよび方法 Download PDFInfo
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Description
Claims (22)
- 半導体デバイスの製造方法であって、
半導体層の上面に第1のブロッキングマスクを付着することであって、前記第1のブロッキングマスクが1つまたはそれ以上のフィーチャの第1のセットを含む、付着することと、
イオン注入により半導体層に第1の注入を実行して第1の注入領域を形成することと、
第2のブロッキングマスクを付着することであって、前記第2のブロッキングマスクが1つまたはそれ以上のフィーチャの第2のセットを含み、前記1つまたはそれ以上のフィーチャの第2のセットが前記1つまたはそれ以上のフィーチャの第1のセットと重複する、付着することと、
イオン注入により前記半導体層に第2の注入を実行して第2の注入領域を形成することであって、前記第1および第2の注入領域は互いに重なり合う、形成することと、
を含み、
前記第1および第2の注入領域は結合して、所定の深さだけ前記半導体層内に延びる接続領域を形成する、
半導体デバイスの製造方法。 - 前記所定の深さは、前記半導体層の厚さに等しい、請求項1に記載の半導体デバイスの製造方法。
- 前記半導体層の上面に第1のブロッキングマスクを付着することであって、前記第1のブロッキングマスクは1つまたはそれ以上のフィーチャの第1のセットを含む、付着することと、
前記第1の注入が実行された後、前記半導体層の前記上面から前記第1のブロッキングマスクを除去することと、
を含む、請求項1に記載の半導体デバイスの製造方法。 - 前記半導体層の前記上面に第2のブロッキングマスクを付着することであって、前記第2のブロッキングマスクは1つまたはそれ以上のフィーチャの第2のセットを含む、付着することと、
前記第2の注入が実行された後、前記半導体層の前記上面から前記第2のブロッキングマスクを除去することと、
を含む、請求項3に記載の半導体デバイスの製造方法。 - 前記1つまたはそれ以上のフィーチャの前記第1および第2のセットの各フィーチャが5ミクロン未満の幅を有する、請求項4に記載の半導体デバイスの製造方法。
- イオン注入後に前記半導体層の前記上面から前記第1および第2のブロッキングマスクを除去することを含む、請求項1に記載の半導体デバイスの製造方法。
- 前記第1の注入領域は第2導電型であり、前記第2の注入領域は前記第2導電型である、請求項1に記載の半導体デバイスの製造方法。
- 前記接続領域は第1導電型であり、前記第1および第2の注入領域は第2導電型である、請求項1に記載の半導体デバイスの製造方法。
- 前記半導体デバイスは、炭化ケイ素(SiC)半導体デバイスを含む、請求項1に記載の半導体デバイスの製造方法。
- 電荷平衡(CB)デバイスであって、
上面に第2の導電型の上部領域を含む、第1の導電型のデバイス層と、
前記デバイス層に隣接して配置され、前記第2の導電型の第1の複数のCB領域を含む、前記第1の導電型の第1のCB層と、
第1の注入領域と第2の注入領域とが互いに重なり合う接続領域を含む第1の接続領域と、
前記接続領域に隣接する第1の注入によって形成された前記第1の注入領域と、
前記接続領域に隣接する第2の注入によって形成された、前記第1の注入領域の反対側の前記第2の注入領域と、
を備え、
前記第1の接続領域は、前記デバイス層の前記上部領域から、前記第1のCB層の前記第1の複数のCB領域のうちの少なくとも第1のCB領域まで延在し、
前記第1の注入領域は第2の導電型であり、前記第2の注入領域は第1の導電型である、
電荷平衡(CB)デバイス。 - 前記接続領域は第2の導電型であり、前記第1および第2の注入領域は第2の導電型である、請求項10に記載のCBデバイス。
- 前記接続領域は、0.5μm~4μmの幅を有する、請求項10に記載のCBデバイス。
- 前記接続領域のドーパント濃度は、0.5×1016cm-3~5×1016cm-3である、請求項12に記載のCBデバイス。
- 前記デバイス層の前記上部領域から前記第1の複数のCB領域の少なくとも第2のCB領域まで延在する第2の接続領域を備える、請求項10に記載のCBデバイス。
- 前記デバイス層および前記CB層は、炭化ケイ素(SiC)から製造される、請求項10に記載のCBデバイス。
- 前記CBデバイスは、金属酸化膜半導体電界効果トランジスタ(MOSFET)、接合型電界効果トランジスタ(JFET)、バイポーラ接合型トランジスタ(BJT)、絶縁ゲートバイポーラトランジスタ(IGBT)、またはダイオードである、請求項10に記載のCBデバイス。
- 電荷平衡(CB)デバイスであって、
少なくとも1つの電荷平衡(CB)層を形成するための第2の導電型の複数の電荷平衡(CB)領域を含む第1の導電型の少なくとも1つのエピタキシャル(エピ)層であって、各々の前記複数のCB領域は、前記少なくとも1つのCB層の厚さ未満である、エピタキシャル層と、
前記少なくとも1つのCB層に隣接して配置されてデバイス層を形成する前記第1の導電型の上部エピタキシャル層であって、前記デバイス層は前記第2の導電型の上部領域を含む、上部エピタキシャル層と、
第1の注入領域と第2の注入領域とが互いに重なり合う接続領域と、
前記接続領域に隣接して前記第1の注入領域によって形成される第1の領域と、
前記第1の領域の反対側で、前記接続領域に隣接して前記第2の注入領域によって形成される第2の領域と、
を備え、
前記接続領域は、前記デバイス層の前記上部領域から、前記少なくとも1つのCB層の前記複数のCB領域のうちの少なくとも1つまで延在し、
前記第1および第2の注入領域は、高エネルギーイオン注入を使用して前記少なくとも1つのエピ層に1つまたはそれ以上のドーパントを導入することにより形成される、
電荷平衡(CB)デバイス。 - 前記接続領域は、0.5μm~4μmの間の幅、および0.5x1016cm-3~5x1016cm-3の間のドーパント濃度を有する、請求項17に記載のCBデバイス。
- 前記第1の注入領域は第2の導電型であり、前記第2の注入領域は第2の導電型である、請求項17に記載のCBデバイス。
- 前記デバイス層および前記CB層は、炭化ケイ素(SiC)から製造される、請求項17に記載のCBデバイス。
- 前記CBデバイスは、金属酸化膜半導体電界効果トランジスタ(MOSFET)、接合型電界効果トランジスタ(JFET)、バイポーラ接合型トランジスタ(BJT)、絶縁ゲートバイポーラトランジスタ(IGBT)、またはダイオードである、請求項17に記載のCBデバイス。
- 前記第1および第2の注入領域は、500keV~85MeVの間の注入加速エネルギーで注入されたドーパントを導入することにより形成される、請求項17に記載のCBデバイス。
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