JP7226664B2 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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Publication number
JP7226664B2
JP7226664B2 JP2022549893A JP2022549893A JP7226664B2 JP 7226664 B2 JP7226664 B2 JP 7226664B2 JP 2022549893 A JP2022549893 A JP 2022549893A JP 2022549893 A JP2022549893 A JP 2022549893A JP 7226664 B2 JP7226664 B2 JP 7226664B2
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JP
Japan
Prior art keywords
adhesive layer
manufacturing
curable adhesive
semiconductor device
layer
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Active
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JP2022549893A
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English (en)
Japanese (ja)
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JPWO2022118929A5 (https=
JPWO2022118929A1 (https=
Inventor
弘明 松原
大助 池田
奎佑 大河原
省吾 祖父江
紗瑛子 小川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Showa Denko Materials Co Ltd
Resonac Corp
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Application filed by Hitachi Chemical Co Ltd, Showa Denko Materials Co Ltd, Resonac Corp filed Critical Hitachi Chemical Co Ltd
Publication of JPWO2022118929A1 publication Critical patent/JPWO2022118929A1/ja
Publication of JPWO2022118929A5 publication Critical patent/JPWO2022118929A5/ja
Priority to JP2023016963A priority Critical patent/JP2023056529A/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7402—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/014—Manufacture or treatment using batch processing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/019—Manufacture or treatment using temporary auxiliary substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
    • H10W74/117—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/121—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by multiple encapsulations, e.g. by a thin protective coating and a thick encapsulation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7416—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7424—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used as a support during the manufacture of self-supporting substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

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  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP2022549893A 2020-12-04 2021-12-02 半導体装置の製造方法 Active JP7226664B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2023016963A JP2023056529A (ja) 2020-12-04 2023-02-07 半導体装置の製造方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JPPCT/JP2020/045335 2020-12-04
PCT/JP2020/045335 WO2022118479A1 (ja) 2020-12-04 2020-12-04 半導体装置の製造方法
PCT/JP2021/044321 WO2022118929A1 (ja) 2020-12-04 2021-12-02 半導体装置の製造方法

Related Child Applications (1)

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JP2023016963A Division JP2023056529A (ja) 2020-12-04 2023-02-07 半導体装置の製造方法

Publications (3)

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JPWO2022118929A1 JPWO2022118929A1 (https=) 2022-06-09
JPWO2022118929A5 JPWO2022118929A5 (https=) 2022-11-16
JP7226664B2 true JP7226664B2 (ja) 2023-02-21

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JP2023016963A Pending JP2023056529A (ja) 2020-12-04 2023-02-07 半導体装置の製造方法

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US (1) US12604756B2 (https=)
JP (2) JP7226664B2 (https=)
TW (1) TW202230484A (https=)
WO (2) WO2022118479A1 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12604756B2 (en) 2020-12-04 2026-04-14 Resonac Corporation Method for manufacturing semiconductor device

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11887862B2 (en) 2021-09-14 2024-01-30 Deca Technologies Usa, Inc. Method for redistribution layer (RDL) repair by mitigating at least one defect with a custom RDL
WO2024135070A1 (ja) * 2022-12-20 2024-06-27 デンカ株式会社 正極組成物、正極形成用塗液、正極、電池、正極形成用塗液の製造方法、正極の製造方法及び電池の製造方法
US12362322B2 (en) * 2023-06-22 2025-07-15 Deca Technologies Usa, Inc. Method of making a fan-out semiconductor assembly with an intermediate carrier
JP2025161446A (ja) * 2024-04-12 2025-10-24 株式会社レゾナック 半導体装置形成用積層体及び半導体装置の製造方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006222164A (ja) 2005-02-08 2006-08-24 Shinko Electric Ind Co Ltd 半導体装置及びその製造方法
JP2013168594A (ja) 2012-02-17 2013-08-29 Fujitsu Ltd 半導体装置の製造方法及び電子装置の製造方法
WO2017149810A1 (ja) 2016-02-29 2017-09-08 三井金属鉱業株式会社 キャリア付銅箔及びその製造方法、並びに配線層付コアレス支持体及びプリント配線板の製造方法
JP2018009138A (ja) 2016-07-05 2018-01-18 日立化成株式会社 仮固定用樹脂組成物、仮固定用樹脂フィルム及び仮固定用樹脂フィルムシート
JP2019129179A (ja) 2018-01-22 2019-08-01 日立化成株式会社 半導体装置の製造方法

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JP3853247B2 (ja) 2002-04-16 2006-12-06 日東電工株式会社 電子部品用加熱剥離型粘着シートおよび電子部品の加工方法並びに電子部品
JP2010034217A (ja) 2008-07-28 2010-02-12 Hitachi Ltd 有機薄膜トランジスタの製造方法
JP2017050464A (ja) 2015-09-03 2017-03-09 凸版印刷株式会社 配線基板積層体、その製造方法及び半導体装置の製造方法
JP6769132B2 (ja) 2016-06-22 2020-10-14 日立化成株式会社 半導体装置の製造方法
KR102454056B1 (ko) 2017-03-31 2022-10-14 린텍 가부시키가이샤 반도체 장치의 제조 방법 및 양면 점착 시트
JP2019211218A (ja) 2018-05-31 2019-12-12 セイコーエプソン株式会社 物理量センサー、複合センサー、慣性計測ユニット、移動体測位装置、携帯型電子機器、電子機器、移動体、走行支援システム、表示装置、および物理量センサーの製造方法
US10510713B1 (en) * 2018-10-28 2019-12-17 Taiwan Semiconductor Manufacturing Co., Ltd. Semicondcutor package and method of manufacturing the same
CN113195668B (zh) 2018-12-20 2023-01-13 昭和电工材料株式会社 临时固定用树脂组合物、临时固定用树脂膜及临时固定用片、以及半导体装置的制造方法
US11183482B2 (en) * 2019-09-17 2021-11-23 Taiwan Semiconductor Manufacturing Company, Ltd. Shift control method in manufacture of semiconductor device
WO2021058663A1 (en) * 2019-09-25 2021-04-01 Deepmind Technologies Limited Augmenting attention-based neural networks to selectively attend to past inputs
WO2022118479A1 (ja) 2020-12-04 2022-06-09 昭和電工マテリアルズ株式会社 半導体装置の製造方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006222164A (ja) 2005-02-08 2006-08-24 Shinko Electric Ind Co Ltd 半導体装置及びその製造方法
JP2013168594A (ja) 2012-02-17 2013-08-29 Fujitsu Ltd 半導体装置の製造方法及び電子装置の製造方法
WO2017149810A1 (ja) 2016-02-29 2017-09-08 三井金属鉱業株式会社 キャリア付銅箔及びその製造方法、並びに配線層付コアレス支持体及びプリント配線板の製造方法
JP2018009138A (ja) 2016-07-05 2018-01-18 日立化成株式会社 仮固定用樹脂組成物、仮固定用樹脂フィルム及び仮固定用樹脂フィルムシート
JP2019129179A (ja) 2018-01-22 2019-08-01 日立化成株式会社 半導体装置の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12604756B2 (en) 2020-12-04 2026-04-14 Resonac Corporation Method for manufacturing semiconductor device

Also Published As

Publication number Publication date
JPWO2022118929A1 (https=) 2022-06-09
TW202230484A (zh) 2022-08-01
JP2023056529A (ja) 2023-04-19
US12604756B2 (en) 2026-04-14
US20240030183A1 (en) 2024-01-25
WO2022118479A1 (ja) 2022-06-09
WO2022118929A1 (ja) 2022-06-09

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