JP7083558B2 - 動的内部電源ノードへの供給電圧の提供 - Google Patents
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0008—Arrangements for reducing power consumption
- H03K19/0013—Arrangements for reducing power consumption in field effect transistor circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823821—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
- H01L23/5286—Arrangements of power or ground buses
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
- H01L27/0924—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors including transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/10—Inductors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/017509—Interface arrangements
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Description
Claims (11)
- 他の一群の回路の動的内部電源ノードに供給電圧を提供するための回路であって、
一定の電源電圧を供給する静的電源に並列に結合された異なるチャネル型の第1のトランジスタおよび第2のトランジスタと、
前記第1のトランジスタと前記第2のトランジスタの間の共通ノードに接続された第1の端子および前記動的内部電源ノードに接続された第2の端子を有する磁性インダクタであり、前記動的内部電源ノードに結合された少なくとも1つの静電容量と共振することにより、前記動的内部電源ノードに、前記一定の電源電圧の大きさよりも大きな大きさを有するブースト電圧を供給する、前記磁性インダクタと、
前記少なくとも1つの静電容量とは異なるコンデンサであり、前記コンデンサの第1の端子が、前記第1のトランジスタと前記第2のトランジスタの間の前記共通ノードに接続され、前記コンデンサの第2の端子が前記動的内部電源ノードに接続されるように、前記磁性インダクタに並列に接続された、前記コンデンサと
を備える、回路。 - 他の一群の回路の動的内部電源ノードに供給電圧を提供するための回路であって、
並列に結合された異なるチャネル型の第1のトランジスタおよび第2のトランジスタであり、一定の電源電圧を供給する静的電源に接続された非ゲート端子および前記第1のトランジスタと前記第2のトランジスタの間の共通ノードに接続された別の非ゲート端子をそれぞれが有し、前記第1のトランジスタのゲートおよび前記第2のトランジスタの2つのゲートがブースト・クロックに接続された、前記第1のトランジスタおよび前記第2のトランジスタと、
前記第1のトランジスタと前記第2のトランジスタの間の前記共通ノードに接続された第1の端子および前記動的内部電源ノードに接続された第2の端子を有する磁性インダクタであり、前記ブースト・クロックの位相に応答して、前記動的内部電源ノードに結合された少なくとも1つの静電容量と共振することにより、前記動的内部電源ノードに、前記一定の電源電圧の大きさよりも大きな大きさを有するブースト電圧を供給する、前記磁性インダクタと、
前記少なくとも1つの静電容量とは異なるコンデンサであり、前記コンデンサの第1の端子が、前記第1のトランジスタと前記第2のトランジスタの間の前記共通ノードに接続され、前記コンデンサの第2の端子が前記動的内部電源ノードに接続されるように、前記磁性インダクタに並列に接続された、前記コンデンサと
を備える、回路。 - 前記他の一群の回路の中の動的論理回路に対する評価および静的論理回路に対する状態変化を制御する前記他の一群の回路の機能クロックと同期がとられたブースト・クロックの第1の位相に応答して、前記第1のトランジスタがディスエーブルされる、請求項1または2に記載の回路。
- 前記ブースト・クロックの第2の位相中に前記第1のトランジスタがディスエーブルにされていることに応答して、前記磁性インダクタが前記少なくとも1つの静電容量と共振して、前記動的内部電源ノードに前記ブースト電圧を供給する、請求項3に記載の回路。
- 評価時間中および前記状態変化中に前記ブースト電圧を提供するために、前記動的論理回路に対する前記評価時間および前記静的論理回路に対する前記状態変化に対応するタイミングで、前記ブースト・クロックの前記第2の位相が提供される、請求項4に記載の回路。
- 前記第2のトランジスタが、ブースト・クロックに結合された2つのゲート端子、前記動的内部電源ノードに接続されたソース端子、および前記静的電源に接続されたドレイン端子を有する、請求項1または2に記載の回路。
- 前記第1のトランジスタが、前記第2のトランジスタの前記2つのゲート端子に結合されたゲート端子、前記第2のトランジスタの前記ソース端子に接続されたソース端子、および前記第2のトランジスタの前記ドレイン端子に接続されたドレイン端子を有する、請求項6に記載の回路。
- 前記第2のトランジスタが、前記第1のトランジスタのゲート端子に接続された2つのゲート端子を有し、それによって、前記第2のトランジスタが、ブースト・クロックの第1の位相によってイネーブルされ、前記第2のトランジスタが、前記第1のトランジスタのソース端子に接続されたソース端子を有し、それによって、前記第1のトランジスタおよび前記第2のトランジスタが、前記磁性インダクタおよび前記少なくとも1つの静電容量を前記静的電源に結合する、請求項1に記載の回路。
- 前記他の一群の回路が、前記動的内部電源ノードとリターン・ノードの間に接続されており、前記少なくとも1つの静電容量が、前記他の一群の回路に由来する分路静電容量を含む、請求項1または2に記載の回路。
- 前記他の回路が、論理回路、メモリ回路、および論理要素とメモリ要素の両方を有する回路からなるグループから選択された、請求項1または2に記載の回路。
- 他の一群の回路の動的内部電源ノードに供給電圧を提供する集積回路を形成するための方法であって、
一定の電源電圧を供給する静的電源に並列に結合された異なるチャネル型の第1のトランジスタおよび第2のトランジスタを形成すること、
前記第1のトランジスタと前記第2のトランジスタの間の共通ノードに接続された第1の端子および前記動的内部電源ノードに接続された第2の端子を有するオンチップ磁性インダクタであり、前記動的内部電源ノードに結合された少なくとも1つの静電容量と共振することにより、前記動的内部電源ノードに、前記一定の電源電圧の大きさよりも大きな大きさを有するブースト電圧を供給する、前記オンチップ磁性インダクタを形成すること、ならびに
前記少なくとも1つの静電容量とは異なるコンデンサであり、前記コンデンサの第1の端子が、前記第1のトランジスタと前記第2のトランジスタの間の共通ノードに接続され、前記コンデンサの第2の端子が前記動的内部電源ノードに接続されるように、前記オンチップ磁性インダクタに並列に接続された、前記コンデンサを形成すること
を含む、方法。
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US15/597,978 US10003337B1 (en) | 2017-05-17 | 2017-05-17 | Resonant virtual supply booster for synchronous logic circuits and other circuits with use of on-chip integrated magnetic inductor |
US15/597,978 | 2017-05-17 | ||
US15/962,510 | 2018-04-25 | ||
US15/962,510 US10389356B2 (en) | 2017-05-17 | 2018-04-25 | Resonant virtual supply booster for synchronous logic circuits and other circuits with use of on-chip integrated magnetic inductor |
PCT/IB2018/053334 WO2018211399A1 (en) | 2017-05-17 | 2018-05-14 | Providing supply voltage to a dynamic internal power supply node |
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JP2020520218A JP2020520218A (ja) | 2020-07-02 |
JP7083558B2 true JP7083558B2 (ja) | 2022-06-13 |
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US (4) | US10003337B1 (ja) |
JP (1) | JP7083558B2 (ja) |
CN (1) | CN110622406B (ja) |
DE (1) | DE112018001288T5 (ja) |
GB (1) | GB2577196A (ja) |
WO (1) | WO2018211399A1 (ja) |
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JP6469999B2 (ja) | 2014-09-11 | 2019-02-13 | ローム株式会社 | ブートストラップ回路 |
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CN110622406A (zh) | 2019-12-27 |
DE112018001288T5 (de) | 2020-01-02 |
WO2018211399A1 (en) | 2018-11-22 |
US10389356B2 (en) | 2019-08-20 |
US10270443B2 (en) | 2019-04-23 |
US10256819B2 (en) | 2019-04-09 |
US20180337677A1 (en) | 2018-11-22 |
GB2577196A (en) | 2020-03-18 |
JP2020520218A (ja) | 2020-07-02 |
US20180337679A1 (en) | 2018-11-22 |
US20180337678A1 (en) | 2018-11-22 |
CN110622406B (zh) | 2021-11-12 |
GB201916879D0 (en) | 2020-01-01 |
US10003337B1 (en) | 2018-06-19 |
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