JP6836191B2 - 発光素子の製造方法 - Google Patents
発光素子の製造方法 Download PDFInfo
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- JP6836191B2 JP6836191B2 JP2017174325A JP2017174325A JP6836191B2 JP 6836191 B2 JP6836191 B2 JP 6836191B2 JP 2017174325 A JP2017174325 A JP 2017174325A JP 2017174325 A JP2017174325 A JP 2017174325A JP 6836191 B2 JP6836191 B2 JP 6836191B2
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- Prior art keywords
- light emitting
- emitting element
- wet etching
- manufacturing
- substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0095—Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/24—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate of the light emitting region, e.g. non-planar junction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/40—Materials therefor
- H01L33/42—Transparent materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
Description
11:n層
12:発光層
13:p層
14:透明電極
15:p電極
16:n電極
17:絶縁膜
20:熱剥離テープ
21:スクライブ溝
22:変質層
23:保護膜
24:UVテープ
Claims (8)
- 表面に複数の発光素子構造が形成されたIII 族窒化物半導体からなる基板の裏面に、素子分割予定のラインに沿ってレーザーを照射してスクライブ溝を形成するスクライブ溝形成工程と、
前記スクライブ溝に形成された変質層を、フッ酸系溶液を用いたウェットエッチングと、アルカリ溶液を用いたウェットエッチングを交互に繰り返し行うことによって除去する変質層除去工程と、
前記スクライブ溝に沿って前記基板を分割することにより、各発光素子に分割する素子分割工程と、
を有することを特徴とする発光素子の製造方法。 - 前記変質層除去工程におけるフッ酸系溶液を用いたウェットエッチングと、アルカリ溶液を用いたウェットエッチングの繰り返し回数は3回以上である、ことを特徴とする請求項1に記載の発光素子の製造方法。
- 前記フッ酸系溶液は、バッファードフッ酸である、ことを特徴とする請求項1または請求項2に記載の発光素子の製造方法。
- 前記フッ酸系溶液の温度は50℃以上である、ことを特徴とする請求項1ないし請求項3のいずれか1項に記載の発光素子の製造方法。
- 前記アルカリ溶液は、メタノールアミンを含む、ことを特徴とする請求項1ないし請求項4のいずれか1項に記載の発光素子の製造方法。
- 前記アルカリ溶液の温度は100℃以上である、ことを特徴とする請求項1ないし請求項5のいずれか1項に記載の発光素子の製造方法。
- 前記スクライブ溝形成工程は、レーザーの照射前に、前記発光素子構造の上面に熱剥離テープを貼り付けて支持し、レーザーを照射してスクライブ溝を形成した後、加熱により前記熱剥離テープを前記発光素子構造から剥離させる、ことを特徴とする請求項1ないし請求項6のいずれか1項に記載の発光素子の製造方法。
- 前記熱剥離テープの熱剥離温度は100℃以上であり、粘着力は5N/20mm以上である、ことを特徴とする請求項7に記載の発光素子の製造方法。
Priority Applications (2)
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JP2017174325A JP6836191B2 (ja) | 2017-09-11 | 2017-09-11 | 発光素子の製造方法 |
US16/114,574 US10566495B2 (en) | 2017-09-11 | 2018-08-28 | Method for producing light-emitting device |
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JP2017174325A JP6836191B2 (ja) | 2017-09-11 | 2017-09-11 | 発光素子の製造方法 |
Publications (2)
Publication Number | Publication Date |
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JP2019050312A JP2019050312A (ja) | 2019-03-28 |
JP6836191B2 true JP6836191B2 (ja) | 2021-02-24 |
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JP2017174325A Active JP6836191B2 (ja) | 2017-09-11 | 2017-09-11 | 発光素子の製造方法 |
Country Status (2)
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US (1) | US10566495B2 (ja) |
JP (1) | JP6836191B2 (ja) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20220004847A (ko) * | 2020-07-02 | 2022-01-12 | 삼성디스플레이 주식회사 | 표시 장치 및 이의 제조 방법 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101119727B1 (ko) * | 2004-03-31 | 2012-03-23 | 니치아 카가쿠 고교 가부시키가이샤 | 질화물 반도체 발광 소자 |
JP2007142277A (ja) * | 2005-11-21 | 2007-06-07 | Matsushita Electric Works Ltd | 発光素子の製造方法 |
DE102010030358B4 (de) * | 2010-06-22 | 2014-05-22 | Osram Opto Semiconductors Gmbh | Verfahren zum Abtrennen einer Substratscheibe |
JP2012016726A (ja) * | 2010-07-08 | 2012-01-26 | Mitsubishi Chemicals Corp | 窒化物材料の加工方法、半導体機能素子の製造方法、半導体発光素子の製造方法、半導体発光素子アレイ、半導体発光素子およびレーザ加工装置 |
JP5716524B2 (ja) | 2011-05-06 | 2015-05-13 | 日亜化学工業株式会社 | 発光素子の製造方法 |
JP2014016726A (ja) | 2012-07-06 | 2014-01-30 | Keyware Solutions Inc | 認証装置、認証方法、扉開閉管理装置及びコンピュータプログラム |
JP6301726B2 (ja) * | 2014-05-07 | 2018-03-28 | 株式会社ディスコ | 光デバイスの加工方法 |
TWI614914B (zh) * | 2014-07-11 | 2018-02-11 | 晶元光電股份有限公司 | 發光元件及其製造方法 |
US10363629B2 (en) * | 2017-06-01 | 2019-07-30 | Applied Materials, Inc. | Mitigation of particle contamination for wafer dicing processes |
US11121050B2 (en) * | 2017-06-30 | 2021-09-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of manufacture of a semiconductor device |
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2017
- 2017-09-11 JP JP2017174325A patent/JP6836191B2/ja active Active
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2018
- 2018-08-28 US US16/114,574 patent/US10566495B2/en active Active
Also Published As
Publication number | Publication date |
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JP2019050312A (ja) | 2019-03-28 |
US20190081205A1 (en) | 2019-03-14 |
US10566495B2 (en) | 2020-02-18 |
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