JP6806436B2 - 半導体装置用基板とその製造方法、および半導体装置 - Google Patents

半導体装置用基板とその製造方法、および半導体装置 Download PDF

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Publication number
JP6806436B2
JP6806436B2 JP2015226212A JP2015226212A JP6806436B2 JP 6806436 B2 JP6806436 B2 JP 6806436B2 JP 2015226212 A JP2015226212 A JP 2015226212A JP 2015226212 A JP2015226212 A JP 2015226212A JP 6806436 B2 JP6806436 B2 JP 6806436B2
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metal
semiconductor device
substrate
metal portion
master substrate
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JP2015226212A
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Japanese (ja)
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JP2017098315A5 (https=
JP2017098315A (ja
Inventor
中川　宏史
宏史 中川
佑也 五郎丸
佑也 五郎丸
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Maxell Ltd
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Maxell Holdings Ltd
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Priority to JP2015226212A priority Critical patent/JP6806436B2/ja
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Publication of JP2017098315A5 publication Critical patent/JP2017098315A5/ja
Priority to JP2020198627A priority patent/JP7339231B2/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/726—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked lead frame, conducting package substrate or heat sink

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  • Lead Frames For Integrated Circuits (AREA)
JP2015226212A 2015-11-19 2015-11-19 半導体装置用基板とその製造方法、および半導体装置 Active JP6806436B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2015226212A JP6806436B2 (ja) 2015-11-19 2015-11-19 半導体装置用基板とその製造方法、および半導体装置
JP2020198627A JP7339231B2 (ja) 2015-11-19 2020-11-30 半導体装置用基板、半導体装置

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JP2015226212A JP6806436B2 (ja) 2015-11-19 2015-11-19 半導体装置用基板とその製造方法、および半導体装置

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JP2020198627A Division JP7339231B2 (ja) 2015-11-19 2020-11-30 半導体装置用基板、半導体装置

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JP2017098315A JP2017098315A (ja) 2017-06-01
JP2017098315A5 JP2017098315A5 (https=) 2018-10-11
JP6806436B2 true JP6806436B2 (ja) 2021-01-06

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Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019212649A (ja) * 2018-05-31 2019-12-12 マクセルホールディングス株式会社 半導体装置用基板とその製造方法、および半導体装置
JP2022189979A (ja) * 2020-11-30 2022-12-22 マクセル株式会社 半導体装置用基板、半導体装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4942827B2 (https=) * 1971-11-15 1974-11-16
JP3764587B2 (ja) * 1998-06-30 2006-04-12 富士通株式会社 半導体装置の製造方法
JP3455685B2 (ja) * 1998-11-05 2003-10-14 新光電気工業株式会社 半導体装置の製造方法
JP4362163B2 (ja) * 1999-04-06 2009-11-11 富士通マイクロエレクトロニクス株式会社 半導体装置の製造方法
JP2001230345A (ja) * 2000-02-17 2001-08-24 Sumitomo Metal Mining Co Ltd 半導体装置及びその製造方法並びにその製造に用いられるリードフレーム
US7538415B1 (en) * 2003-11-20 2009-05-26 Bridge Semiconductor Corporation Semiconductor chip assembly with bumped terminal, filler and insulative base
JP2006093575A (ja) * 2004-09-27 2006-04-06 Hitachi Cable Ltd 半導体装置およびその製造方法
US20100123230A1 (en) * 2008-11-20 2010-05-20 Frederick Rodriguez Dahilig Integrated circuit packaging system having bumped lead and method of manufacture thereof
JP5851888B2 (ja) * 2012-03-02 2016-02-03 ルネサスエレクトロニクス株式会社 半導体装置の製造方法および半導体装置
JP2013042187A (ja) * 2012-11-29 2013-02-28 Hitachi Maxell Ltd 半導体装置

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