JP6749834B2 - 基板上の三次元構造の層のｎｈ３含有プラズマ窒化 - Google Patents

基板上の三次元構造の層のｎｈ３含有プラズマ窒化 Download PDF

Info

Publication number
JP6749834B2
JP6749834B2 JP2016500578A JP2016500578A JP6749834B2 JP 6749834 B2 JP6749834 B2 JP 6749834B2 JP 2016500578 A JP2016500578 A JP 2016500578A JP 2016500578 A JP2016500578 A JP 2016500578A JP 6749834 B2 JP6749834 B2 JP 6749834B2
Authority
JP
Japan
Prior art keywords
layer
substrate
plasma
nitrogen
gas
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2016500578A
Other languages
English (en)
Japanese (ja)
Other versions
JP2016512395A5 (enExample
JP2016512395A (ja
Inventor
テレサ クレーマー グアリーニ，
テレサ クレーマー グアリーニ，
ウェイ リウ，
ウェイ リウ，
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Applied Materials Inc
Original Assignee
Applied Materials Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Applied Materials Inc filed Critical Applied Materials Inc
Publication of JP2016512395A publication Critical patent/JP2016512395A/ja
Publication of JP2016512395A5 publication Critical patent/JP2016512395A5/ja
Application granted granted Critical
Publication of JP6749834B2 publication Critical patent/JP6749834B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02269—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by thermal evaporation
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/56—After-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02247—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by nitridation, e.g. nitridation of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02252—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by plasma treatment, e.g. plasma oxidation of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02321—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer
    • H01L21/02329—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of nitrogen
    • H01L21/02332—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of nitrogen into an oxide layer, e.g. changing SiO to SiON
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H01L21/0234—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28202—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67098—Apparatus for thermal treatment
    • H01L21/67115—Apparatus for thermal treatment mainly by radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68742—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a lifting arrangement, e.g. lift pins
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68757—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a coating or a hardness or a material

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Plasma & Fusion (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Mechanical Engineering (AREA)
  • Materials Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Formation Of Insulating Films (AREA)
  • Semiconductor Memories (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Plasma Technology (AREA)
  • Chemical Vapour Deposition (AREA)
JP2016500578A 2013-03-15 2014-03-04 基板上の三次元構造の層のｎｈ３含有プラズマ窒化 Active JP6749834B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201361790444P 2013-03-15 2013-03-15
US61/790,444 2013-03-15
US14/195,273 2014-03-03
US14/195,273 US9177787B2 (en) 2013-03-15 2014-03-03 NH3 containing plasma nitridation of a layer of a three dimensional structure on a substrate
PCT/US2014/020130 WO2014149656A1 (en) 2013-03-15 2014-03-04 Nh3 containing plasma nitridation of a layer of a three dimensional structure on a substrate

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2019035770A Division JP2019125798A (ja) 2013-03-15 2019-02-28 基板上の三次元構造の層のｎｈ３含有プラズマ窒化

Publications (3)

Publication Number Publication Date
JP2016512395A JP2016512395A (ja) 2016-04-25
JP2016512395A5 JP2016512395A5 (enExample) 2017-04-13
JP6749834B2 true JP6749834B2 (ja) 2020-09-02

Family

ID=51529015

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2016500578A Active JP6749834B2 (ja) 2013-03-15 2014-03-04 基板上の三次元構造の層のｎｈ３含有プラズマ窒化
JP2019035770A Pending JP2019125798A (ja) 2013-03-15 2019-02-28 基板上の三次元構造の層のｎｈ３含有プラズマ窒化

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2019035770A Pending JP2019125798A (ja) 2013-03-15 2019-02-28 基板上の三次元構造の層のｎｈ３含有プラズマ窒化

Country Status (6)

Country Link
US (1) US9177787B2 (enExample)
JP (2) JP6749834B2 (enExample)
KR (1) KR102244381B1 (enExample)
CN (1) CN105009259B (enExample)
TW (1) TWI618152B (enExample)
WO (1) WO2014149656A1 (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9355820B2 (en) 2013-09-12 2016-05-31 Applied Materials, Inc. Methods for removing carbon containing films
US9312145B2 (en) * 2014-03-07 2016-04-12 Globalfoundries Inc. Conformal nitridation of one or more fin-type transistor layers
KR101965992B1 (ko) * 2014-12-25 2019-04-04 가부시키가이샤 코쿠사이 엘렉트릭 반도체 장치의 제조 방법, 기록 매체 및 기판 처리 장치
JP2019504481A (ja) * 2015-12-07 2019-02-14 アプライド マテリアルズ インコーポレイテッドＡｐｐｌｉｅｄ Ｍａｔｅｒｉａｌｓ，Ｉｎｃｏｒｐｏｒａｔｅｄ 静電チャックを使用した基板の固定と開放のための方法及び装置
US10103027B2 (en) 2016-06-20 2018-10-16 Applied Materials, Inc. Hydrogenation and nitridization processes for modifying effective oxide thickness of a film
US10510545B2 (en) 2016-06-20 2019-12-17 Applied Materials, Inc. Hydrogenation and nitridization processes for modifying effective oxide thickness of a film
US10971357B2 (en) 2018-10-04 2021-04-06 Applied Materials, Inc. Thin film treatment process
CN111326470A (zh) * 2018-12-17 2020-06-23 夏泰鑫半导体(青岛)有限公司 静电夹盘及半导体设备
WO2021150625A1 (en) 2020-01-23 2021-07-29 Applied Materials, Inc. Method of cleaning a structure and method of depositiing a capping layer in a structure
JP2023018347A (ja) * 2021-07-27 2023-02-08 キオクシア株式会社 基板支持装置および基板処理装置
CN116031141A (zh) * 2022-12-25 2023-04-28 北京屹唐半导体科技股份有限公司 工件处理方法、工件处理设备及半导体器件
CN115863151B (zh) * 2022-12-25 2023-10-27 北京屹唐半导体科技股份有限公司 工件处理方法、工件处理设备及半导体器件

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4397491B2 (ja) * 1999-11-30 2010-01-13 財団法人国際科学振興財団 １１１面方位を表面に有するシリコンを用いた半導体装置およびその形成方法
US6610615B1 (en) * 2000-11-15 2003-08-26 Intel Corporation Plasma nitridation for reduced leakage gate dielectric layers
KR101044366B1 (ko) * 2002-06-12 2011-06-29 어플라이드 머티어리얼스, 인코포레이티드 기판을 처리하기 위한 플라즈마 방법 및 장치
JP2004335980A (ja) 2003-05-12 2004-11-25 Sumitomo Electric Ind Ltd シリコン窒化膜を形成する方法及び半導体装置の製造方法
CN100461341C (zh) * 2003-05-28 2009-02-11 应用材料有限公司 使用调幅射频能量的栅极介电层的等离子体氮化方法和设备
US7179754B2 (en) * 2003-05-28 2007-02-20 Applied Materials, Inc. Method and apparatus for plasma nitridation of gate dielectrics using amplitude modulated radio-frequency energy
JP2005150637A (ja) 2003-11-19 2005-06-09 Canon Inc 処理方法及び装置
WO2006106665A1 (ja) * 2005-03-31 2006-10-12 Tokyo Electron Limited 基板の窒化処理方法および絶縁膜の形成方法
US8318554B2 (en) * 2005-04-28 2012-11-27 Semiconductor Energy Laboratory Co., Ltd. Method of forming gate insulating film for thin film transistors using plasma oxidation
KR100942106B1 (ko) * 2005-06-08 2010-02-12 고쿠리츠다이가쿠호진 도호쿠다이가쿠 플라즈마 질화 처리 방법, 반도체 장치의 제조 방법 및플라즈마 처리 장치
KR101163816B1 (ko) * 2005-09-22 2012-07-09 도쿄엘렉트론가부시키가이샤 플라즈마 처리 방법 및 장치
WO2007106660A2 (en) * 2006-03-09 2007-09-20 Applied Materials, Inc. Method and apparatus for fabricating a high dielectric constant transistor gate using a low energy plasma system
JPWO2008081724A1 (ja) * 2006-12-28 2010-04-30 東京エレクトロン株式会社 絶縁膜の形成方法および半導体装置の製造方法
US20110017127A1 (en) * 2007-08-17 2011-01-27 Epispeed Sa Apparatus and method for producing epitaxial layers
US8481433B2 (en) 2009-03-31 2013-07-09 Applied Materials, Inc. Methods and apparatus for forming nitrogen-containing layers
US20110001169A1 (en) * 2009-07-01 2011-01-06 International Business Machines Corporation Forming uniform silicide on 3d structures
US20110061812A1 (en) * 2009-09-11 2011-03-17 Applied Materials, Inc. Apparatus and Methods for Cyclical Oxidation and Etching
JP2011077321A (ja) * 2009-09-30 2011-04-14 Tokyo Electron Ltd 選択的プラズマ窒化処理方法及びプラズマ窒化処理装置
US8962454B2 (en) * 2010-11-04 2015-02-24 Tokyo Electron Limited Method of depositing dielectric films using microwave plasma
US9054048B2 (en) 2011-07-05 2015-06-09 Applied Materials, Inc. NH3 containing plasma nitridation of a layer on a substrate

Also Published As

Publication number Publication date
TWI618152B (zh) 2018-03-11
US20140273517A1 (en) 2014-09-18
US9177787B2 (en) 2015-11-03
TW201445641A (zh) 2014-12-01
WO2014149656A1 (en) 2014-09-25
CN105009259A (zh) 2015-10-28
KR20150132529A (ko) 2015-11-25
KR102244381B1 (ko) 2021-04-26
JP2019125798A (ja) 2019-07-25
CN105009259B (zh) 2018-11-16
JP2016512395A (ja) 2016-04-25

Similar Documents

Publication Publication Date Title
JP6749834B2 (ja) 基板上の三次元構造の層のｎｈ３含有プラズマ窒化
US9054048B2 (en) NH3 containing plasma nitridation of a layer on a substrate
US8546273B2 (en) Methods and apparatus for forming nitrogen-containing layers
TWI406337B (zh) 用於半導體裝置之氧化的方法
JP7685006B2 (ja) ３ｄｎａｎｄ応用のためのメモリセルの製造
KR102419980B1 (ko) 금속 실리사이드 배선 나노와이어 구조를 형성하기 위한 방법들
US20100267248A1 (en) Post Treatment Methods for Oxide Layers on Semiconductor Devices
TWI587389B (zh) 基板處理方法
JP2016512395A5 (enExample)
US20110189860A1 (en) Methods for nitridation and oxidation
SG176700A1 (en) Methods of forming oxide layers on substrates
US20230377958A1 (en) Cluster processing system for forming a metal containing material
WO2016111833A1 (en) Direct deposition of nickel silicide nanowire
TW201515103A (zh) 用於穩定界面後蝕刻以盡量減少下一處理步驟前佇列時間問題的方法
TWI716441B (zh) 用於製造對於半導體應用的水平環繞式閘極裝置的奈米線的方法
CN103930992B (zh) 间层多晶硅电介质帽和形成该间层多晶硅电介质帽的方法
US9355820B2 (en) Methods for removing carbon containing films

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20170306

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20170306

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20180129

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20180206

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20180507

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20181030

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20190228

A911 Transfer to examiner for re-examination before appeal (zenchi)

Free format text: JAPANESE INTERMEDIATE CODE: A911

Effective date: 20190307

A912 Re-examination (zenchi) completed and case transferred to appeal board

Free format text: JAPANESE INTERMEDIATE CODE: A912

Effective date: 20190607

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20200522

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20200812

R150 Certificate of patent or registration of utility model

Ref document number: 6749834

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250