JP6657545B2 - シリコン貫通ビア(tsv)を使用したマイクロホンデバイスが一体化されているダイ - Google Patents
シリコン貫通ビア(tsv)を使用したマイクロホンデバイスが一体化されているダイ Download PDFInfo
- Publication number
- JP6657545B2 JP6657545B2 JP2017505471A JP2017505471A JP6657545B2 JP 6657545 B2 JP6657545 B2 JP 6657545B2 JP 2017505471 A JP2017505471 A JP 2017505471A JP 2017505471 A JP2017505471 A JP 2017505471A JP 6657545 B2 JP6657545 B2 JP 6657545B2
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- semiconductor substrate
- tsv
- microphone
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- membrane
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Images
Classifications
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- Otolaryngology (AREA)
- Electrostatic, Electromagnetic, Magneto- Strictive, And Variable-Resistance Transducers (AREA)
- Micromachines (AREA)
- Pressure Sensors (AREA)
- Obtaining Desirable Characteristics In Audible-Bandwidth Transducers (AREA)
- Circuit For Audible Band Transducer (AREA)
- Details Of Audible-Bandwidth Transducers (AREA)
Description
[項目1]
第1の側、および上記第1の側と相対して配設される第2の側を有する半導体基板と、
上記半導体基板の上記第1の側に形成される相互接続層と、
上記半導体基板を通して形成され、かつ上記半導体基板の上記第1の側と上記半導体基板の上記第2の側との間で複数の電気信号を特定の経路を通じて送るシリコン貫通ビア(TSV)と、
上記半導体基板の上記第2の側に形成され、かつ上記TSVと電気的に結合されるマイクロホンデバイスと、を備える、装置。
[項目2]
上記半導体基板の上記第1の側に形成されるデバイス層をさらに備え、上記TSVは上記デバイス層の能動デバイスと上記マイクロホンデバイスとの間で複数の電気信号を特定の経路を通じて送る、項目1に記載の装置。
[項目3]
上記TSVは複数のシリコン貫通ビア(TSV)の第1のTSVであり、
上記複数のTSVの第2のTSVは、上記マイクロホンデバイスを構造的に支持し、上記デバイス層と上記マイクロホンデバイスとの間で複数の電気信号を特定の経路を通じて送らない、項目2に記載の装置。
[項目4]
上記マイクロホンデバイスは、
上記半導体基板の上記第2の側に配設され、かつ上記TSVと結合されるバックプレートと、
コンデンサを形成するために上記バックプレートと結合されるメンブレン膜と
を有する、項目1から3のいずれか一項に記載の装置。
[項目5]
上記マイクロホンデバイスは、
上記メンブレン膜に隣接した上記半導体基板において形成されるチャンバをさらに備える、項目4に記載の装置。
[項目6]
上記マイクロホンデバイスを覆うリッドをさらに備える、項目4または5に記載の装置。
[項目7]
上記半導体基板の上記第2の側に配設されるパッシベーション層であって、上記バックプレートの少なくとも一部分と上記半導体基板との間に配設されるパッシベーション層と、
上記パッシベーション層上に配設され、かつ空洞が形成されている空洞層であって、上記メンブレン膜は上記空洞に配設され、上記リッドは上記空洞層と結合される、空洞層と
をさらに備える、項目6に記載の装置。
[項目8]
上記リッドは音口穴を含む、項目6または7に記載の装置。
[項目9]
音口穴を含むフリップチップ基板をさらに備え、
上記半導体基板はフリップチップ構成における上記フリップチップ基板と結合されるダイの一部であり、
上記リッドは空洞を形成するために上記フリップチップ基板と結合され、
上記ダイは上記空洞内に配設され、
上記音口穴は上記空洞への音の通路を提供する、項目6から8のいずれか一項に記載の装置。
[項目10]
上記半導体基板は第1のダイの一部であり、
上記第1のダイは第2のダイと結合され、
上記第2のダイは上記マイクロホンデバイスの受信機回路またはセンサ回路を含む、項目1〜5のうちいずれか一項に記載の装置。
[項目11]
上記マイクロホンデバイスは、上記半導体基板の上記第2の側に形成される複数のマイクロホンデバイスのうちの1つである、項目1〜5のうちいずれか一項に記載の装置。
[項目12]
第1の側、および上記第1の側と相対して配設される第2の側を有する半導体基板、および、上記半導体基板の上記第1の側における相互接続層を設けることと、
上記半導体基板を通してシリコン貫通ビア(TSV)を形成することであって、上記TSVは、上記半導体基板の上記第1の側と上記半導体基板の上記第2の側との間で電気信号を特定の経路を通じて送る、形成することと、
上記TSVと電気的に結合されているマイクロホンデバイスを、上記半導体基板の上記第2の側に形成することと、を含む、方法。
[項目13]
半導体基板を設けることは、デバイス層が上記半導体基板の上記第1の側に形成されている半導体基板を設けることをさらに含み、上記TSVは上記デバイス層の能動デバイスと上記マイクロホンデバイスとの間で複数の電気信号を特定の経路を通じて送る、項目12に記載の方法。
[項目14]
上記マイクロホンデバイスを形成することは、
上記TSVと結合されているバックプレートを上記半導体基板の上記第2の側に形成することと、
コンデンサを形成するために上記バックプレート上にメンブレン膜を形成することと
を含む、項目12または13に記載の方法。
[項目15]
上記メンブレン膜を形成することは、
犠牲材料を上記バックプレート上に堆積させることと、
上記メンブレン膜の材料を上記犠牲材料上に堆積させることと、
上記犠牲材料を除去することと
を含む、項目14に記載の方法。
[項目16]
上記メンブレン膜に隣接した上記半導体基板においてチャンバを形成することをさらに含む、項目14または15に記載の方法。
[項目17]
上記マイクロホンデバイスをリッドで覆うことをさらに含む、項目12から16のいずれか一項に記載の方法。
[項目18]
上記半導体基板は上記マイクロホンデバイスを形成するプロセスの少なくとも一部の間に一時的なキャリアと結合され、
上記半導体基板は、上記マイクロホンデバイスを上記リッドで覆った後に上記一時的なキャリアから切り離される、項目17に記載の方法。
[項目19]
回路基板と、
上記回路基板と電気的に結合されるダイと
を備え、
上記ダイは、
第1の側、および上記第1の側と相対して配設される第2の側を有する半導体基板と、
上記半導体基板の上記第1の側に形成される相互接続層と、
上記半導体基板を通して形成され、かつ上記半導体基板の上記第1の側と上記半導体基板の上記第2の側との間で複数の電気信号を特定の経路を通じて送るシリコン貫通ビア(TSV)と、
上記半導体基板の上記第2の側に形成され、かつ上記TSVと電気的に結合されるマイクロホンデバイスを有する、コンピューティングデバイス。
[項目20]
上記ダイはパッケージ基板と結合され、
上記パッケージ基板は上記回路基板と結合される、項目19に記載のコンピューティングデバイス。
[項目21]
上記コンピューティングデバイスは、アンテナ、ディスプレイ、タッチスクリーンディスプレイ、タッチスクリーンコントローラ、バッテリ、オーディオコーデック、ビデオコーデック、電力増幅器、全地球測位システム(GPS)デバイス、コンパス、ガイガーカウンタ、加速度計、ジャイロスコープ、スピーカ、およびカメラのうちの1または複数を含むモバイルコンピューティングデバイスである、項目19または20に記載のコンピューティングデバイス。
Claims (25)
- 第1の側、および前記第1の側と相対して配設される第2の側を有する半導体基板と、
前記半導体基板の前記第1の側に形成される相互接続層と、
前記半導体基板を通して形成され、かつ前記半導体基板の前記第1の側と前記半導体基板の前記第2の側との間で複数の電気信号を特定の経路を通じて送るシリコン貫通ビア(TSV)と、
前記半導体基板の前記第2の側に形成され、かつ前記TSVと電気的に結合されるマイクロホンデバイスと、を備え、
前記マイクロホンデバイスは、前記半導体基板の前記第2の側に配設され、かつ前記TSVと結合されるバックプレートと、コンデンサを形成するために前記バックプレートと結合されるメンブレン膜とを有し、前記バックプレートと前記メンブレン膜との間には空隙が形成されており、
前記マイクロホンデバイスは、前記半導体基板の内部において前記半導体基板の前記第2の側に形成されるチャンバをさらに備え、
前記バックプレートは、前記メンブレン膜と前記チャンバとの間に設けられる、
装置。 - 前記半導体基板の前記第1の側に形成されるデバイス層をさらに備え、前記TSVは前記デバイス層の能動デバイスと前記マイクロホンデバイスとの間で複数の電気信号を特定の経路を通じて送る、請求項1に記載の装置。
- 前記TSVは複数のシリコン貫通ビア(TSV)の第1のTSVであり、
前記複数のTSVの第2のTSVは、前記マイクロホンデバイスを構造的に支持し、前記デバイス層と前記マイクロホンデバイスとの間で複数の電気信号を特定の経路を通じて送らない、請求項2に記載の装置。 - 前記第2のTSVは、少なくとも一部が前記チャンバ内を延伸する、請求項3に記載の装置。
- 前記マイクロホンデバイスを覆うリッドをさらに備える、請求項1から4のいずれか一項に記載の装置。
- 前記半導体基板の前記第2の側に配設されるパッシベーション層であって、前記バックプレートの少なくとも一部分と前記半導体基板との間に配設されるパッシベーション層と、
前記パッシベーション層上に配設され、かつ空洞が形成されている空洞層であって、前記メンブレン膜は前記空洞に配設され、前記リッドは前記空洞層と結合される、空洞層と
をさらに備える、請求項5に記載の装置。 - 前記リッドは音口穴を含む、請求項5または6に記載の装置。
- 音口穴を含むフリップチップ基板をさらに備え、
前記半導体基板はフリップチップ構成における前記フリップチップ基板と結合されるダイの一部であり、
前記リッドは空洞を形成するために前記フリップチップ基板と結合され、
前記ダイは前記空洞内に配設され、
前記音口穴は前記空洞への音の通路を提供する、請求項5から7のいずれか一項に記載の装置。 - 前記半導体基板は第1のダイの一部であり、
前記第1のダイは第2のダイと結合され、
前記第2のダイは前記マイクロホンデバイスの受信機回路またはセンサ回路を含む、請求項1〜8のうちいずれか一項に記載の装置。 - 前記マイクロホンデバイスは、前記半導体基板の前記第2の側に形成される複数のマイクロホンデバイスのうちの1つである、請求項1〜9のうちいずれか一項に記載の装置。
- 前記バックプレートは、前記バックプレートを通して形成された1または複数の開口部を有し、前記メンブレン膜は、前記メンブレン膜を通して形成された1または複数の開口部を有し、前記チャンバは、前記バックプレートの前記1または複数の開口部、前記バックプレートと前記メンブレン膜との間の前記空隙、および前記メンブレン膜の前記1または複数の開口部を通して、外部空間と連通する、請求項1から10のいずれか一項に記載の装置。
- 第1の側、および前記第1の側と相対して配設される第2の側を有する半導体基板、および、前記半導体基板の前記第1の側における相互接続層を設けることと、
前記半導体基板を通してシリコン貫通ビア(TSV)を形成することであって、前記TSVは、前記半導体基板の前記第1の側と前記半導体基板の前記第2の側との間で電気信号を特定の経路を通じて送る、形成することと、
前記TSVと電気的に結合されているマイクロホンデバイスを、前記半導体基板の前記第2の側に形成することと、を含み、
前記マイクロホンデバイスを形成することは、前記TSVと結合されているバックプレートを前記半導体基板の前記第2の側に形成することと、コンデンサを形成するために前記バックプレート上にメンブレン膜を形成することとを含み、
前記メンブレン膜を形成することは、犠牲材料を前記バックプレート上に堆積させることと、前記メンブレン膜の材料を前記犠牲材料上に堆積させることと、前記犠牲材料を除去して前記バックプレートと前記メンブレン膜との間に空隙を形成することとを含み、
前記半導体基板の内部において前記半導体基板の前記第2の側にチャンバを形成することをさらに含み、
前記バックプレートは、前記メンブレン膜と前記チャンバとの間に設けられる、
方法。 - 半導体基板を設けることは、デバイス層が前記半導体基板の前記第1の側に形成されている半導体基板を設けることをさらに含み、前記TSVは前記デバイス層の能動デバイスと前記マイクロホンデバイスとの間で複数の電気信号を特定の経路を通じて送る、請求項12に記載の方法。
- 前記TSVは複数のシリコン貫通ビア(TSV)の第1のTSVであり、
前記複数のTSVの第2のTSVは、前記マイクロホンデバイスを構造的に支持し、前記デバイス層と前記マイクロホンデバイスとの間で複数の電気信号を特定の経路を通じて送らない、請求項13に記載の方法。 - 前記第2のTSVは、少なくとも一部が前記チャンバ内を延伸する、請求項14に記載の方法。
- 前記マイクロホンデバイスをリッドで覆うことをさらに含む、請求項12から15のいずれか一項に記載の方法。
- 前記半導体基板は前記マイクロホンデバイスを形成するプロセスの少なくとも一部の間に一時的なキャリアと結合され、
前記半導体基板は、前記マイクロホンデバイスを前記リッドで覆った後に前記一時的なキャリアから切り離される、請求項16に記載の方法。 - 前記バックプレートは、前記バックプレートを通して形成された1または複数の開口部を有し、前記メンブレン膜は、前記メンブレン膜を通して形成された1または複数の開口部を有し、前記チャンバは、前記バックプレートの前記1または複数の開口部、前記バックプレートと前記メンブレン膜との間の前記空隙、および前記メンブレン膜の前記1または複数の開口部を通して、外部空間と連通する、請求項12から17のいずれか一項に記載の方法。
- 回路基板と、
前記回路基板と電気的に結合されるダイと
を備え、
前記ダイは、
第1の側、および前記第1の側と相対して配設される第2の側を有する半導体基板と、
前記半導体基板の前記第1の側に形成される相互接続層と、
前記半導体基板を通して形成され、かつ前記半導体基板の前記第1の側と前記半導体基板の前記第2の側との間で複数の電気信号を特定の経路を通じて送るシリコン貫通ビア(TSV)と、
前記半導体基板の前記第2の側に形成され、かつ前記TSVと電気的に結合されるマイクロホンデバイスを有し、
前記マイクロホンデバイスは、前記半導体基板の前記第2の側に配設され、かつ前記TSVと結合されるバックプレートと、コンデンサを形成するために前記バックプレートと結合されるメンブレン膜とを有し、前記バックプレートと前記メンブレン膜との間には空隙が形成されており、
前記マイクロホンデバイスは、前記半導体基板の内部において前記半導体基板の前記第2の側に形成されるチャンバをさらに備え、
前記バックプレートは、前記メンブレン膜と前記チャンバとの間に設けられる、
コンピューティングデバイス。 - 前記半導体基板の前記第1の側に形成されるデバイス層をさらに備え、前記TSVは前記デバイス層の能動デバイスと前記マイクロホンデバイスとの間で複数の電気信号を特定の経路を通じて送る、請求項19に記載のコンピューティングデバイス。
- 前記TSVは複数のシリコン貫通ビア(TSV)の第1のTSVであり、
前記複数のTSVの第2のTSVは、前記マイクロホンデバイスを構造的に支持し、前記デバイス層と前記マイクロホンデバイスとの間で複数の電気信号を特定の経路を通じて送らない、請求項20に記載のコンピューティングデバイス。 - 前記第2のTSVは、少なくとも一部が前記チャンバ内を延伸する、請求項21に記載のコンピューティングデバイス。
- 前記ダイはパッケージ基板と結合され、
前記パッケージ基板は前記回路基板と結合される、請求項19から22のいずれか一項に記載のコンピューティングデバイス。 - 前記コンピューティングデバイスは、アンテナ、ディスプレイ、タッチスクリーンディスプレイ、タッチスクリーンコントローラ、バッテリ、オーディオコーデック、ビデオコーデック、電力増幅器、全地球測位システム(GPS)デバイス、コンパス、ガイガーカウンタ、加速度計、ジャイロスコープ、スピーカ、およびカメラのうちの1または複数を含むモバイルコンピューティングデバイスである、請求項19から23のいずれか一項に記載のコンピューティングデバイス。
- 前記バックプレートは、前記バックプレートを通して形成された1または複数の開口部を有し、前記メンブレン膜は、前記メンブレン膜を通して形成された1または複数の開口部を有し、前記チャンバは、前記バックプレートの前記1または複数の開口部、前記バックプレートと前記メンブレン膜との間の前記空隙、および前記メンブレン膜の前記1または複数の開口部を通して、外部空間と連通する、請求項19から24のいずれか一項に記載のコンピューティングデバイス。
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CN106716636B (zh) | 2021-05-28 |
US20170245035A1 (en) | 2017-08-24 |
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