JP6644707B2 - 高移動度トランジスタ - Google Patents
高移動度トランジスタ Download PDFInfo
- Publication number
- JP6644707B2 JP6644707B2 JP2016561991A JP2016561991A JP6644707B2 JP 6644707 B2 JP6644707 B2 JP 6644707B2 JP 2016561991 A JP2016561991 A JP 2016561991A JP 2016561991 A JP2016561991 A JP 2016561991A JP 6644707 B2 JP6644707 B2 JP 6644707B2
- Authority
- JP
- Japan
- Prior art keywords
- fin
- polarity
- dielectric layer
- substrate
- channel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 claims description 78
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims description 68
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 claims description 68
- 239000000872 buffer Substances 0.000 claims description 65
- 239000000758 substrate Substances 0.000 claims description 60
- 229910052710 silicon Inorganic materials 0.000 claims description 28
- 239000010703 silicon Substances 0.000 claims description 28
- 229910052732 germanium Inorganic materials 0.000 claims description 27
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 27
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 claims description 7
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 7
- 239000003989 dielectric material Substances 0.000 claims description 7
- 229910052738 indium Inorganic materials 0.000 claims description 6
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 6
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 5
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 claims description 5
- 229910052733 gallium Inorganic materials 0.000 claims description 5
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 claims description 4
- KXNLCSXBJCPWGL-UHFFFAOYSA-N [Ga].[As].[In] Chemical compound [Ga].[As].[In] KXNLCSXBJCPWGL-UHFFFAOYSA-N 0.000 claims description 4
- 238000005498 polishing Methods 0.000 claims description 3
- 239000000126 substance Substances 0.000 claims 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 24
- 238000004519 manufacturing process Methods 0.000 description 24
- 239000000463 material Substances 0.000 description 24
- 239000004065 semiconductor Substances 0.000 description 18
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 14
- 238000000407 epitaxy Methods 0.000 description 14
- 239000002019 doping agent Substances 0.000 description 9
- 235000012239 silicon dioxide Nutrition 0.000 description 7
- 239000000377 silicon dioxide Substances 0.000 description 7
- 229910052581 Si3N4 Inorganic materials 0.000 description 6
- 230000000903 blocking effect Effects 0.000 description 6
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 6
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 4
- MROCJMGDEKINLD-UHFFFAOYSA-N dichlorosilane Chemical compound Cl[SiH2]Cl MROCJMGDEKINLD-UHFFFAOYSA-N 0.000 description 4
- 229910000078 germane Inorganic materials 0.000 description 4
- 238000002513 implantation Methods 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 239000000203 mixture Substances 0.000 description 4
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 3
- 239000005380 borophosphosilicate glass Substances 0.000 description 3
- 238000001020 plasma etching Methods 0.000 description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 3
- 229920005591 polysilicon Polymers 0.000 description 3
- 229910000077 silane Inorganic materials 0.000 description 3
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 3
- IBEFSUTVZWZJEL-UHFFFAOYSA-N trimethylindium Chemical compound C[In](C)C IBEFSUTVZWZJEL-UHFFFAOYSA-N 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 description 2
- 230000003667 anti-reflective effect Effects 0.000 description 2
- RBFQJDQYXXHULB-UHFFFAOYSA-N arsane Chemical compound [AsH3] RBFQJDQYXXHULB-UHFFFAOYSA-N 0.000 description 2
- 238000004380 ashing Methods 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 230000000994 depressogenic effect Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 2
- 238000001451 molecular beam epitaxy Methods 0.000 description 2
- VYIRVGYSUZPNLF-UHFFFAOYSA-N n-(tert-butylamino)silyl-2-methylpropan-2-amine Chemical compound CC(C)(C)N[SiH2]NC(C)(C)C VYIRVGYSUZPNLF-UHFFFAOYSA-N 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 229910021332 silicide Inorganic materials 0.000 description 2
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 2
- RGGPNXQUMRMPRA-UHFFFAOYSA-N triethylgallium Chemical compound CC[Ga](CC)CC RGGPNXQUMRMPRA-UHFFFAOYSA-N 0.000 description 2
- 239000012808 vapor phase Substances 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 239000012895 dilution Substances 0.000 description 1
- 238000010790 dilution Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910000041 hydrogen chloride Inorganic materials 0.000 description 1
- IXCSERBJSXMMFS-UHFFFAOYSA-N hydrogen chloride Substances Cl.Cl IXCSERBJSXMMFS-UHFFFAOYSA-N 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 229910000073 phosphorus hydride Inorganic materials 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823807—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823821—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823878—Complementary field-effect transistors, e.g. CMOS isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
- H01L27/0924—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors including transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
- H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
- H01L29/1054—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a variation of the composition, e.g. channel with strained layer for increasing the mobility
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
- H01L29/161—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table including two or more of the elements provided for in group H01L29/16, e.g. alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Description
Claims (22)
- 集積回路を形成する方法であって、
シリコンを含む基板を提供することであって、第1の極性のfinFETのためのエリアにおいて第1の導電型の第1の領域を有し、第2の反対の極性のfinFETのためのエリアにおいて第2の反対の導電型の第2の領域を有する、前記基板を提供することと、
前記基板の上に誘電体層を50ナノメートル〜100ナノメートルの厚みに形成することと、
前記第1の極性のfinFETのための前記エリアにおいて前記基板まで下方に前記誘電体層において第1のトレンチを形成することと、
前記第1のトレンチにおいて前記基板上に第1のシリコンゲルマニウムバッファを1ナノメートル〜5ナノメートルの厚みに形成することと、
第1の極性のfinが前記誘電体層の頂部表面より上に延在するように、前記第1のシリコンゲルマニウムバッファ上に前記第1の極性のfinFETの前記第1の極性のfinを形成することと、
前記第1の極性のfinを覆うように前記誘電体層の上にエピタキシャルブロック層を形成することと、
前記第2の極性のfinFETのための前記エリアにおいて前記基板まで下方に前記エピタキシャルブロック層と前記誘電体層とにおいて第2のトレンチを形成することと、
前記第2のトレンチにおいて前記基板上に第2のシリコンゲルマニウムバッファを1ナノメートル〜5ナノメートルの厚みに形成することと、
第2の極性のfinが前記誘電体層の頂部表面より上に延在するように、前記第2のシリコンゲルマニウムバッファ上に前記第2の極性のfinFETの前記第2の極性のfinを形成することと、
前記第2の極性のfinを覆うように前記エピタキシャルブロック層の上に誘電性材料のキャップ層を形成することと、
前記誘電体層まで前記第1の極性のfinと前記第2の極性のfinとを平坦化するように、化学機械研磨(CMP)プロセスにより前記キャップ層と前記エピタキシャルブロック層とを取り除くことと、
前記第1の極性のfinと前記第2の極性のfinとが前記誘電体層より上に少なくとも10ナノメートル延在するように、前記誘電体層を窪ませることと、
を含む、方法。 - 請求項1に記載の方法であって、
前記第1のシリコンゲルマニウムバッファが、前記基板における20パーセント未満のゲルマニウム原子分率と、前記第1のシリコンゲルマニウムバッファの頂部表面における80パーセントを超えるゲルマニウム原子分率とを有するように形成され、
前記第2のシリコンゲルマニウムバッファが、前記基板における20パーセント未満のゲルマニウム原子分率と、前記第2のシリコンゲルマニウムバッファの頂部表面における80パーセントを超えるゲルマニウム原子分率とを有するように形成される、方法。 - 請求項1に記載の方法であって、
前記第1の極性のfinがガリウムヒ化物を含む、方法。 - 請求項1に記載の方法であって、
前記第1の極性のfinがインジウムガリウムヒ化物を含む、方法。 - 請求項4に記載の方法であって、
前記第1の極性のfinが、50:50〜57:43のインジウム対ガリウム比を有する、方法。 - 請求項1に記載の方法であって、
前記第1の極性のfinがインジウムリン化物を含む、方法。 - 請求項1に記載の方法であって、
前記第1の極性のfinがゲルマニウムを含む、方法。 - 請求項1に記載の方法であって、
前記第2の極性のfinがゲルマニウムを含む、方法。 - 集積回路を形成する方法であって、
シリコンを含む基板を提供することであって、第1の極性のfinFETのためのエリアにおいて第1の導電型の第1の領域を有し、第2の反対の極性のfinFETのためのエリアにおいて第2の反対の導電型の第2の領域を有する、前記基板を提供することと、
前記基板の上に誘電体層を形成することと、
前記第1の極性のfinFETのための前記エリアにおいて前記基板まで下方に前記誘電体層における第1のトレンチと、前記第2の極性のfinFETのための前記エリアにおいて前記基板まで下方に前記誘電体層における第2のトレンチとを同時に形成することと、
前記第1のトレンチにおける前記基板上の第1のシリコンゲルマニウムバッファと、前記第2のトレンチにおける前記基板上の第2のシリコンゲルマニウムバッファとを同時に形成することと、
第1の極性のfinと第2の極性のfinとが前記誘電体層の頂部表面より上に延在するように、前記第1のシリコンゲルマニウムバッファ上の前記第1の極性のfinFETの前記第1の極性のfinと、前記第2のシリコンゲルマニウムバッファ上の前記第2の極性のfinFETの前記第2の極性のfinとを順次に形成することと、
前記第1の極性のfinと前記第2の極性のfinとを覆うように前記誘電体層の上に誘電性材料のキャップ層を形成すること、
前記第1の極性のfinと前記第2の極性のfinとを前記誘電体層まで平坦化するように、CMPプロセスにより前記キャップ層を取り除くことと、
前記第1の極性のfinと前記第2の極性のfinとが前記誘電体層より上に少なくとも10ナノメートル延在するように、前記誘電体層を窪ませることと、
を含む、方法。 - 請求項9に記載の方法であって、
前記第1のシリコンゲルマニウムバッファと前記第2のシリコンゲルマニウムバッファとが、前記基板における20パーセント未満のゲルマニウム原子分率と、前記第1のシリコンゲルマニウムバッファと前記第2のシリコンゲルマニウムバッファとの頂部表面における80パーセントを超えるゲルマニウム原子分率とを有するように形成される、方法。 - 請求項9に記載の方法であって、
前記第1の極性のfinと前記第2の極性のfinとが、ゲルマニウムを含む、方法。 - 請求項9に記載の方法であって、
前記第1の極性のfinがガリウムヒ化物を含む、方法。 - 請求項9に記載の方法であって、
前記第1の極性のfinがインジウムガリウムヒ化物を含む、方法。 - 請求項13に記載の方法であって、
前記第1の極性のfinが50:50〜57:43のインジウム対ガリウム比を有する、方法。 - 請求項9に記載の方法であって、
前記第1の極性のfinがインジウムリン化物を含む、方法。 - 集積回路を形成する方法であって、
シリコンを含む基板を提供することであって、前記基板が、nチャネルfinFETのためのエリアにおいて第1の導電型の第1の領域を有し、pチャネルfinFETのためのエリアにおいて第2の反対の導電型の第2の領域を有する、前記基板を提供することと、
前記基板の上に誘電体層を形成することと、
前記nチャネルfinFETのための前記エリアにおいて前記基板まで下方に前記誘電体層における第1のトレンチと、前記pチャネルfinFETのための前記エリアにおいて前記基板まで下方に前記誘電体層における第2のトレンチとを同時に形成することと、
前記第1のトレンチにおける前記基板上の第1のシリコンゲルマニウムバッファと、前記第2のトレンチにおける前記基板上の第2のシリコンゲルマニウムバッファとを同時に形成することと、
nチャネルfinとpチャネルfinとが前記誘電体層の頂部表面より上に延在するように、前記第1のシリコンゲルマニウムバッファ上の前記nチャネルfinFETの前記nチャネルfinと、前記第2のシリコンゲルマニウムバッファ上の前記pチャネルfinFETの前記pチャネルfinとを順次に形成することと、
前記nチャネルfinと前記pチャネルfinとを覆うように前記誘電体層の上に誘電性材料のキャップ層を形成すること、
前記nチャネルfinと前記pチャネルfinとを前記誘電体層まで平坦化するように、CMPプロセスにより前記キャップ層を取り除くことと、
前記nチャネルfinと前記pチャネルfinとが前記誘電体層より上に少なくとも10ナノメートル延在するように、前記誘電体層を窪ませることと、
を含む、方法。 - 請求項16に記載の方法であって、
前記第1のシリコンゲルマニウムバッファと前記第2のシリコンゲルマニウムバッファとが、前記基板における20パーセント未満のゲルマニウム原子分率と、前記第1のシリコンゲルマニウムバッファと前記第2のシリコンゲルマニウムバッファとの頂部表面における80パーセントを超えるゲルマニウム原子分率とを有する、方法。 - 請求項16に記載の方法であって、
前記nチャネルfinと前記pチャネルfinとがゲルマニウムを含む、方法。 - 請求項16に記載の方法であって、
前記nチャネルfinがガリウムヒ化物を含む、方法。 - 請求項16に記載の方法であって、
前記nチャネルfinがインジウムガリウムヒ化物を含む、方法。 - 請求項20に記載の方法であって、
前記nチャネルfinが50:50〜57:43のインジウム対ガリウム比を有する、方法。 - 請求項16に記載の方法であって、
前記nチャネルfinがインジウムリン化物を含む、方法。
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201361921453P | 2013-12-28 | 2013-12-28 | |
US61/921,453 | 2013-12-28 | ||
US14/573,021 US9324717B2 (en) | 2013-12-28 | 2014-12-17 | High mobility transistors |
US14/573,021 | 2014-12-17 | ||
PCT/US2014/072585 WO2015100456A1 (en) | 2013-12-28 | 2014-12-29 | High mobility transistors |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2017507498A JP2017507498A (ja) | 2017-03-16 |
JP2017507498A5 JP2017507498A5 (ja) | 2018-02-01 |
JP6644707B2 true JP6644707B2 (ja) | 2020-02-12 |
Family
ID=53479727
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2016561991A Active JP6644707B2 (ja) | 2013-12-28 | 2014-12-29 | 高移動度トランジスタ |
Country Status (5)
Country | Link |
---|---|
US (3) | US9324717B2 (ja) |
EP (1) | EP3087603A4 (ja) |
JP (1) | JP6644707B2 (ja) |
CN (1) | CN105849905B (ja) |
WO (1) | WO2015100456A1 (ja) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104821336B (zh) * | 2015-04-20 | 2017-12-12 | 上海华力微电子有限公司 | 用于使用保形填充层改善器件表面均匀性的方法和系统 |
KR102475832B1 (ko) * | 2015-06-16 | 2022-12-09 | 인텔 코포레이션 | 서브핀 층을 갖는 트랜지스터 |
CN107924944B (zh) * | 2015-09-11 | 2021-03-30 | 英特尔公司 | 磷化铝铟子鳍状物锗沟道晶体管 |
CN106611787A (zh) * | 2015-10-26 | 2017-05-03 | 联华电子股份有限公司 | 半导体结构及其制作方法 |
KR102532202B1 (ko) | 2016-01-22 | 2023-05-12 | 삼성전자 주식회사 | 반도체 소자 |
US9768303B2 (en) * | 2016-01-27 | 2017-09-19 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method and structure for FinFET device |
WO2017218014A1 (en) | 2016-06-17 | 2017-12-21 | Intel Corporation | Field effect transistors with gate electrode self-aligned to semiconductor fin |
US9922983B1 (en) | 2016-09-22 | 2018-03-20 | International Business Machines Corporation | Threshold voltage modulation through channel length adjustment |
US10468310B2 (en) * | 2016-10-26 | 2019-11-05 | Globalfoundries Inc. | Spacer integration scheme for FNET and PFET devices |
US10840350B2 (en) * | 2016-10-31 | 2020-11-17 | Taiwan Semiconductor Manufacturing Co., Ltd. | Nanolaminate structure, semiconductor device and method of forming nanolaminate structure |
US10424663B2 (en) * | 2017-05-23 | 2019-09-24 | International Business Machines Corporation | Super long channel device within VFET architecture |
US11054748B2 (en) | 2018-09-21 | 2021-07-06 | Taiwan Semiconductor Manufacturing Co., Ltd. | Dummy insertion for improving throughput of electron beam lithography |
US11094597B2 (en) * | 2018-09-28 | 2021-08-17 | Taiwan Semiconductor Manufacturing Co., Ltd. | Structure and formation method of semiconductor device with fin structures |
US11923436B2 (en) * | 2020-08-07 | 2024-03-05 | Taiwan Semiconductor Manufacturing Co., Ltd. | Source/drain structure for semiconductor device |
Family Cites Families (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7508031B2 (en) | 2005-07-01 | 2009-03-24 | Synopsys, Inc. | Enhanced segmented channel MOS transistor with narrowed base regions |
JP2007258485A (ja) | 2006-03-23 | 2007-10-04 | Toshiba Corp | 半導体装置及びその製造方法 |
WO2008039495A1 (en) * | 2006-09-27 | 2008-04-03 | Amberwave Systems Corporation | Tri-gate field-effect transistors formed by aspect ratio trapping |
US9484462B2 (en) * | 2009-09-24 | 2016-11-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Fin structure of fin field effect transistor |
US9245805B2 (en) * | 2009-09-24 | 2016-01-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Germanium FinFETs with metal gates and stressors |
US8278173B2 (en) * | 2010-06-30 | 2012-10-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of fabricating gate structures |
US9761666B2 (en) * | 2011-06-16 | 2017-09-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Strained channel field effect transistor |
US20130011984A1 (en) | 2011-07-07 | 2013-01-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | Using Hexachlorodisilane as a Silicon Precursor for Source/Drain Epitaxy |
US8624326B2 (en) * | 2011-10-20 | 2014-01-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | FinFET device and method of manufacturing same |
US8486770B1 (en) * | 2011-12-30 | 2013-07-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of forming CMOS FinFET device |
US8629038B2 (en) * | 2012-01-05 | 2014-01-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | FinFETs with vertical fins and methods for forming the same |
US9129827B2 (en) * | 2012-04-13 | 2015-09-08 | Intel Corporation | Conversion of strain-inducing buffer to electrical insulator |
US8680576B2 (en) * | 2012-05-16 | 2014-03-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | CMOS device and method of forming the same |
US8729634B2 (en) * | 2012-06-15 | 2014-05-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | FinFET with high mobility and strain channel |
EP2682983B1 (en) * | 2012-07-03 | 2016-08-31 | Imec | CMOS device comprising silicon and germanium and method for manufacturing thereof |
US8497171B1 (en) * | 2012-07-05 | 2013-07-30 | Taiwan Semiconductor Manufacturing Co., Ltd. | FinFET method and structure with embedded underlying anti-punch through layer |
US8673718B2 (en) * | 2012-07-09 | 2014-03-18 | Globalfoundries Inc. | Methods of forming FinFET devices with alternative channel materials |
US8841188B2 (en) * | 2012-09-06 | 2014-09-23 | International Business Machines Corporation | Bulk finFET with controlled fin height and high-K liner |
US20140353767A1 (en) * | 2013-05-31 | 2014-12-04 | Stmicroelectronics, Inc. | Method for the formation of fin structures for finfet devices |
CN105531801A (zh) * | 2013-09-27 | 2016-04-27 | 英特尔公司 | 通过组合选择性外延和共形外延的用于cmos的图案化硅衬底上的非硅器件异质层 |
US9023705B1 (en) * | 2013-11-01 | 2015-05-05 | Globalfoundries Inc. | Methods of forming stressed multilayer FinFET devices with alternative channel materials |
US9136332B2 (en) * | 2013-12-10 | 2015-09-15 | Taiwan Semiconductor Manufacturing Company Limited | Method for forming a nanowire field effect transistor device having a replacement gate |
-
2014
- 2014-12-17 US US14/573,021 patent/US9324717B2/en active Active
- 2014-12-29 CN CN201480071542.6A patent/CN105849905B/zh active Active
- 2014-12-29 JP JP2016561991A patent/JP6644707B2/ja active Active
- 2014-12-29 WO PCT/US2014/072585 patent/WO2015100456A1/en active Application Filing
- 2014-12-29 EP EP14875258.7A patent/EP3087603A4/en active Pending
-
2016
- 2016-03-24 US US15/079,399 patent/US20160204198A1/en not_active Abandoned
- 2016-03-24 US US15/079,414 patent/US9805986B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US20150187773A1 (en) | 2015-07-02 |
EP3087603A1 (en) | 2016-11-02 |
US20160225673A1 (en) | 2016-08-04 |
EP3087603A4 (en) | 2017-08-30 |
CN105849905A (zh) | 2016-08-10 |
US9324717B2 (en) | 2016-04-26 |
WO2015100456A1 (en) | 2015-07-02 |
JP2017507498A (ja) | 2017-03-16 |
US20160204198A1 (en) | 2016-07-14 |
US9805986B2 (en) | 2017-10-31 |
CN105849905B (zh) | 2019-10-25 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6644707B2 (ja) | 高移動度トランジスタ | |
US11437517B2 (en) | Semiconductor structures and methods with high mobility and high energy bandgap materials | |
US10971406B2 (en) | Method of forming source/drain regions of transistors | |
US10269649B2 (en) | Wrap-around contact on FinFET | |
US8786019B2 (en) | CMOS FinFET device | |
US9219116B2 (en) | Fin structure of semiconductor device | |
US9166044B2 (en) | Raised epitaxial LDD in MuGFETs | |
US10096524B1 (en) | Semiconductor fin patterning techniques to achieve uniform fin profiles for fin field effect transistors | |
US9543419B1 (en) | FinFET structures and methods of forming the same | |
US9520502B2 (en) | FinFETs having epitaxial capping layer on fin and methods for forming the same | |
US9496398B2 (en) | Epitaxial source/drain regions in FinFETs and methods for forming the same | |
US8822290B2 (en) | FinFETs and methods for forming the same | |
US10868131B2 (en) | Gaseous spacer and methods of forming same | |
CN109427591B (zh) | 半导体器件及其形成方法 | |
US9818846B2 (en) | Selectively deposited spacer film for metal gate sidewall protection | |
US10930755B2 (en) | Self-aligned inner spacer on gate-all-around structure and methods of forming the same | |
US10529862B2 (en) | Semiconductor device and method of forming semiconductor fin thereof | |
US10395937B2 (en) | Fin patterning for semiconductor devices |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A821 Effective date: 20160628 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20171213 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20171213 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20190226 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20190524 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20190724 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20191218 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20200108 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6644707 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313117 |
|
S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313117 |
|
S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313117 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |