JP6570055B2 - 半導体チップ、半導体装置及び半導体検査システム - Google Patents
半導体チップ、半導体装置及び半導体検査システム Download PDFInfo
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- JP6570055B2 JP6570055B2 JP2015094219A JP2015094219A JP6570055B2 JP 6570055 B2 JP6570055 B2 JP 6570055B2 JP 2015094219 A JP2015094219 A JP 2015094219A JP 2015094219 A JP2015094219 A JP 2015094219A JP 6570055 B2 JP6570055 B2 JP 6570055B2
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- Semiconductor Integrated Circuits (AREA)
- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
- Tests Of Electronic Circuits (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
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JP2015094219A JP6570055B2 (ja) | 2015-05-01 | 2015-05-01 | 半導体チップ、半導体装置及び半導体検査システム |
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JP2015094219A JP6570055B2 (ja) | 2015-05-01 | 2015-05-01 | 半導体チップ、半導体装置及び半導体検査システム |
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JP2016211917A JP2016211917A (ja) | 2016-12-15 |
JP2016211917A5 JP2016211917A5 (enrdf_load_stackoverflow) | 2018-06-14 |
JP6570055B2 true JP6570055B2 (ja) | 2019-09-04 |
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JP2015094219A Active JP6570055B2 (ja) | 2015-05-01 | 2015-05-01 | 半導体チップ、半導体装置及び半導体検査システム |
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Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
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TW201838094A (zh) * | 2017-02-16 | 2018-10-16 | 學校法人慶應義塾 | 層疊半導體積體電路裝置 |
KR102726176B1 (ko) * | 2020-09-01 | 2024-11-06 | 에스케이하이닉스 주식회사 | 반도체 장치 및 그의 동작 방법 |
JP7558424B2 (ja) | 2021-10-26 | 2024-09-30 | 三菱電機株式会社 | 半導体集積回路装置 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2892474B2 (ja) * | 1990-09-07 | 1999-05-17 | 新光電気工業株式会社 | セラミック基板のビア検査方法 |
JP4982543B2 (ja) * | 2002-12-27 | 2012-07-25 | 日置電機株式会社 | 多層基板のスルーホール断線検出方法 |
WO2009147717A1 (ja) * | 2008-06-02 | 2009-12-10 | 株式会社アドバンテスト | プローブウエハ、プローブ装置および試験システム |
JP2010219425A (ja) * | 2009-03-18 | 2010-09-30 | Toshiba Corp | 半導体装置 |
JP2012083262A (ja) * | 2010-10-13 | 2012-04-26 | Advantest Corp | 試験装置および試験方法 |
JP5967713B2 (ja) * | 2012-12-13 | 2016-08-10 | 国立研究開発法人産業技術総合研究所 | 積層型lsiチップの絶縁膜の検査方法及び積層型lsiチップの製造方法 |
JP6259254B2 (ja) * | 2013-10-18 | 2018-01-10 | 株式会社日本マイクロニクス | 検査装置および検査方法 |
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