JP6539919B2 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

Info

Publication number
JP6539919B2
JP6539919B2 JP2017520287A JP2017520287A JP6539919B2 JP 6539919 B2 JP6539919 B2 JP 6539919B2 JP 2017520287 A JP2017520287 A JP 2017520287A JP 2017520287 A JP2017520287 A JP 2017520287A JP 6539919 B2 JP6539919 B2 JP 6539919B2
Authority
JP
Japan
Prior art keywords
protective film
film
thermosetting
chip
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2017520287A
Other languages
English (en)
Japanese (ja)
Other versions
JPWO2016189986A1 (ja
Inventor
尚哉 佐伯
尚哉 佐伯
克彦 堀米
克彦 堀米
裕之 米山
裕之 米山
善男 荒井
善男 荒井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lintec Corp
Original Assignee
Lintec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lintec Corp filed Critical Lintec Corp
Publication of JPWO2016189986A1 publication Critical patent/JPWO2016189986A1/ja
Application granted granted Critical
Publication of JP6539919B2 publication Critical patent/JP6539919B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Dicing (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Adhesive Tapes (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Die Bonding (AREA)
JP2017520287A 2015-05-25 2016-04-08 半導体装置の製造方法 Active JP6539919B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2015105685 2015-05-25
JP2015105685 2015-05-25
PCT/JP2016/061574 WO2016189986A1 (ja) 2015-05-25 2016-04-08 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPWO2016189986A1 JPWO2016189986A1 (ja) 2018-03-15
JP6539919B2 true JP6539919B2 (ja) 2019-07-10

Family

ID=57393938

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2017520287A Active JP6539919B2 (ja) 2015-05-25 2016-04-08 半導体装置の製造方法

Country Status (6)

Country Link
JP (1) JP6539919B2 (ko)
KR (1) KR102528047B1 (ko)
CN (1) CN107615453B (ko)
SG (1) SG11201709671YA (ko)
TW (1) TWI683358B (ko)
WO (1) WO2016189986A1 (ko)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6775436B2 (ja) * 2017-02-02 2020-10-28 リンテック株式会社 フィルム状接着剤、半導体加工用シート及び半導体装置の製造方法
CN108091605B (zh) * 2017-12-06 2018-12-21 英特尔产品（成都）有限公司 一种降低晶圆误剥离的方法
CN111886673A (zh) * 2018-03-07 2020-11-03 琳得科株式会社 扩片方法、半导体装置的制造方法、以及粘合片
JP6821749B2 (ja) * 2018-07-12 2021-01-27 デクセリアルズ株式会社 ピックアップ装置、実装装置、ピックアップ方法、実装方法
CN109786310A (zh) * 2019-01-14 2019-05-21 东莞记忆存储科技有限公司 粘晶胶纸随晶粒分离的方法
JP2020129639A (ja) * 2019-02-12 2020-08-27 株式会社ディスコ デバイスパッケージ形成方法
JPWO2020195808A1 (ko) * 2019-03-26 2020-10-01
CN109967872B (zh) * 2019-04-23 2021-05-07 苏州福唐智能科技有限公司 一种半导体激光焊接方法及其焊接结构
CN114303234A (zh) * 2019-08-26 2022-04-08 琳得科株式会社 层叠体的制造方法
JP7301480B2 (ja) * 2019-10-17 2023-07-03 株式会社ディスコ ウェーハの加工方法
JP7370215B2 (ja) * 2019-10-25 2023-10-27 三菱電機株式会社 半導体装置の製造方法
CN112846534B (zh) * 2020-12-30 2023-03-21 武汉理工氢电科技有限公司 一种3ccm的切割方法
WO2022190916A1 (ja) * 2021-03-08 2022-09-15 リンテック株式会社 半導体装置の製造方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001144213A (ja) * 1999-11-16 2001-05-25 Hitachi Ltd 半導体装置の製造方法および半導体装置
JP3544362B2 (ja) * 2001-03-21 2004-07-21 リンテック株式会社 半導体チップの製造方法
US6709953B2 (en) * 2002-01-31 2004-03-23 Infineon Technologies Ag Method of applying a bottom surface protective coating to a wafer, and wafer dicing method
US6908784B1 (en) * 2002-03-06 2005-06-21 Micron Technology, Inc. Method for fabricating encapsulated semiconductor components
US6582983B1 (en) * 2002-07-12 2003-06-24 Keteca Singapore Singapore Method and wafer for maintaining ultra clean bonding pads on a wafer
JP2005191508A (ja) * 2003-12-05 2005-07-14 Rohm Co Ltd 半導体装置およびその製造方法
US8198176B2 (en) * 2007-10-09 2012-06-12 Hitachi Chemical Company, Ltd. Method for producing semiconductor chip with adhesive film, adhesive film for semiconductor used in the method, and method for producing semiconductor device
JP2012079936A (ja) * 2010-10-01 2012-04-19 Nitto Denko Corp ダイシング・ダイボンドフィルム、及び、半導体装置の製造方法
JP5865044B2 (ja) * 2011-12-07 2016-02-17 リンテック株式会社 保護膜形成層付ダイシングシートおよびチップの製造方法
JP5976326B2 (ja) 2012-01-25 2016-08-23 日東電工株式会社 半導体装置の製造方法、及び、当該半導体装置の製造方法に用いられる接着フィルム
JP5908543B2 (ja) * 2014-08-07 2016-04-26 日東電工株式会社 半導体装置の製造方法

Also Published As

Publication number Publication date
JPWO2016189986A1 (ja) 2018-03-15
KR102528047B1 (ko) 2023-05-02
CN107615453B (zh) 2020-09-01
TWI683358B (zh) 2020-01-21
TW201642337A (zh) 2016-12-01
KR20180010194A (ko) 2018-01-30
SG11201709671YA (en) 2017-12-28
CN107615453A (zh) 2018-01-19
WO2016189986A1 (ja) 2016-12-01

Similar Documents

Publication Publication Date Title
JP6539919B2 (ja) 半導体装置の製造方法
JP6591652B2 (ja) 保護膜形成フィルム、保護膜形成用シート、保護膜形成用複合シートおよび加工物の製造方法
JP6670363B2 (ja) 保護膜形成フィルム
JP2019080066A (ja) 保護膜形成フィルム、保護膜形成用シート、保護膜形成用複合シートおよび検査方法
JP6554738B2 (ja) 保護膜形成フィルム、保護膜形成用シート、ワークまたは加工物の製造方法、検査方法、良品と判断されたワーク、および良品と判断された加工物
JP6600872B2 (ja) 保護膜形成用複合シート
JP6557912B2 (ja) 保護膜形成用複合シート
JP6557911B2 (ja) 保護膜形成用複合シート
JP7008620B2 (ja) 半導体加工用シート
JP7042211B2 (ja) 半導体加工用シート
JP6519077B2 (ja) 半導体装置の製造方法
JP6617056B2 (ja) 半導体加工用シート、その巻取体および当該巻取体の製造方法
JP6573841B2 (ja) 半導体加工用シート

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20180223

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20190115

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20190312

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20190514

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20190523

R150 Certificate of patent or registration of utility model

Ref document number: 6539919

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250