JP6479930B2 - カラーフィルタ層を備えた平板表示装置用薄膜トランジスタ基板 - Google Patents
カラーフィルタ層を備えた平板表示装置用薄膜トランジスタ基板 Download PDFInfo
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- JP6479930B2 JP6479930B2 JP2017209150A JP2017209150A JP6479930B2 JP 6479930 B2 JP6479930 B2 JP 6479930B2 JP 2017209150 A JP2017209150 A JP 2017209150A JP 2017209150 A JP2017209150 A JP 2017209150A JP 6479930 B2 JP6479930 B2 JP 6479930B2
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- color filter
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- thin film
- film transistor
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- 239000000758 substrate Substances 0.000 title claims description 96
- 239000010409 thin film Substances 0.000 title claims description 50
- 239000010408 film Substances 0.000 claims description 58
- 239000004065 semiconductor Substances 0.000 claims description 30
- 239000011159 matrix material Substances 0.000 claims description 18
- 230000001681 protective effect Effects 0.000 claims description 15
- 239000004020 conductor Substances 0.000 claims description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 51
- 230000005684 electric field Effects 0.000 description 15
- 238000004519 manufacturing process Methods 0.000 description 15
- 238000000034 method Methods 0.000 description 11
- 238000010586 diagram Methods 0.000 description 6
- 239000003086 colorant Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000011368 organic material Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
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- G02F2201/48—Flattening arrangements
Description
図4を参照して、本発明の第1実施形態について説明する。図4は、本発明の第1実施形態に係る液晶表示装置の構造を示す平面図である。図5は、図4において切り取り線II−II’で切った本発明の第1実施形態に係る液晶表示装置の構造を示す断面図である。図6〜図8は、本発明の第1実施形態に係る液晶表示装置においてカラーフィルタのパターンを示す図である。
以下、図9を参照して、本発明の第2実施形態について説明する。第1実施形態においては、緑色カラーフィルタを用いて、中間絶縁膜の代わりとした構造を有する液晶表示装置について説明した。第2実施形態においては、中間絶縁膜をさらに備えた構造を有する液晶表示装置について説明する。図9は、本発明の第2実施形態に係る液晶表示装置の構造を示す断面図である。
Claims (7)
- 基板上にマトリックス方式で配置され、開口領域と非開口領域を備えた複数個の画素領域と、
前記基板上で、前記非開口領域に積層された第1カラーフィルタ及び第2カラーフィルタと、
前記第1カラーフィルタと前記第2カラーフィルタの上に積層されたオーバーコート層と、
前記オーバーコート層の上で、前記非開口領域に配置された半導体層と、
前記半導体層の中央部の上に積層されたゲート絶縁膜及びゲート電極と、
前記半導体層と前記ゲート電極の上で、前記非開口領域に配置された第3カラーフィルタと、
前記第3カラーフィルタ上で形成されたソース電極とドレイン電極と、
を含み、
前記第1カラーフィルタ、前記第2カラーフィルタ及び前記第3カラーフィルタは、赤色カラーフィルタ、緑色カラーフィルタ及び青色カラーフィルタのいずれか1つである、薄膜トランジスタ基板。 - 前記ソース電極及び前記ドレイン電極を覆う平坦化膜と、
前記平坦化膜の上に形成された共通電極と、
前記共通電極を覆う保護膜と、
前記保護膜上に形成され、前記ドレイン電極に接続された画素電極と、
をさらに含む、請求項1に記載の薄膜トランジスタ基板。 - 前記ゲート電極と接続され、前記基板の横方向に進行するゲート配線と、
前記ソース電極と接続され、前記基板の縦方向に進行するデータ配線と、
をさらに含み、
前記画素領域は、前記ゲート配線及び前記データ配線に囲まれて定義される、
請求項1に記載の薄膜トランジスタ基板。 - 前記共通電極は、前記画素領域の前記開口領域を覆い、すべての画素領域に接続された透明導電層であり、
前記画素電極は、前記画素領域の前記開口領域内で一定の間隔を有し平行に配置された線分形状を有する透明導電性物質を含む、
請求項2に記載の薄膜トランジスタ基板。 - 前記画素領域は、第1カラー画素領域、第2カラー画素領域及び第3カラー画素領域を含む、
請求項1に記載の薄膜トランジスタ基板。 - 前記第1カラーフィルタは、前記第1カラー画素領域の前記開口領域に、さらに配置され、
前記第2カラーフィルタは、前記第2カラー画素領域の前記開口領域に、さらに配置され、
前記第3カラーフィルタは、前記第3カラー画素領域の前記開口領域に、さらに配置される、
請求項5に記載の薄膜トランジスタ基板。 - 前記半導体層と前記ゲート電極上で前記第3カラーフィルタの下に積層された中間絶縁膜をさらに含む、
請求項6に記載の薄膜トランジスタ基板。
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