JP6460980B2 - 電圧制御発振器のための作動信号を較正するための回路装置及び方法 - Google Patents

電圧制御発振器のための作動信号を較正するための回路装置及び方法 Download PDF

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Publication number
JP6460980B2
JP6460980B2 JP2015513018A JP2015513018A JP6460980B2 JP 6460980 B2 JP6460980 B2 JP 6460980B2 JP 2015513018 A JP2015513018 A JP 2015513018A JP 2015513018 A JP2015513018 A JP 2015513018A JP 6460980 B2 JP6460980 B2 JP 6460980B2
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Prior art keywords
vcm
connection
transistor
varactor
adjustment signal
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JP2015513018A
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Japanese (ja)
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JP2015525499A5 (https=
JP2015525499A (ja
Inventor
ヴェルカー，ハインツ
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シリコン・ライン・ゲー・エム・ベー・ハー
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B1/00—Details
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/0805—Details of the phase-locked loop the loop being adapted to provide an additional control signal for use outside the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Manipulation Of Pulses (AREA)
JP2015513018A 2012-05-23 2013-05-23 電圧制御発振器のための作動信号を較正するための回路装置及び方法 Expired - Fee Related JP6460980B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE102012104472 2012-05-23
DE102012104472.4 2012-05-23
PCT/DE2013/200016 WO2013174377A2 (de) 2012-05-23 2013-05-23 Schaltungsanordnung und verfahren zum kalibrieren von ansteuersignalen für spannungsgesteuerte oszillatoren

Publications (3)

Publication Number Publication Date
JP2015525499A JP2015525499A (ja) 2015-09-03
JP2015525499A5 JP2015525499A5 (https=) 2016-07-07
JP6460980B2 true JP6460980B2 (ja) 2019-01-30

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ID=48537785

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JP2015513018A Expired - Fee Related JP6460980B2 (ja) 2012-05-23 2013-05-23 電圧制御発振器のための作動信号を較正するための回路装置及び方法

Country Status (5)

Country Link
US (1) US9484929B2 (https=)
EP (1) EP2853029B1 (https=)
JP (1) JP6460980B2 (https=)
DE (1) DE112013002663A5 (https=)
WO (1) WO2013174377A2 (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3485573A2 (de) 2016-07-14 2019-05-22 Silicon Line GmbH Vorrichtung und verfahren zum steuerbaren verzoegern elektrischer signale
CN111404545B (zh) * 2020-04-20 2022-07-29 成都华微电子科技股份有限公司 带数字修调功能的振荡器电路和时钟信号生成方法
CN111934678B (zh) * 2020-09-28 2021-01-05 深圳英集芯科技有限公司 芯片内时钟频率自动校准方法及相关产品
US12603655B1 (en) * 2024-04-02 2026-04-14 Cadence Design Systems, Inc. Subranging digital to time converter-based fractional phase locked loop architecture

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5726607A (en) * 1992-06-15 1998-03-10 Adc Telecommunications, Inc. Phase locked loop using a counter and a microcontroller to produce VCXO control signals
US5631920A (en) * 1993-11-29 1997-05-20 Lexmark International, Inc. Spread spectrum clock generator
US6259326B1 (en) * 1999-08-24 2001-07-10 Agere Systems Guardian Corp. Clock recovery from a burst-mode digital signal each packet of which may have one of several predefined frequencies
JP4089938B2 (ja) * 2000-06-09 2008-05-28 日本電信電話株式会社 電圧制御発振器
US7129763B1 (en) * 2004-11-08 2006-10-31 Western Digital Technologies, Inc. Adjusting power consumption of digital circuitry by generating frequency error representing error in propagation delay
JP4733152B2 (ja) * 2008-01-31 2011-07-27 日本電信電話株式会社 周波数制御回路およびｃｄｒ回路
JP2010178148A (ja) * 2009-01-30 2010-08-12 Hitachi Kokusai Electric Inc バッファ回路
US8125285B2 (en) * 2009-09-10 2012-02-28 Analog Devices, Inc. Digitally controlled oscillators

Also Published As

Publication number Publication date
EP2853029B1 (de) 2016-05-18
EP2853029A2 (de) 2015-04-01
US20150381185A1 (en) 2015-12-31
JP2015525499A (ja) 2015-09-03
DE112013002663A5 (de) 2015-06-18
US9484929B2 (en) 2016-11-01
WO2013174377A2 (de) 2013-11-28
WO2013174377A3 (de) 2014-01-30

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