JP6362108B2 - Lead frame for mounting a semiconductor element and manufacturing method thereof - Google Patents
Lead frame for mounting a semiconductor element and manufacturing method thereof Download PDFInfo
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- JP6362108B2 JP6362108B2 JP2014182254A JP2014182254A JP6362108B2 JP 6362108 B2 JP6362108 B2 JP 6362108B2 JP 2014182254 A JP2014182254 A JP 2014182254A JP 2014182254 A JP2014182254 A JP 2014182254A JP 6362108 B2 JP6362108 B2 JP 6362108B2
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- 239000004065 semiconductor Substances 0.000 title claims description 101
- 238000004519 manufacturing process Methods 0.000 title claims description 14
- 238000005530 etching Methods 0.000 claims description 71
- 239000002184 metal Substances 0.000 claims description 50
- 229910052751 metal Inorganic materials 0.000 claims description 50
- 229910000679 solder Inorganic materials 0.000 claims description 26
- 238000007747 plating Methods 0.000 claims description 24
- 238000000034 method Methods 0.000 claims description 16
- 238000005476 soldering Methods 0.000 claims description 15
- 238000007788 roughening Methods 0.000 claims description 8
- 230000015572 biosynthetic process Effects 0.000 claims description 4
- 229910052759 nickel Inorganic materials 0.000 claims description 4
- 229910052709 silver Inorganic materials 0.000 claims description 3
- 229910052737 gold Inorganic materials 0.000 claims description 2
- 239000011549 crystallization solution Substances 0.000 claims 1
- 239000011347 resin Substances 0.000 description 39
- 229920005989 resin Polymers 0.000 description 39
- 238000007789 sealing Methods 0.000 description 29
- 239000011521 glass Substances 0.000 description 8
- 239000010949 copper Substances 0.000 description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 5
- 229910052802 copper Inorganic materials 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 229910021578 Iron(III) chloride Inorganic materials 0.000 description 4
- RBTARNINKXHZNM-UHFFFAOYSA-K iron trichloride Chemical compound Cl[Fe](Cl)Cl RBTARNINKXHZNM-UHFFFAOYSA-K 0.000 description 4
- 230000003111 delayed effect Effects 0.000 description 3
- 238000010292 electrical insulation Methods 0.000 description 3
- XEMZLVDIUVCKGL-UHFFFAOYSA-N hydrogen peroxide;sulfuric acid Chemical compound OO.OS(O)(=O)=O XEMZLVDIUVCKGL-UHFFFAOYSA-N 0.000 description 2
- 150000007524 organic acids Chemical class 0.000 description 2
- 238000010306 acid treatment Methods 0.000 description 1
- 230000001154 acute effect Effects 0.000 description 1
- 239000003513 alkali Substances 0.000 description 1
- 239000002585 base Substances 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000004090 dissolution Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Description
本発明は、半導体素子を搭載するためのリードフレーム、特に半導体素子搭載部及び端子部の形状と、その製造方法に関するものである。 The present invention relates to a lead frame for mounting a semiconductor element, in particular, the shape of a semiconductor element mounting portion and a terminal portion, and a manufacturing method thereof.
半導体素子を搭載するリードフレームにおいては、半導体素子と接続されるとともに外部とも接続される端子部に対する封止用樹脂の密着性の向上が製品の信頼性を向上させる重要なポイントの１つであり、封止用樹脂との密着性を向上させて端子部の抜け落ちを防止するための技術が種々提案されている。具体的には、端子部の上面側に突起部（庇）を形成する技術や、端子部の側面を粗化させる技術等がある。 In a lead frame on which a semiconductor element is mounted, an improvement in the adhesion of a sealing resin to a terminal portion connected to the semiconductor element and also to the outside is one of the important points for improving the reliability of the product. Various techniques for improving the adhesion with the sealing resin and preventing the terminal portion from falling off have been proposed. Specifically, there are a technique for forming a protrusion (ridge) on the upper surface side of the terminal part, a technique for roughening the side surface of the terminal part, and the like.
例えば、特許文献１には、表裏からエッチングを施すことで側面に凹凸を形成する技術が開示されている。この技術は、従来から行なわれている表裏面からのエッチング加工において、表面側と裏面側のエッチングマスクに差を付けて形成することで、樹脂部の脱落を防止する技術であり、金属板の厚さと同程度或いは厚さ以下の距離をエッチングする際に、表面側を狭く開口し、裏面側を広く開口したエッチングマスクを形成してリードフレームを製造することなどで目的を達成している。 For example, Patent Document 1 discloses a technique for forming irregularities on the side surfaces by performing etching from the front and back sides. This technique is a technique for preventing the resin portion from falling off by forming a difference between the etching mask on the front side and the back side in the conventional etching process from the front and back sides. When etching a distance equal to or less than the thickness, the object is achieved by forming a lead frame by forming an etching mask having a narrow opening on the front side and a wide opening on the back side.
ところで、上記の従来技術による場合、樹脂との密着性を向上させるために形成された突起部であっても、その先端が鋭角となる場合は、封止樹脂にクラックが発生することから、突起部の先端を略平面状又は円弧状に形成する必要がある。 By the way, in the case of the above prior art, even if the protruding portion is formed to improve the adhesion to the resin, if the tip has an acute angle, a crack is generated in the sealing resin. It is necessary to form the tip of the part in a substantially planar shape or arc shape.
特に、ＱＦＮやＬＥＤ用のリードフレームの場合には、実装後に露出する面の端面に対し、素子搭載面の端面がオーバーハングするように設計されて、樹脂剥がれ防止策の一つとして機能させている。しかし、個片へカットする際のブレードとの摩擦時に起こる、高い熱履歴による膨張・収縮や振動の影響で、樹脂がリードフレームから剥がれてしまう不具合が問題視されており、市場においては更なる樹脂密着性の向上が求められている。 In particular, in the case of a lead frame for QFN or LED, the end face of the element mounting surface is designed to overhang the end face of the surface exposed after mounting, so that it functions as one of the measures for preventing resin peeling. Yes. However, there is a problem that the resin is peeled off from the lead frame due to the expansion / contraction and vibration caused by the high thermal history that occurs during friction with the blade when cutting into individual pieces. There is a need for improved resin adhesion.
しかし、端子部の上面側に突起部（庇）を形成することは、端子と樹脂との密着性の向上に寄与するものの、隣接した端子との端子間距離が、突起部（庇）の突き出した長さの分だけ短くなることから、端子間の電気絶縁性を確保するため突起部（庇）の突出長さの分だけ端子間ピッチを広くすることが必要となる。そのため、その分だけ半導体パッケージの外径サイズが大きくなってしまうという欠点があった。 However, forming the protrusion (庇) on the upper surface side of the terminal portion contributes to improving the adhesion between the terminal and the resin, but the distance between the adjacent terminals is the protrusion of the protrusion (庇). Therefore, in order to ensure electrical insulation between the terminals, it is necessary to widen the pitch between the terminals by the protruding length of the protrusion (庇). For this reason, there is a drawback that the outer diameter size of the semiconductor package is increased accordingly.
そこで、本発明は、上記問題点に鑑みてなされたものであり、その目的とするところは、端子と封止樹脂との密着性を確保しながら、端子間の電気絶縁性も効果的に満足するようにした半導体素子搭載用リードフレームを提供することにある。 Therefore, the present invention has been made in view of the above problems, and the object of the present invention is to effectively satisfy the electrical insulation between the terminals while ensuring the adhesion between the terminals and the sealing resin. An object of the present invention is to provide a semiconductor device mounting lead frame.
上記目的を達成するために、本発明による半導体素子搭載用リードフレームは、半導体素子搭載部及び端子部を有していて、該半導体素子搭載部及び端子部のうち少なくとも一つの側面に、半導体素子搭載側の面から該半導体素子搭載側とは反対側のはんだ実装側の面方向へ略垂直に延伸した端面と、前記はんだ実装側の面から前記半導体素子搭載側の面方向へ凸状に切除され凹状に形成された円弧面と、前記端面と前記円弧面とに接続する先端面とにより形成されてなる突起部を備えていて、前記突起部の前記先端面は、略平面あるいは円弧状をなしているとともに肉厚に形成されており、前記突起部は、前記先端面の前記端面と接続する部位における、前記端面の前記半導体素子搭載側の根元部から側面方向への突出長さが１０μｍ以内、厚さが５０μｍ以上であり、前記先端面における前記円弧面と接続する部位が、前記先端面における前記端面と接続する部位よりも前記はんだ実装側の面に近い位置にあり、且つ、前記円弧面は、前記はんだ実装側の面と接続する部位から前記先端面と接続する部位に至るまで一つながりの略半円の円弧形状の面であり、前記円弧面における最も半導体素子搭載側の面に近い部位が、前記先端面における前記端面と接続する部位と同程度の高さ位置又は前記先端面における前記端面と接続する部位よりも前記半導体素子搭載側の面に近い位置にあることを特徴とする。 In order to achieve the above object, a semiconductor element mounting lead frame according to the present invention has a semiconductor element mounting portion and a terminal portion, and at least one side surface of the semiconductor element mounting portion and the terminal portion includes a semiconductor element mounting portion. from the surface of the mounting side of the semiconductor element mounting side and end faces extending substantially perpendicularly to the plane direction of the soldering side of the other side, cut in a convex shape from the surface of the soldering side to a surface direction of the semiconductor element mounting side an arc surface formed in a concave shape is, have a protrusion ing is formed by the front end surface to be connected to said end surface and said arcuate surface, said tip end surface of the protrusion has a substantially planar or arcuate shape is formed in a thickness with which no, said protrusions, at the site to be connected with said end face of said tip end surface, the protruding length from the root portion of the semiconductor element mounting side to side direction of the end face 10μm within The thickness is 50 μm or more, the portion connected to the arc surface on the tip surface is located closer to the surface on the solder mounting side than the portion connected to the end surface on the tip surface, and the arc surface Is a substantially semicircular arc-shaped surface connected from the portion connected to the surface on the solder mounting side to the portion connected to the tip surface, and is closest to the surface on the semiconductor element mounting side in the arc surface The part is located at a height position similar to a part connected to the end face on the tip surface or a position closer to the surface on the semiconductor element mounting side than a part connected to the end face on the tip face. .
また、本発明のリードフレームにおいては、前記半導体素子搭載部及び端子部の側面が、粗化処理により粗面化されているのが好ましい。 Further, Oite the lead frame of the present invention, the side surface of said semiconductor element mounting portion and the terminal portion, preferably is roughened by the roughening treatment.
また、本発明のリードフレームにおいては、前記半導体素子搭載部及び端子部の側面のうち少なくとも前記突起部を備えている箇所には、めっきが施されていないのが好ましい。 Further, Oite the lead frame of the present invention, the at locations comprising at least the protrusions of the side surfaces of the semiconductor element mounting portion and the terminal portion are preferably plated is not subjected.
また、本発明のリードフレームにおいては、前記粗面化されている側面は、平均粗さが０．１２〜０．２０μｍであるのが好ましい。 Further, Oite the lead frame of the present invention is a side where the is roughened, the average roughness preferably from 0.12～0.20Myuemu.
また、本発明による半導体素子搭載用リードフレームの製造方法は、半導体素子搭載部及び端子部を有していて、該半導体素子搭載部及び端子部のうち少なくとも一方の側面に、半導体素子搭載側の面から該半導体素子搭載側とは反対側のはんだ実装側の面方向へ略垂直に延伸した端面と、前記はんだ実装側の面から前記半導体素子搭載側の面方向へ凸状に切除され凹状に形成された円弧面と、前記端面と前記円弧面とに接続する先端面とにより形成されてなる突起部を備えた半導体素子搭載用リードフレームの製造方法であって、リードフレーム用金属板の前記半導体素子搭載側とは反対側の前記はんだ実装側の面における、前記円弧面と接続する部位に対応する位置から所定の間隔を置いてエッチング速度制御用レジストパターンを配置することにより、エッチング速度を制御するようにして、前記半導体素子搭載側の面から前記はんだ実装側の面方向へ略垂直に延伸した端面と、前記はんだ実装側の面から前記半導体素子搭載側の面方向へ凸状に切除することにより凹状に形成される円弧面と、前記端面と前記円弧面とに接続する先端面とによりなる突起部を形成して、該突起部の前記先端面は、略平面あるいは円弧状をなすとともに肉厚となるように形成し、前記突起部が、前記先端面の前記端面と接続する部位における、前記端面の前記半導体素子搭載側の根元部から側面方向への突出長さが、１０μｍ以内、厚さが５０μｍ以上であり、前記先端面における前記円弧面と接続する部位が、前記先端面における前記端面と接続する部位よりも前記はんだ実装側の面に近い位置にあり、且つ、前記円弧面は、前記はんだ実装側の面と接続する部位から前記先端面と接続する部位に至るまで一つながりの略半円の円弧形状の面であり、前記円弧面における最も半導体素子搭載側の面に近い部位が、前記先端面における前記端面と接続する部位と同程度の高さ位置又は前記先端面における前記端面と接続する部位よりも前記半導体素子搭載側の面に近い位置にあるようにしたことを特徴とする。 A method of manufacturing a lead frame for a semiconductor element mounting according to the invention, have a semiconductor element mounting portion and the terminal portion, at least one side of said semiconductor element mounting portion and the terminal portion of the semiconductor element mounting side An end surface extending substantially perpendicularly from the surface to the surface direction of the solder mounting side opposite to the semiconductor element mounting side, and a convex shape from the surface of the solder mounting side to the surface direction of the semiconductor element mounting side. A method of manufacturing a lead frame for mounting a semiconductor element, comprising a projecting portion formed by a formed arc surface and a tip surface connected to the end surface and the arc surface, definitive to the surface of the solder mounting side opposite to the semiconductor element mounting side, placing the etch rate controlling resist pattern at a predetermined distance from the position corresponding to the portion connected with said arcuate surface The Rukoto, so as to control the etch rate, and the end surface extending substantially perpendicularly from the surface of the semiconductor element mounting side to the surface direction of the soldering side, from the surface of the soldering side of the semiconductor element mounting side an arcuate surface formed in a concave shape by Rukoto ablate convex to plane direction, to form a protrusion ing by the front end surface to be connected to said end surface and said arcuate surface, the tip of the protrusion portion The surface is formed so as to be substantially flat or arcuate and thick, and the projecting portion is located on the side of the end surface from the base portion on the semiconductor element mounting side at a portion connected to the end surface. protruding length of the plane direction is within 10 [mu] m, is not less 50μm or more thick, a portion connected to said arcuate surface in the front end face, the soldering side of the portion connected with the end surface in the front end surface Close to the face And the arc surface is a substantially semicircular arc-shaped surface connected from the portion connected to the surface on the solder mounting side to the portion connected to the tip surface. The portion close to the surface on the semiconductor element mounting side is closer to the surface on the semiconductor element mounting side than the portion on the tip end surface connected to the end surface, or the same height position as the portion connected to the end surface. It is characterized by being located.
また、本発明の半導体素子搭載用リードフレームの製造方法においては、前記エッチング速度制御用レジストパターンを、前記はんだ実装側の面における前記円弧面と接続する部位に対応する位置から板厚の４５〜５０％間隔をおいて、板厚の４２.５〜４７.５％の幅で配置するのが好ましい。 Further, Oite method of manufacturing a semiconductor device mounting a lead frame of the present invention, the plate of the etching rate controlling les di strike pattern, from a position corresponding to the portion connected with said arcuate surface in the plane of the soldering side the thickness at 45 to 50% increments of, preferably arranged in a 42.5 to 47.5% of the width of the plate thickness.
また、本発明の半導体素子搭載用リードフレームの製造方法においては、金属板の両面に、一方の面側において半導体素子搭載部と半導体素子と接続される端子部を、他方の面側においてはんだ実装端子部をそれぞれ形成するための開口しためっきレジストパターンを形成する工程と、形成しためっきレジストパターンから前記金属板の下地の金属が露出している部分に所定の厚さのめっきを施し、その後、前記めっきレジストパターンを剥離する工程と、前記金属板の他方の側の面への前記エッチング速度制御用レジストパターンの形成を含んで、前記金属板の両面にリードフレームパターン形成用エッチングレジストパターンを形成して、前記突起部を含むリードフレームパターンをエッチングにて形成し、その後、前記エッチング速度制御用レジストパターンを含む前記リードフレームパターン形成用エッチングレジストパターンを剥離する工程とを備えるのが好ましい。 Further, in the method for manufacturing a semiconductor device mounting a lead frame of the present invention, both surfaces of the metal plate, a terminal portion to be connected to the Oite semiconductor element mounting portion and the semiconductor element on one surface side, the other side Oite soldering terminal portion and forming an open plating resist pattern for forming each of the formed plating from the plating resist pattern in a predetermined thickness portions underlying metal is exposed to the metal plate alms, after that, the step of removing the plating resist pattern, including the formation of the etch rate controlling resist pattern to the surface of the other side of the metal plate, rie de to both sides of the metal plate to form a frame pattern forming etching resist pattern, the lead frame pattern including the projection portion is formed by etching, after them, the etching rate Preferably, Ru and a step of removing the lead frame pattern forming etching resist patterns including patronage resist pattern.
また、本発明の半導体素子搭載用リードフレームの製造方法においては、めっきされる金属の種類は、Ag、Cu/Ag、Ni/Pd/Au、及びNi/Pd/Au/Agのいずれかであるのが好ましい。 Further, Oite the method of manufacturing a semiconductor device mounting a lead frame of the present invention, the type of metal to be plated, Ag, either Cu / Ag, Ni / Pd / Au, and Ni / Pd / Au / Ag Is preferred .
また、本発明の半導体素子搭載用リードフレームの製造方法においては、前記突起部を含む前記リードフレームパターン形成のためのエッチング後に前記エッチング速度制御用レジストパターンを含む前記リードフレームパターン形成用エッチングレジストパターンを残した状態で、露出している前記金属板の側面を粗化液で処理することにより前記半導体素子搭載部及び前記端子部の側面に粗化面を形成するようにするのが好ましい。 Further, Oite method of manufacturing a semiconductor device mounting a lead frame of the present invention, the lead frame pattern forming etching including said etch rate controlling resist pattern after etching for lead frames formed including the protrusions while leaving the resist pattern, preferably so as to form a roughened surface on a side surface of said semiconductor element mounting portion and the terminal portion by processing the side surface of the metal plate is exposed by roughening solution .
本発明によれば、半導体素子搭載部及び端子部を備えた半導体素子搭載用リードフレームにおいて、半導体素子搭載部及び端子部のうち少なくとも一つの側面に、側面方向への突出長さが１０μｍ以内といった、少ない突出長さの突起部が形成されるので、端子間の電気絶縁性を効果的に満足することができ、また、該突起部は、その先端面が略平面状又は円弧状をなしているとともに厚さが５０μｍ以上の肉厚に形成され且つ、先端面における円弧面と接続する部位が、先端面における端面と接続する部位よりもはんだ実装側の面に近い位置にあり、且つ、円弧面は、はんだ実装側の面と接続する部位から先端面と接続する部位に至るまで一つながりの略半円の円弧形状の面であり、円弧面における最も半導体素子搭載側の面に近い部位が、先端面における端面と接続する部位と同程度の高さ位置又は先端面における端面と接続する部位よりも半導体素子搭載側の面に近い位置にあるので、端子と封止樹脂との密着性が格段に向上した状態で端子と封止樹脂との密着性が確保でき、且つ、先端が樹脂封止後のクラックを防止できるとともに、エッチングコンディションに違いが生じても安定して突起部を形成することができる。 According to the present invention, in the lead frame for mounting a semiconductor element including the semiconductor element mounting portion and the terminal portion, the protruding length in the side surface direction is within 10 μm on at least one side surface of the semiconductor element mounting portion and the terminal portion . less protrusion of the protruding length is formed Runode, it is possible to effectively satisfy the electrical insulation between end child, also, said protrusions, the distal end surface is a substantially planar or arcuate And the portion that is formed to a thickness of 50 μm or more and that is connected to the arc surface on the tip surface is closer to the surface on the solder mounting side than the portion that is connected to the end surface on the tip surface, and The arc surface is a substantially semicircular arc-shaped surface that is connected from the portion connected to the surface on the solder mounting side to the portion connected to the tip surface, and the portion closest to the surface on the semiconductor element mounting side in the arc surface But, Since the position on the tip surface is as high as the part connected to the end face or the position closer to the semiconductor element mounting side than the part connected to the end face on the tip face , the adhesion between the terminal and the sealing resin is remarkably high. In this state, the adhesion between the terminal and the sealing resin can be ensured, the crack at the tip can be prevented after the resin sealing , and the protrusion can be stably formed even if the etching condition is different. Can do.
本発明による半導体素子搭載用リードフレームは、その半導体素子搭載部及び端子部のうち少なくとも一つの側面に、突起部が形成されていることを特徴とする。そして、本発明における突起部は、厚さが５０μｍ以上の肉厚に形成され、該突起部の先端は、略平面状又は円弧状をし、先端面における円弧面と接続する部位が、先端面における端面と接続する部位よりもはんだ実装側の面に近い位置にあり、且つ、円弧面は、はんだ実装側の面と接続する部位から先端面と接続する部位に至るまで一つながりの略半円の円弧形状の面であり、円弧面における最も半導体素子搭載側の面に近い部位が、先端面における端面と接続する部位と同程度の高さ位置又は先端面における端面と接続する部位よりも半導体素子搭載側の面に近い位置にあるように形成されている。更に、本発明における突起部の先端は、該突起部の略垂直方向に伸びた端面の根元よりも、その側面方向への突出長さが１０μｍ以内に形成されている。また、本発明による半導体素子搭載用リードフレームのパターン形成工程は、アルカリ・酸処理を施したリードフレーム用金属板に感光性レジスト層を施し、突起物を形成するためのデザインを含むリードフレーム製造用マスクを用いて感光性レジスト層にデザインを露光・転写し、リードフレーム用金属板の面に半導体素子搭載部と端子部を形成する工程と、該リードフレーム用金属板にエッチングを施して、リードフレーム形状に形成するとともに、半導体素子搭載部と端子部のうち少なくとも一つの側面に、半導体素子搭載側の面から半導体素子搭載側とは反対側のはんだ実装側の面方向略垂直に延伸した端面と、はんだ実装側の面から半導体素子搭載側の面方向へ凹状にエッチングされた円弧面と、端面と円弧面とに接続する先端面とからなる突起部を形成する工程と、を有する。 The lead frame for mounting a semiconductor element according to the present invention is characterized in that a protrusion is formed on at least one side surface of the semiconductor element mounting portion and the terminal portion. The protrusions in the present invention, the thickness is formed thicker than 50 [mu] m, the projecting tip of the raised portion is substantially the planar or arcuate, the portion connected with the circular arc surface of the distal end surface, the tip The surface is located closer to the surface on the solder mounting side than the portion connected to the end surface, and the arc surface is a substantially half line from the portion connecting to the surface on the solder mounting side to the portion connecting to the tip surface. A circular arc-shaped surface of the circle, where the portion of the circular arc surface closest to the surface on which the semiconductor element is mounted is higher than the portion connected to the end surface on the tip surface or the portion connected to the end surface on the tip surface It is formed so as to be close to the surface on the semiconductor element mounting side . Furthermore, the tip of the projection portion in the present invention, protruding than the root of the extended end face substantially vertical raised portion, the projecting length of the side surface thereof direction is formed in 10μm or less. In addition, the pattern formation process of the lead frame for mounting a semiconductor element according to the present invention includes a design for forming a protrusion by applying a photosensitive resist layer to a metal plate for lead frame that has been subjected to alkali / acid treatment. exposing and transferring the design to the photosensitive resist layer with use mask, by performing the steps of forming a semiconductor element mounting portion and the terminal portion on the surface of the metal lead frame plate, etching the metal plate for the lead frame, and forming a lead frame shape, on at least one side of the semiconductor element mounting portion and the terminal portion, extending Shin the surface direction substantially perpendicular solder mounting side opposite to the semiconductor element mounting side from the surface of the semiconductor element mounting side tip surface connecting the end faces, a circular arc surface that is etched into a concave shape from the surface of the soldering side to face direction of the semiconductor element mounting side, the end surface and the arc surface And a step of forming a projecting portion made of.
本発明による突起部を形成する方法として、例えば、半導体素子搭載部を含む形状側面周囲に突起部形成のためのごく細い幅のレジスト層を形成した状態でエッチングすることにより、該突起部形成のためのレジスト層を形成した部分のエッチングによる金属板の溶解時間を他の部位より遅らせて、他の部位の形状形成が完了した状態で、突起部を形成することを試みた。 As a method of forming the protrusions according to the present invention, for example, etching is performed in a state where a very narrow width resist layer for forming the protrusions is formed around the side surface including the semiconductor element mounting portion. An attempt was made to form the protrusion in a state where the formation of the other part was completed by delaying the dissolution time of the metal plate by etching of the part where the resist layer was formed for the other part.
前記方法での突起部の形成にあたり、図１に示す如く、半導体素子搭載部を含む面にレジスト層２を形成すると共に、その裏側つまり樹脂封止後に露出する面側へ、ごく狭い幅のレジスト層３を形成してエッチングを行った結果、半導体素子搭載部の面から略垂直方向へ延伸した端面を有する突起部４を形成することができた。しかし、形成された突起部４の厚みは１０〜１５μｍと非常に薄く、エッチングコンディションのわずかな違いでも形状の出来栄えが大きく変動して突起部が消失してしまい、突起部を維持することが困難であった。また、突起部４の先端形状が鋭利であり、樹脂封止後のクラックの起点となる虞が大きかった（図２及び図３参照）。 In forming the protrusions by the above method, as shown in FIG. 1, a resist layer 2 is formed on the surface including the semiconductor element mounting portion, and a resist with a very narrow width is formed on the back side, that is, the surface side exposed after resin sealing. As a result of etching to form a layer 3, it was possible to form the protruding portions 4 having an end face extending substantially in the vertical direction from the surface of the semiconductor element mounting portion. However, the thickness of the formed protrusion 4 is as very thin as 10 to 15 μm, and even with a slight difference in etching conditions, the quality of the shape largely fluctuates and the protrusion disappears, making it difficult to maintain the protrusion. Met. Moreover, the tip shape of the protrusion part 4 was sharp, and there was a high possibility that it would become a starting point of a crack after resin sealing (see FIGS. 2 and 3).
これを回避するためには、突起部４の厚みをできるだけ持たせて、エッチングコンディションに違いが生じても、安定して突起部が形成される状態を作る必要があると考えた。その方法として、図４に示すように、樹脂封止後に露出する面側に形成したレジスト層３の幅Ｂと、レジスト層２とレジスト層３との間のレジスト層の形成されていない箇所の幅Ａとを制御することを試みた。その結果、樹脂封止後に露出する面側に形成したレジスト層３の幅Ｂを９０μｍとし、レジスト層２とレジスト層３との間のレジスト層の形成されていない箇所の幅Ａを９５μｍとしたときに、厚みが５０μｍであり、先端面における円弧面と接続する部位が、先端面における端面と接続する部位よりもはんだ実装側の面に近い位置にあり、且つ、円弧面は、はんだ実装側の面と接続する部位から先端面と接続する部位に至るまで一つながりの略半円の円弧形状の面であり、円弧面における最も半導体素子搭載側の面に近い部位が、先端面における端面と接続する部位と同程度の高さ位置又は先端面における端面と接続する部位よりも半導体素子搭載側の面に近い位置にある突起部４を安定して形成できることが分かった。 To avoid this, to have as much as possible the thickness of the protruding portions 4, even if the difference in the etching conditions was considered necessary making state projections stably is formed there Ru. As the method, as shown in FIG. 4, the width B of the resist layer 3 formed on the surface side exposed after resin sealing, and the portion where the resist layer between the resist layer 2 and the resist layer 3 is not formed. Attempted to control width A. As a result, the width B of the resist layer 3 formed on the surface side exposed after resin sealing was 90 μm, and the width A of the portion where the resist layer was not formed between the resist layer 2 and the resist layer 3 was 95 μm. when a thickness of 50μm der is, portion connected with arcuate surface at the tip surface is located at a position near the surface of the soldering side of the portion connected with an end face of the distal end surface, and an arc surface, soldering This is a semi-circular arc-shaped surface connected from the part connected to the side surface to the part connected to the tip surface, and the part closest to the surface on the semiconductor element mounting side in the arc surface is the end face on the tip surface the protruding portions 4 Ru located near close to the surface of the semiconductor element mounting side of the portion connected with an end face at the height position or the distal end surface of the same degree as portions connecting were found to be formed stably with.
また、上記のように、幅Ｂを９０μｍとし幅Ａを９５μｍとしたときは、突起部４の先端部の形状についても、鋭利な形状ではなく略平面状又は丸みを帯びた形状に形成できることが分かった。これにより、樹脂封止後の突起部４の先端からの樹脂クラックの発生も抑止され得ることが確認された。 As described above, when the width B is 90 μm and the width A is 95 μm, the shape of the tip portion of the protrusion 4 can be formed in a substantially flat shape or rounded shape instead of a sharp shape. I understood. Thereby, it was confirmed that generation | occurrence | production of the resin crack from the front-end | tip of the projection part 4 after resin sealing can also be suppressed.
以上、突起部４は、半導体素子搭載部の一側面に形成されるものとして説明したが、この突起部４は、半導体素子搭載部の両側面に形成してもよい。また、端子部の一側面に形成してもよいし、端子部の両側面に形成してもよい。また、突起部４の側面方向への突出長さは、１０μｍ以内、厚さが５０μｍ以上であり、先端面における円弧面と接続する部位が、先端面における端面と接続する部位よりもはんだ実装側の面に近い位置にあり、且つ、円弧面は、はんだ実装側の面と接続する部位から先端面と接続する部位に至るまで一つながりの略半円の円弧形状の面であり、円弧面における最も半導体素子搭載側の面に近い部位が、先端面における端面と接続する部位と同程度の高さ位置又は先端面における端面と接続する部位よりも半導体素子搭載側の面に近い位置にある。 As described above, the protrusion 4 is described as being formed on one side surface of the semiconductor element mounting portion. However, the protrusion 4 may be formed on both side surfaces of the semiconductor element mounting portion. Moreover, you may form in one side of a terminal part and may form in the both sides | surfaces of a terminal part. Further, the protruding length of the side surface direction of the projection portion 4, 10 [mu] m within state, and are the 50μm or more thick, portion connected with arcuate surface at the tip surface is soldered than portion connected with an end face of the distal end surface The arc surface is a substantially semicircular arc-shaped surface connected from the portion connected to the surface on the solder mounting side to the portion connected to the tip surface. The part closest to the surface on the semiconductor element mounting side is the same height as the part connected to the end face on the tip surface or the position closer to the surface on the semiconductor element mounting side than the part connected to the end face on the tip surface. .
本実施例を、図４，５を用いて説明する。リードフレーム用金属板１として、厚さ０．２ｍｍ、幅１８０ｍｍの帯状銅材（株式会社神戸製鋼所製：ＫＬＦ−１９４）を用い、この金属板の両面に、厚さ２０μｍの感光性レジスト層（旭化成イーマテリアルズ株式会社製：ネガ型感光性レジストＡＱ−２０５８）を形成した。そして、突起部４を形成するため、樹脂封止後露出する面側に幅Ｂ：９０μｍのエッチングレジストパターン層を形成するためのパターン（図４参照）を含むリードフレーム用デザインを施したガラスマスク（コニカミノルタアドバンストレイヤー株式会社製：ＨＹ２−５０Ｐ）を用い、感光性レジスト層を施した金属板１の両面を露光し、突起部４を形成するためのエッチングレジストパターンを含むリードフレームエッチングレジストパターン層を形成した。このとき、樹脂封止後露出する面側において、リードフレーム形成用のエッチングレジスト層２と突起部４を形成するためのエッチングレジスト層３との間の開口幅Ａ：９５μｍとした（図４参照）。 This embodiment will be described with reference to FIGS. As the lead plate metal plate 1, a strip-shaped copper material having a thickness of 0.2 mm and a width of 180 mm (manufactured by Kobe Steel, Ltd .: KLF-194) is used, and a photosensitive resist layer having a thickness of 20 μm is formed on both surfaces of the metal plate. (Asahi Kasei E-Materials Co., Ltd. product: negative photosensitive resist AQ-2058) was formed. Then, a glass mask having a lead frame design including a pattern (see FIG. 4) for forming an etching resist pattern layer having a width B of 90 μm on the surface side exposed after resin sealing in order to form the protrusions 4. (Konica Minolta Advanced Layer Co., Ltd .: HY2-50P) is used to expose both surfaces of the metal plate 1 on which the photosensitive resist layer has been applied, and to include a lead frame etching resist pattern including an etching resist pattern for forming the protrusions 4. A layer was formed. At this time, the opening width A between the etching resist layer 2 for forming the lead frame and the etching resist layer 3 for forming the protrusions 4 is set to 95 μm on the surface side exposed after the resin sealing (see FIG. 4). ).
そして、突起部形成用のパターンを含むエッチングレジストパターン層を形成した金属板１を塩化第二鉄溶液にてエッチングし、金属板１の樹脂封止後露出する面へ施した突起部形成のためのごく細いエッチングレジスト層３により、その部分のエッチング進行を遅らせ、突出長さ０μｍ、高さ９０μｍ、厚さ５０μｍ、先端面における円弧面と接続する部位が、先端面における端面と接続する部位よりもはんだ実装側の面に近い位置にあり、且つ、円弧面は、はんだ実装側の面と接続する部位から先端面と接続する部位に至るまで一つながりの略半円の円弧形状の面であり、円弧面における最も半導体素子搭載側の面に近い部位が、先端面における端面と接続する部位と同程度の高さ位置又は先端面における端面と接続する部位よりも半導体素子搭載側の面に近い位置にある突起部４を含むリードフレーム形状を形成し、その後、エッチングレジスト層を剥離して帯状の銅材リードフレームを得た（図５写真参照）。その後、帯状のままごく薄い金属めっきを施した。その後、短冊状にカットし、封止樹脂止め用の樹脂テープを貼り付け、完成されたリードフレーム製品とした。 Then, the metal plate 1 on which the etching resist pattern layer including the pattern for forming the protrusion is formed is etched with a ferric chloride solution, and the protrusion is formed on the surface of the metal plate 1 exposed after resin sealing. Due to the very thin etching resist layer 3, the etching progress of the portion is delayed, the protrusion length is 0 μm, the height is 90 μm, the thickness is 50 μm , and the portion connected to the arc surface on the tip surface is more than the portion connected to the end surface on the tip surface Is also located close to the surface on the solder mounting side, and the arc surface is a substantially semicircular arc-shaped surface connected from the part connected to the surface on the solder mounting side to the part connected to the tip surface. The part closest to the surface on the semiconductor element mounting side on the arc surface is the same height as the part connected to the end face on the tip surface or the semiconductor than the part connected to the end face on the tip face A lead frame shape including the protrusions 4 located close to the surface on the element mounting side was formed, and then the etching resist layer was peeled off to obtain a strip-shaped copper material lead frame (see the photograph in FIG. 5). Thereafter, an extremely thin metal plating was applied in the form of a strip. Thereafter, it was cut into strips, and a resin tape for sealing resin sealing was applied thereto to obtain a completed lead frame product.
次に、図４及び図５を用いて、実施例２の説明をする。本実施例は、実施例１と同じ形状の突起部４を有するリードフレームであるが、エッチング後にレジストパターン層の剥離をする前に、粗面化処理を施し、その後にレジストパターン層を剥離してめっき処理を施した点で実施例１と異なる。 Next, Example 2 will be described with reference to FIGS. 4 and 5. In this example, the lead frame has the protrusion 4 having the same shape as that of Example 1, but before the resist pattern layer is peeled off after etching, a roughening treatment is performed, and then the resist pattern layer is peeled off. This is different from Example 1 in that the plating process was performed.
リードフレーム用金属板１として、厚さ０．２ｍｍ、幅１８０ｍｍの帯状銅材（株式会社神戸製鋼所製：ＫＬＦ−１９４）を用い、この金属板の両面に、厚さ２０μｍの感光性レジスト層（旭化成イーマテリアルズ株式会社製：ネガ型感光性レジストＡＱ−２０５８）を形成した。そして、突起部４を形成するため、樹脂封止後露出する面側に幅Ｂ：９０μｍのエッチングレジストパターン層を形成するためのパターン（図４参照）を含むリードフレーム用デザインを施したガラスマスク（コニカミノルタアドバンストレイヤー株式会社製：ＨＹ２−５０Ｐ）を用い、感光性レジスト層を施した金属板１の両面を露光し、突起部４を形成するためのエッチングレジストパターンを含むリードフレームエッチングレジストパターン層を形成した。このとき、樹脂封止後露出する面側において、リードフレーム形成用のエッチングレジスト層２と突起部４を形成するためのエッチングレジスト層３との間の開口幅Ａ：９５μｍとした（図４参照）。 As the lead plate metal plate 1, a strip-shaped copper material having a thickness of 0.2 mm and a width of 180 mm (manufactured by Kobe Steel, Ltd .: KLF-194) is used, and a photosensitive resist layer having a thickness of 20 μm is formed on both surfaces of the metal plate. (Asahi Kasei E-Materials Co., Ltd. product: negative photosensitive resist AQ-2058) was formed. Then, a glass mask having a lead frame design including a pattern (see FIG. 4) for forming an etching resist pattern layer having a width B of 90 μm on the surface side exposed after resin sealing in order to form the protrusions 4. (Konica Minolta Advanced Layer Co., Ltd .: HY2-50P) is used to expose both surfaces of the metal plate 1 on which the photosensitive resist layer has been applied, and to include a lead frame etching resist pattern including an etching resist pattern for forming the protrusions 4. A layer was formed. At this time, the opening width A between the etching resist layer 2 for forming the lead frame and the etching resist layer 3 for forming the protrusions 4 is set to 95 μm on the surface side exposed after the resin sealing (see FIG. 4). ).
そして、突起部形成用のパターンを含むエッチングレジストパターン層を形成した金属板１を塩化第二鉄溶液にてエッチングし、金属板１の樹脂封止後露出する面へ施した突起部形成のためのごく細いエッチングレジスト層３により、その部分のエッチング進行を遅らせ、突出長さ０μｍ、高さ９０μｍ、厚さ５０μｍ、先端面における円弧面と接続する部位が、先端面における端面と接続する部位よりもはんだ実装側の面に近い位置にあり、且つ、円弧面は、はんだ実装側の面と接続する部位から先端面と接続する部位に至るまで一つながりの略半円の円弧形状の面であり、円弧面における最も半導体素子搭載側の面に近い部位が、先端面における端面と接続する部位と同程度の高さ位置又は先端面における端面と接続する部位よりも半導体素子搭載側の面に近い位置にある突起部４を含むリードフレーム形状を形成した（図５写真参照）。その後、エッチングレジストパターン層を剥離せずに、帯状のリードフレームを、有機酸系又は過酸化水素−硫酸系の粗化液を用いて、突起部を含むエッチングレジストパターン層により保護されない部位の表面を平均粗さ（Ｒａ）が０．１２〜０．２０μｍとなるように粗面化して、より樹脂密着性を向上させたリードフレームとした。その後、エッチングレジストパターン層を剥離して、帯状のまま薄い金属めっきを施した。その後、短冊状にカットし、封止樹脂止め用の樹脂テープを貼り付け、完成されたリードフレーム製品とした。 Then, the metal plate 1 on which the etching resist pattern layer including the pattern for forming the protrusion is formed is etched with a ferric chloride solution, and the protrusion is formed on the surface of the metal plate 1 exposed after resin sealing. Due to the very thin etching resist layer 3, the etching progress of the portion is delayed, the protrusion length is 0 μm, the height is 90 μm, the thickness is 50 μm , and the portion connected to the arc surface on the tip surface is more than the portion connected to the end surface on the tip surface. Is also located close to the surface on the solder mounting side, and the arc surface is a substantially semicircular arc-shaped surface connected from the part connected to the surface on the solder mounting side to the part connected to the tip surface. The part closest to the surface on the semiconductor element mounting side on the arc surface is the same height as the part connected to the end face on the tip surface or the semiconductor than the part connected to the end face on the tip face A lead frame shape including the protruding portion 4 located near the element mounting surface was formed (see the photograph in FIG. 5). Thereafter, without stripping the etching resist pattern layer, the surface of the belt-shaped lead frame is not protected by the etching resist pattern layer including protrusions using an organic acid-based or hydrogen peroxide-sulfuric acid-based roughening solution. Was roughened to have an average roughness (Ra) of 0.12 to 0.20 μm to obtain a lead frame with improved resin adhesion. Thereafter, the etching resist pattern layer was peeled off, and thin metal plating was applied in a strip shape. Thereafter, it was cut into strips, and a resin tape for sealing resin sealing was applied thereto to obtain a completed lead frame product.
次に、図４及び図５を用いて、実施例３の説明をする。本実施例は、実施例１と同じ形状の突起部４を有するリードフレームであるが、エッチング前にめっきレジストパターン層を形成し、半導体素子搭載部と端子部にめっきを施し、その後めっきレジストを剥離した後、エチッングレジストパッターン層を形成してエッチングすることによりリードフレームパターンを形成し、エッチングレジストパターン層を剥離する前に粗面化処理を施し、その後にエッチングレジストパターン層を剥離するようにした点で実施例１とは異なる。 Next, Example 3 will be described with reference to FIGS. 4 and 5. The present embodiment is a lead frame having the protrusion 4 having the same shape as that of the first embodiment. However, a plating resist pattern layer is formed before etching, the semiconductor element mounting portion and the terminal portion are plated, and then the plating resist is applied. after stripping, to form a et chip packaging resist package turns layer to form the lead frame patterns by etching, subjected to a roughening treatment prior to stripping the etching resist patterns layer, then etching resist pattern layer This is different from Example 1 in that it is peeled off.
リードフレーム用金属板１として、厚さ０．２ｍｍ、幅１８０ｍｍの帯状銅材（株式会社神戸製鋼所製：ＫＬＦ−１９４）を用い、この金属板の両面に、厚さ２０μｍの感光性レジスト層（旭化成イーマテリアルズ株式会社製：ネガ型感光性レジストＡＱ−２０５８）を形成した。そして、めっきレジスト層を形成するため、リードフレームに施すめっき部位のパターンを有するガラスマスクをパターン位置合わせした状態で金属板１の表裏面上に被せて、この両面をガラスマスクを介して紫外線にて露光した。露光後にガラスマスクを外し、感光性レジスト層付金属板を現像液に浸漬して現像すると、紫外線が遮光された部分すなわち半導体素子搭載部及び端子部などめっきを施す部分の感光性レジスト層のみが除去されためっきレジスト層が得られる。 As the lead plate metal plate 1, a strip-shaped copper material having a thickness of 0.2 mm and a width of 180 mm (manufactured by Kobe Steel, Ltd .: KLF-194) is used, and a photosensitive resist layer having a thickness of 20 μm is formed on both surfaces of the metal plate. (Asahi Kasei E-Materials Co., Ltd. product: negative photosensitive resist AQ-2058) was formed. And in order to form a plating resist layer, the glass mask which has the pattern of the plating part applied to a lead frame is covered on the front and back of the metal plate 1 in the state of pattern alignment, and both surfaces are made ultraviolet rays through the glass mask. And exposed. After the exposure, the glass mask is removed, and the metal plate with the photosensitive resist layer is immersed in the developer and developed, so that only the photosensitive resist layer in the portion where the ultraviolet rays are shielded, that is, the portion to be plated, such as the semiconductor element mounting portion and the terminal portion. The removed plating resist layer is obtained.
次に、めっきレジスト層が形成された金属板１をめっき槽へ入れて、該金属板１の金属が露出した部分へＡｇめっきを３μｍ厚となるように施した。その後、めっきレジスト層を剥離することにより、めっき層付金属板が得られる。なお、この場合、めっきの種類については、上記のＡｇめっきに限定されるものではなく、例えばＮｉ/Ｐｄ/Ａｕなど、一般的にリードフレームに適用可能ないかなる種類の金属であっても良く、また、いかなるめっき構成であっても良い。 Next, the metal plate 1 on which the plating resist layer was formed was placed in a plating tank, and Ag plating was applied to the portion where the metal of the metal plate 1 was exposed to a thickness of 3 μm. Then, a metal plate with a plating layer is obtained by peeling the plating resist layer. In this case, the type of plating is not limited to the above Ag plating, and any type of metal generally applicable to a lead frame, such as Ni / Pd / Au, may be used. Any plating configuration may be used.
次に、金属板１の表裏面全体に再度感光性レジスト層を形成した。そして、突起部４を形成するため、樹脂封止後露出する面側に幅Ｂ：９０μｍのエッチングレジストパターン層を形成するためのパターン（図４参照）を含むリードフレーム用デザインを施したガラスマスク（コニカミノルタアドバンストレイヤー株式会社製：ＨＹ２−５０Ｐ）を用い、感光性レジスト層を施した金属板１の両面を露光し、突起部４を形成するためのエッチングレジストパターンを含むリードフレームエッチングレジストパターン層を形成した。このとき、樹脂封止後露出する面側において、リードフレーム形成用のエッチングレジスト層２と突起部４を形成するためのエッチングレジスト層３との間の開口幅Ａ：９５μｍとした（図４参照）。なお、このガラスマスクのパターンは、上記のめっきを施された部位よりも外形が５０μｍ大きく、得られたリードフレームエッチングレジストパターン層はめっきの施された領域を完全に覆うことができる。 Next, a photosensitive resist layer was formed again on the entire front and back surfaces of the metal plate 1. Then, a glass mask having a lead frame design including a pattern (see FIG. 4) for forming an etching resist pattern layer having a width B of 90 μm on the surface side exposed after resin sealing in order to form the protrusions 4. (Konica Minolta Advanced Layer Co., Ltd .: HY2-50P) is used to expose both surfaces of the metal plate 1 on which the photosensitive resist layer has been applied, and to include a lead frame etching resist pattern including an etching resist pattern for forming the protrusions 4. A layer was formed. At this time, the opening width A between the etching resist layer 2 for forming the lead frame and the etching resist layer 3 for forming the protrusions 4 is set to 95 μm on the surface side exposed after the resin sealing (see FIG. 4). ). The glass mask pattern has an outer shape 50 μm larger than the plated portion, and the obtained lead frame etching resist pattern layer can completely cover the plated region.
そして、突起部形成用のパターンを含むエッチングレジストパターン層を形成した金属板１を塩化第二鉄溶液にてエッチングし、金属板１の樹脂封止後露出する面へ施した突起部形成のためのごく細いエッチングレジスト層３により、その部分のエッチング進行を遅らせ、突出長さ０μｍ、高さ９０μｍ、厚さ５０μｍ、先端面における円弧面と接続する部位が、先端面における端面と接続する部位よりもはんだ実装側の面に近い位置にあり、且つ、円弧面は、はんだ実装側の面と接続する部位から先端面と接続する部位に至るまで一つながりの略半円の円弧形状の面であり、円弧面における最も半導体素子搭載側の面に近い部位が、先端面における端面と接続する部位と同程度の高さ位置又は先端面における端面と接続する部位よりも半導体素子搭載側の面に近い位置にある突起部４を含むリードフレーム形状を形成した（図５写真参照）。その後、エッチングレジストパターン層を剥離せず残したまま、帯状のリードフレームを、有機酸系又は過酸化水素−硫酸系の粗化液を用いて、突起部を含むエッチングレジストパターン層により保護されない部位の表面を平均粗さ（Ｒａ）が０．１２〜０．２０μｍとなるように粗面化した。その後、エッチングレジストパターン層を剥離して、表面が樹脂密着性を向上させた粗面となっているモールドロック用の側面突起部を有するリードフレームを得た。 Then, the metal plate 1 on which the etching resist pattern layer including the pattern for forming the protrusion is formed is etched with a ferric chloride solution, and the protrusion is formed on the surface of the metal plate 1 exposed after resin sealing. Due to the very thin etching resist layer 3, the etching progress of the portion is delayed, the protrusion length is 0 μm, the height is 90 μm, the thickness is 50 μm , and the portion connected to the arc surface on the tip surface is more than the portion connected to the end surface on the tip surface. Is also located close to the surface on the solder mounting side, and the arc surface is a substantially semicircular arc-shaped surface connected from the part connected to the surface on the solder mounting side to the part connected to the tip surface. The part closest to the surface on the semiconductor element mounting side on the arc surface is the same height as the part connected to the end face on the tip surface or the semiconductor than the part connected to the end face on the tip face A lead frame shape including the protruding portion 4 located near the element mounting surface was formed (see the photograph in FIG. 5). Thereafter, the strip-shaped lead frame is not protected by the etching resist pattern layer including the protrusions using the organic acid-based or hydrogen peroxide-sulfuric acid-based roughening liquid while leaving the etching resist pattern layer without peeling. The surface was roughened so that the average roughness (Ra) was 0.12 to 0.20 μm. Thereafter, the etching resist pattern layer was peeled off to obtain a lead frame having a side surface protruding portion for mold lock whose surface is a rough surface with improved resin adhesion.
リードフレーム用金属板１として、厚さ０．２ｍｍ、幅１８０ｍｍの帯状銅材（株式会社神戸製鋼所製：ＫＬＦ−１９４）を用い、この金属板の両面に、厚さ２０μｍの感光性レジスト層（旭化成イーマテリアルズ株式会社製：ネガ型感光性レジストＡＱ−２０５８）を形成した。そして、突起部４を形成するため、樹脂封止後露出する面側に幅Ｂ：１１０μｍのエッチングレジストパターン層を形成するためのパターン（図４参照）を含むリードフレーム用デザインを施したガラスマスク（コニカミノルタアドバンストレイヤー株式会社製：ＨＹ２−５０Ｐ）を用い、感光性レジスト層を施した金属板１の両面を露光し、突起部４を形成するためのエッチングレジストパターンを含むリードフレームエッチングレジストパターン層を形成した。このとき、樹脂封止後露出する面側において、リードフレーム形成用のエッチングレジスト層２と突起部４を形成するためのエッチングレジスト層３との間の開口幅Ａ：１２５μｍとした（図４参照）。 As the lead plate metal plate 1, a strip-shaped copper material having a thickness of 0.2 mm and a width of 180 mm (manufactured by Kobe Steel, Ltd .: KLF-194) is used, and a photosensitive resist layer having a thickness of 20 μm is formed on both surfaces of the metal plate. (Asahi Kasei E-Materials Co., Ltd. product: negative photosensitive resist AQ-2058) was formed. Then, a glass mask having a lead frame design including a pattern (see FIG. 4) for forming an etching resist pattern layer having a width B of 110 μm on the surface side exposed after resin sealing in order to form the protrusions 4. (Konica Minolta Advanced Layer Co., Ltd .: HY2-50P) is used to expose both surfaces of the metal plate 1 on which the photosensitive resist layer has been applied, and to include a lead frame etching resist pattern including an etching resist pattern for forming the protrusions 4. A layer was formed. At this time, the opening width A between the etching resist layer 2 for forming the lead frame and the etching resist layer 3 for forming the protrusions 4 is set to 125 μm on the surface side exposed after the resin sealing (see FIG. 4). ).
そして、突起部形成用のパターンを含むエッチングレジストパターン層を形成した金属板１を塩化第二鉄溶液にてエッチングし、金属板１の樹脂封止後露出する面へ施した突起部形成のためのごく細いエッチングレジスト層３により、その部分のエッチング進行を遅らせ、突起部４を含むリードフレームを製造した。しかし、形成された突起部４の厚さは１５μｍと薄く、また部分的に突起部が変形・消失しているところもある上に先端形状も鋭利であり、樹脂封止後の密着力不足および樹脂クラックの起点となる可能性の大きい形状のものであった（図２参照）。 Then, the metal plate 1 on which the etching resist pattern layer including the pattern for forming the protrusion is formed is etched with a ferric chloride solution, and the protrusion is formed on the surface of the metal plate 1 exposed after resin sealing. A very thin etching resist layer 3 was used to retard the etching progress of the portion, and a lead frame including the protrusion 4 was manufactured. However, the thickness of the formed protrusions 4 is as thin as 15 μm, the protrusions are partially deformed / disappeared, and the tip shape is sharp, resulting in insufficient adhesion after resin sealing and It had a shape with a high possibility of starting a resin crack (see FIG. 2).
１ リードフレーム用金属板
２ レジスト
３ レジスト（突起部形成用）
４ 形成された突起部
1 Metal plate for lead frame 2 Resist 3 Resist (for forming protrusion)
4 Protrusions formed
Claims (9)
リードフレーム用金属板の前記半導体素子搭載側とは反対側の前記はんだ実装側の面における、前記円弧面と接続する部位に対応する位置から所定の間隔を置いてエッチング速度制御用レジストパターンを配置することにより、エッチング速度を制御するようにして、前記半導体素子搭載側の面から前記はんだ実装側の面方向へ略垂直に延伸した端面と、前記はんだ実装側の面から前記半導体素子搭載側の面方向へ凸状に切除することにより凹状に形成される円弧面と、前記端面と前記円弧面とに接続する先端面とによりなる突起部を形成して、該突起部の前記先端面は、略平面あるいは円弧状をなすとともに肉厚となるように形成し、前記突起部が、前記先端面の前記端面と接続する部位における、前記端面の前記半導体素子搭載側の根元部から側面方向への突出長さが、１０μｍ以内、厚さが５０μｍ以上であり、前記先端面における前記円弧面と接続する部位が、前記先端面における前記端面と接続する部位よりも前記はんだ実装側の面に近い位置にあり、且つ、前記円弧面は、前記はんだ実装側の面と接続する部位から前記先端面と接続する部位に至るまで一つながりの略半円の円弧形状の面であり、前記円弧面における最も半導体素子搭載側の面に近い部位が、前記先端面における前記端面と接続する部位と同程度の高さ位置又は前記先端面における前記端面と接続する部位よりも前記半導体素子搭載側の面に近い位置にあるようにしたことを特徴とする半導体素子搭載用リードフレームの製造方法。 A semiconductor element mounting portion and a terminal portion, and at least one side surface of the semiconductor element mounting portion and the terminal portion is disposed on the solder mounting side opposite to the semiconductor element mounting side from the surface on the semiconductor element mounting side. An end face extending substantially perpendicularly to the surface direction, an arcuate surface that is cut in a convex shape from the surface on the solder mounting side to the surface direction on the semiconductor element mounting side, and connected to the end surface and the arc surface A lead frame for mounting a semiconductor element comprising a protrusion formed by a leading end surface,
Definitive on the surface of the solder mounting side opposite to the semiconductor element mounting side of the metal plate for a lead frame, the etching rate controlling resist pattern at a predetermined distance from the position corresponding to the portion connected with said arcuate surface by arranging, so as to control the etch rate, and the end surface extending substantially perpendicularly from the surface of the semiconductor element mounting side to the surface direction of the soldering side, the semiconductor element mounting side from the surface of the soldering side an arcuate surface formed in a concave shape by Rukoto ablate convex in the plane direction of forming a protrusion ing by the front end surface to be connected to said end surface and said arcuate surface, projecting above the raised portion the distal end surface is formed to have a thickness with a substantially planar or arcuate, the protrusion is in the portion connected with said end face of said tip end surface, the base of the semiconductor element mounting side of the end face Protruding length of the side surface Direction is within 10μm from is not less 50μm or more thick, a portion connected to said arcuate surface in the front end surface than said portion connected with said end face of said tip end surface solder The arcuate surface is in a position close to the surface on the mounting side, and the arc surface is a substantially semicircular arc-shaped surface connected from the part connected to the surface on the solder mounting side to the part connected to the tip surface. And the portion of the arcuate surface closest to the surface on which the semiconductor element is mounted is at the same height as the portion of the tip surface connected to the end surface or the portion of the tip surface connected to the end surface. A method of manufacturing a lead frame for mounting a semiconductor element, wherein the lead frame is located close to the element mounting side surface .
形成しためっきレジストパターンから前記金属板の下地の金属が露出している部分に所定の厚さのめっきを施した後、前記めっきレジストパターンを剥離し、
前記金属板の他方の側の面への前記エッチング速度制御用レジストパターンの形成を含んで、前記金属板の両面にリードフレームパターン形成用エッチングレジストパターンを形成して、前記突起部を含むリードフレームパターンをエッチングにて形成し、その後、前記エッチング速度制御用レジストパターンを含む前記リードフレームパターン形成用エッチングレジストパターンを剥離することを特徴とする請求項５又は６に記載の半導体装置搭載用リードフレームの製造方法。 To both sides of the metal plate, plating resist, a terminal portion to be connected to the Oite semiconductor element mounting portion and the semiconductor element on one surface side, an opening for forming respectively a Oite soldering terminal portions on the other side Forming a pattern,
After performing plating of a predetermined thickness on a portion where the underlying metal of the metal plate is exposed from the formed plating resist pattern, the plating resist pattern is peeled off,
Include formation of the etching rate controlling resist pattern to the surface of the other side of the metal plate, to form a rie de frame pattern forming etching resist pattern on both surfaces of the metal plate, the protrusion the lead frame pattern comprising forming by etching, after the semiconductor device according to claim 5 or 6, characterized in that peeling the lead frame pattern forming etching resist pattern including the etch rate controlling resist pattern Manufacturing method for mounting lead frame.
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| JPH0231844B2 (en) * | 1986-08-18 | 1990-07-17 | Toppan Printing Co Ltd | HANDOTAISOCHORIIDOFUREEMUNOSEIZOHOHO |
| JP2000195984A (en) * | 1998-12-24 | 2000-07-14 | Shinko Electric Ind Co Ltd | Semiconductor device, its manufacture carrier substrate therefor and its manufacture |
| JP3879410B2 (en) * | 2001-02-06 | 2007-02-14 | 凸版印刷株式会社 | Lead frame manufacturing method |
| JP2004247613A (en) * | 2003-02-14 | 2004-09-02 | Sanyo Electric Co Ltd | Semiconductor device and its manufacturing process |
| JP5582382B2 (en) * | 2009-12-17 | 2014-09-03 | 大日本印刷株式会社 | Lead frame and manufacturing method thereof, and semiconductor device and manufacturing method thereof |
| JP5710128B2 (en) * | 2010-01-19 | 2015-04-30 | 大日本印刷株式会社 | Manufacturing method of lead frame with resin |
| JP5813335B2 (en) * | 2011-02-08 | 2015-11-17 | 新光電気工業株式会社 | Lead frame, semiconductor device, lead frame manufacturing method, and semiconductor device manufacturing method |
| JP2012182207A (en) * | 2011-02-28 | 2012-09-20 | Toppan Printing Co Ltd | Lead frame for led element and method for manufacturing the same |
| JP6209826B2 (en) * | 2013-02-22 | 2017-10-11 | 大日本印刷株式会社 | Lead frame, lead frame with resin, multi-sided body of lead frame, multi-sided body of lead frame with resin, optical semiconductor device, multi-sided body of optical semiconductor device |
| JP6291713B2 (en) * | 2013-03-14 | 2018-03-14 | 日亜化学工業株式会社 | Light-emitting element mounting substrate, light-emitting device including the same, and lead frame |
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