JP6199322B2 - 制御されたキャビティmemsパッケージを集積化ボードに埋め込むための方法 - Google Patents
制御されたキャビティmemsパッケージを集積化ボードに埋め込むための方法 Download PDFInfo
- Publication number
- JP6199322B2 JP6199322B2 JP2014559988A JP2014559988A JP6199322B2 JP 6199322 B2 JP6199322 B2 JP 6199322B2 JP 2014559988 A JP2014559988 A JP 2014559988A JP 2014559988 A JP2014559988 A JP 2014559988A JP 6199322 B2 JP6199322 B2 JP 6199322B2
- Authority
- JP
- Japan
- Prior art keywords
- mems
- plate
- cavity
- chip
- radiation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims description 51
- 230000005855 radiation Effects 0.000 claims description 51
- 229910052751 metal Inorganic materials 0.000 claims description 44
- 239000002184 metal Substances 0.000 claims description 44
- 239000010410 layer Substances 0.000 claims description 38
- 239000011888 foil Substances 0.000 claims description 24
- 238000004519 manufacturing process Methods 0.000 claims description 19
- 239000000463 material Substances 0.000 claims description 19
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 17
- 239000000853 adhesive Substances 0.000 claims description 16
- 230000001070 adhesive effect Effects 0.000 claims description 16
- 239000012790 adhesive layer Substances 0.000 claims description 16
- 239000004065 semiconductor Substances 0.000 claims description 16
- 239000010949 copper Substances 0.000 claims description 15
- 229910052802 copper Inorganic materials 0.000 claims description 15
- 230000008569 process Effects 0.000 claims description 15
- MAKDTFFYCIMFQP-UHFFFAOYSA-N titanium tungsten Chemical compound [Ti].[W] MAKDTFFYCIMFQP-UHFFFAOYSA-N 0.000 claims description 12
- 229920002120 photoresistant polymer Polymers 0.000 claims description 5
- 230000002093 peripheral effect Effects 0.000 claims description 4
- 239000000126 substance Substances 0.000 claims description 4
- 238000003486 chemical etching Methods 0.000 claims description 3
- 230000005670 electromagnetic radiation Effects 0.000 claims description 3
- 229910000679 solder Inorganic materials 0.000 description 11
- 150000001875 compounds Chemical class 0.000 description 9
- 238000012545 processing Methods 0.000 description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 229910052710 silicon Inorganic materials 0.000 description 6
- 239000010703 silicon Substances 0.000 description 6
- 238000005530 etching Methods 0.000 description 5
- 239000011241 protective layer Substances 0.000 description 5
- 239000004593 Epoxy Substances 0.000 description 4
- 230000006870 function Effects 0.000 description 4
- 239000012528 membrane Substances 0.000 description 4
- 230000008901 benefit Effects 0.000 description 3
- 239000004020 conductor Substances 0.000 description 3
- 238000000151 deposition Methods 0.000 description 3
- 238000007747 plating Methods 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 229910001006 Constantan Inorganic materials 0.000 description 2
- 229910052787 antimony Inorganic materials 0.000 description 2
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 2
- 229910052797 bismuth Inorganic materials 0.000 description 2
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 description 2
- 238000009529 body temperature measurement Methods 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- 239000011889 copper foil Substances 0.000 description 2
- 239000011152 fibreglass Substances 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 238000000347 anisotropic wet etching Methods 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 238000000708 deep reactive-ion etching Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000005484 gravity Effects 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000012858 packaging process Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 238000006116 polymerization reaction Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000002310 reflectometry Methods 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Images
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00222—Integrating an electronic processing unit with a micromechanical structure
- B81C1/00246—Monolithic integration, i.e. micromechanical structure and electronic processing unit are integrated on the same substrate
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/0032—Packages or encapsulation
- B81B7/0067—Packages or encapsulation for controlling the passage of optical signals through the package
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
- G01J5/02—Constructional details
- G01J5/04—Casings
- G01J5/041—Mountings in enclosures or in a particular environment
- G01J5/045—Sealings; Vacuum enclosures; Encapsulated packages; Wafer bonding structures; Getter arrangements
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
- G01J5/10—Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors
- G01J5/12—Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors using thermoelectric elements, e.g. thermocouples
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2201/00—Specific applications of microelectromechanical systems
- B81B2201/02—Sensors
- B81B2201/0207—Bolometers
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00261—Processes for packaging MEMS devices
- B81C1/00269—Bonding of solid lids or wafers to the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/24221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/24245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
- H01L2224/82009—Pre-treatment of the connector or the bonding area
- H01L2224/8203—Reshaping, e.g. forming vias
- H01L2224/82035—Reshaping, e.g. forming vias by heating means
- H01L2224/82039—Reshaping, e.g. forming vias by heating means using a laser
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/921—Connecting a surface with connectors of different types
- H01L2224/9212—Sequential connecting processes
- H01L2224/92142—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92144—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/1026—Compound semiconductors
- H01L2924/1027—IV
- H01L2924/10271—Silicon-germanium [SiGe]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/1026—Compound semiconductors
- H01L2924/1032—III-V
- H01L2924/10329—Gallium arsenide [GaAs]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
- H01L2924/143—Digital devices
- H01L2924/1433—Application-specific integrated circuit [ASIC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
- H01L2924/143—Digital devices
- H01L2924/1434—Memory
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/146—Mixed devices
- H01L2924/1461—MEMS
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Manufacturing & Machinery (AREA)
- Micromachines (AREA)
- Radiation Pyrometers (AREA)
- Photometry And Measurement Of Optical Pulse Characteristics (AREA)
Description
Claims (16)
- 埋め込みマイクロエレクトロメカニカルシステム(MEMS)デバイスであって、
絶縁性ボードに埋め込まれる半導体チップであって、前記チップが、放射センサMEMS要素を含むキャビティを有し、前記チップ表面における前記キャビティの開口が、前記MEMS要素により感知される放射に透過性があるプレートにより覆われる、前記半導体チップ、
を含み、
前記キャビティから離れた前記プレート表面が、前記キャビティにおいて前記MEMS要素により感知される前記放射に晒されるべき露出した中央エリアと、前記プレート表面に接する金属フィルムと前記金属フィルム上にスタックされる接着剤の層とにより覆われる周辺エリアとを有する、MEMSデバイス。 - 請求項1に記載のMEMSデバイスであって、
前記周辺エリアの前記金属フィルム上の前記接着剤層に接する導電性フォイルを更に含む、MEMSデバイス。 - 請求項2に記載のMEMSデバイスであって、
前記MEMS要素により感知されるべき前記放射が、電磁放射、音響放射及び化学的放射を含む群から選択される、MEMSデバイス。 - 請求項3に記載のMEMSデバイスであって、
前記覆うプレートが、約15μmの厚みを有する硬化されたフォトレジスト材料でつくられる、MEMSデバイス。 - 請求項4に記載のMEMSデバイスであって、
前記金属フィルムが、前記覆うプレート上の約0.15μmの厚みのチタンタングステン層と、前記チタンタングステン層上の約0.20μmの厚みの銅層とを含む、MEMSデバイス。 - マイクロエレクトロメカニカルシステム(MEMS)デバイスを製造するための方法であって、
放射センサMEMS要素を含むキャビティを有する半導体チップを提供する工程であって、前記チップ表面における前記キャビティの開口が、前記MEMS要素により感知される放射に透過性があるプレートにより覆われる、前記半導体チップを提供する工程と、
前記キャビティから離れた前記プレート表面にわたって、パターニングされた金属フィルムを置く工程と、
を含む、方法。 - 請求項6に記載の方法であって、
前記覆うプレートが、約15μmの厚みを有する硬化されたフォトレジスト材料でつくられる、方法。 - 請求項7に記載の方法であって、
前記金属フィルムが、前記覆うプレート上の約0.15μmの厚みのチタンタングステン層と、前記チタンタングステン層上の約0.20μmの厚みの銅層とを含む、方法。 - 埋め込みマイクロエレクトロメカニカルシステム(MEMS)デバイスを製造するための方法であって、
プレートにより覆われるキャビティにおいて放射感知MEMS要素を有するチップを提供する工程であって、前記プレートが、前記キャビティから離れた前記プレート表面上にパターニングされた金属フィルムを有する、前記チップを提供する工程と、
接着剤の層により覆われるパターニングされた導電性フォイル上に前記金属フィルムと共に前記チップ表面を取り付ける工程と、
非取り付けチップボディを絶縁性ボードに埋め込む工程と、
前記覆うプレートから順次に、前記導電性フォイルの一部と、その後前記接着剤層の一部と、その後前記金属フィルムの一部とを取り除く工程であって、それにより、前記キャビティにおいて前記MEMS要素により感知されるべき放射に前記プレートを晒させる、前記取り除く工程と、
を含む、方法。 - 請求項9に記載の方法であって、
前記導電性フォイルの一部を取り除く前記工程が化学的エッチング技法を含む、方法。 - 請求項10に記載の方法であって、
前記接着剤層の一部を取り除く前記工程がレーザー技法を含む、方法。 - 請求項11に記載の方法であって、
前記金属フィルムの一部を取り除く前記工程が別の化学的エッチング技法を含む、方法。 - 請求項12に記載の方法であって、
前記チップ表面が、前記MEMSデバイスに接続されるチップ端子を更に含む、方法。 - 請求項13に記載の方法であって、
前記チップ端子を前記パターニングされた導電性フォイルに接続する工程を更に含む、方法。 - 請求項14に記載の方法であって、
前記覆うプレートが、約15μmの厚みを有する硬化されたフォトレジスト材料でつくられる、方法。 - 請求項15に記載の方法であって、
前記金属フィルムが、前記覆うプレート上の約0.15μmの厚みのチタンタングステン層と、前記チタンタングステン層上の約0.20μmの厚みの銅層とを含む、方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/405,513 US8866237B2 (en) | 2012-02-27 | 2012-02-27 | Methods for embedding controlled-cavity MEMS package in integration board |
US13/405,513 | 2012-02-27 | ||
PCT/US2013/027989 WO2013130582A1 (en) | 2012-02-27 | 2013-02-27 | Method for embedding controlled-cavity mems package in integration board |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2015517919A JP2015517919A (ja) | 2015-06-25 |
JP2015517919A5 JP2015517919A5 (ja) | 2016-03-24 |
JP6199322B2 true JP6199322B2 (ja) | 2017-09-20 |
Family
ID=49001917
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2014559988A Active JP6199322B2 (ja) | 2012-02-27 | 2013-02-27 | 制御されたキャビティmemsパッケージを集積化ボードに埋め込むための方法 |
Country Status (4)
Country | Link |
---|---|
US (2) | US8866237B2 (ja) |
JP (1) | JP6199322B2 (ja) |
CN (1) | CN104136365B (ja) |
WO (1) | WO2013130582A1 (ja) |
Families Citing this family (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102012208492A1 (de) * | 2012-05-22 | 2013-11-28 | Continental Teves Ag & Co. Ohg | Dehnmessstreifenanordnung |
US8809973B2 (en) * | 2013-01-23 | 2014-08-19 | Infineon Technologies Ag | Chip package comprising a microphone structure and a method of manufacturing the same |
KR101983142B1 (ko) * | 2013-06-28 | 2019-08-28 | 삼성전기주식회사 | 반도체 패키지 |
DE102014105754B4 (de) * | 2014-04-24 | 2022-02-10 | USound GmbH | Lautsprecheranordnung mit leiterplattenintegriertem ASIC |
US10142718B2 (en) | 2014-12-04 | 2018-11-27 | Invensense, Inc. | Integrated temperature sensor in microphone package |
CN105845635B (zh) * | 2015-01-16 | 2018-12-07 | 恒劲科技股份有限公司 | 电子封装结构 |
JP6398806B2 (ja) * | 2015-03-12 | 2018-10-03 | オムロン株式会社 | センサパッケージ |
US9663357B2 (en) * | 2015-07-15 | 2017-05-30 | Texas Instruments Incorporated | Open cavity package using chip-embedding technology |
KR20180082622A (ko) | 2015-12-08 | 2018-07-18 | 스카이워크스 솔루션즈, 인코포레이티드 | 캐리어 웨이퍼를 사용하여 웨이퍼-레벨 칩-스케일 패키지에서 보호 캐비티 및 집적 패시브 컴포넌트들을 제공하는 방법 |
DE102016124270A1 (de) * | 2016-12-13 | 2018-06-14 | Infineon Technologies Ag | Halbleiter-package und verfahren zum fertigen eines halbleiter-package |
EP3363983B1 (en) * | 2017-02-17 | 2021-10-27 | VKR Holding A/S | Vacuum insulated glazing unit |
US10370244B2 (en) * | 2017-11-30 | 2019-08-06 | Infineon Technologies Ag | Deposition of protective material at wafer level in front end for early stage particle and moisture protection |
DE102018216433A1 (de) * | 2018-09-26 | 2020-03-26 | Siemens Aktiengesellschaft | Verfahren zur Herstellung eines Elektronikmoduls und Elektronikmodul |
CN110010479B (zh) * | 2018-10-10 | 2021-04-06 | 浙江集迈科微电子有限公司 | 一种射频芯片的Fan-out封装工艺 |
DE102019201228B4 (de) * | 2019-01-31 | 2023-10-05 | Robert Bosch Gmbh | Verfahren zum Herstellen einer Mehrzahl von Sensoreinrichtungen und Sensoreinrichtung |
JP7284606B2 (ja) * | 2019-03-22 | 2023-05-31 | 新科實業有限公司 | Memsパッケージ、memsマイクロフォンおよびmemsパッケージの製造方法 |
CN111901731B (zh) * | 2019-05-06 | 2022-01-07 | 奥音科技(北京)有限公司 | 电动声学换能器及其制造方法 |
US11289396B2 (en) * | 2019-09-29 | 2022-03-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Sensing component encapsulated by an encapsulation layer with a roughness surface having a hollow region |
CN112073850B (zh) * | 2020-08-27 | 2021-12-24 | 瑞声新能源发展(常州)有限公司科教城分公司 | 扬声器箱 |
US20230014450A1 (en) * | 2021-07-16 | 2023-01-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package structure and method of forming the same |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4695719A (en) * | 1983-12-05 | 1987-09-22 | Honeywell Inc. | Apparatus and method for opto-electronic package |
JPH08204059A (ja) * | 1995-01-20 | 1996-08-09 | Kyocera Corp | 半導体素子収納用パッケージ |
US6384473B1 (en) * | 2000-05-16 | 2002-05-07 | Sandia Corporation | Microelectronic device package with an integral window |
DE10333840B4 (de) * | 2003-07-24 | 2006-12-28 | Infineon Technologies Ag | Halbleiterbauteil mit einem Kunststoffgehäuse, das eine Umverdrahrungsstruktur aufweist und Verfahren zu deren Herstellung |
JP3936365B2 (ja) * | 2004-09-14 | 2007-06-27 | ソニーケミカル&インフォメーションデバイス株式会社 | 機能素子実装モジュール及びその製造方法 |
JP2006317232A (ja) * | 2005-05-11 | 2006-11-24 | Matsushita Electric Works Ltd | 赤外線センサ |
US7504716B2 (en) | 2005-10-26 | 2009-03-17 | Texas Instruments Incorporated | Structure and method of molded QFN device suitable for miniaturization, multiple rows and stacking |
JP4270265B2 (ja) * | 2005-11-25 | 2009-05-27 | パナソニック電工株式会社 | 半導体レンズの製造方法 |
WO2007061137A1 (en) | 2005-11-25 | 2007-05-31 | Matsushita Electric Works, Ltd. | Infrared detection unit using a semiconductor optical lens |
US7655553B2 (en) * | 2006-01-11 | 2010-02-02 | Texas Instruments Incorporated | Microstructure sealing tool and methods of using the same |
US20080122061A1 (en) | 2006-11-29 | 2008-05-29 | Texas Instruments Incorporated | Semiconductor chip embedded in an insulator and having two-way heat extraction |
JP5016382B2 (ja) | 2007-05-24 | 2012-09-05 | パナソニック株式会社 | センサ装置およびその製造方法 |
KR100980115B1 (ko) | 2008-01-07 | 2010-09-07 | 서울대학교산학협력단 | 발광 다이오드 코팅 방법 |
US8309388B2 (en) | 2008-04-25 | 2012-11-13 | Texas Instruments Incorporated | MEMS package having formed metal lid |
US8690631B2 (en) | 2008-09-12 | 2014-04-08 | Texas Instruments Incorporated | Toy building block with embedded integrated circuit |
TWI508194B (zh) * | 2009-01-06 | 2015-11-11 | Xintec Inc | 電子元件封裝體及其製作方法 |
US7989249B2 (en) * | 2009-02-04 | 2011-08-02 | Northrop Grumman Systems Corporation | Method of manufacturing a micro-electrical-mechanical system with thermally isolated active elements |
US8338208B2 (en) | 2009-12-31 | 2012-12-25 | Texas Instruments Incorporated | Micro-electro-mechanical system having movable element integrated into leadframe-based package |
JP2011203221A (ja) | 2010-03-26 | 2011-10-13 | Panasonic Electric Works Co Ltd | 赤外線センサモジュール |
-
2012
- 2012-02-27 US US13/405,513 patent/US8866237B2/en active Active
-
2013
- 2013-02-27 WO PCT/US2013/027989 patent/WO2013130582A1/en active Application Filing
- 2013-02-27 JP JP2014559988A patent/JP6199322B2/ja active Active
- 2013-02-27 CN CN201380011132.8A patent/CN104136365B/zh active Active
-
2014
- 2014-09-19 US US14/490,924 patent/US9321631B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US9321631B2 (en) | 2016-04-26 |
CN104136365B (zh) | 2016-09-21 |
JP2015517919A (ja) | 2015-06-25 |
WO2013130582A1 (en) | 2013-09-06 |
US20150004739A1 (en) | 2015-01-01 |
US20130221455A1 (en) | 2013-08-29 |
CN104136365A (zh) | 2014-11-05 |
US8866237B2 (en) | 2014-10-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6199322B2 (ja) | 制御されたキャビティmemsパッケージを集積化ボードに埋め込むための方法 | |
US9663357B2 (en) | Open cavity package using chip-embedding technology | |
US11498831B2 (en) | Structures for packaging stress-sensitive micro-electro-mechanical system stacked onto electronic circuit chip | |
CN102640285B (zh) | 具有集成到基于引脚框的封装体的活动元件的微机电系统 | |
US7485956B2 (en) | Microelectronic package optionally having differing cover and device thermal expansivities | |
US9200973B2 (en) | Semiconductor package with air pressure sensor | |
US20100207217A1 (en) | Micro-Electro-Mechanical System Having Movable Element Integrated into Substrate-Based Package | |
US9487392B2 (en) | Method of packaging integrated circuits and a molded package | |
US9187310B2 (en) | Wafer-level packaging of a MEMS integrated device and related manufacturing process | |
TWI538113B (zh) | 微機電晶片封裝及其製造方法 | |
TWI651261B (zh) | 微機電裝置及製造方法 | |
US11146234B2 (en) | Electrical device and method for manufacturing the same | |
CN110627013A (zh) | 电气装置及其制造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20160202 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20160202 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20170131 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20170419 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20170616 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20170822 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20170823 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6199322 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313117 |
|
S533 | Written request for registration of change of name |
Free format text: JAPANESE INTERMEDIATE CODE: R313533 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |