JP6192065B2 - クロック・ドメイン間のデータ転送 - Google Patents

クロック・ドメイン間のデータ転送 Download PDF

Info

Publication number
JP6192065B2
JP6192065B2 JP2015519327A JP2015519327A JP6192065B2 JP 6192065 B2 JP6192065 B2 JP 6192065B2 JP 2015519327 A JP2015519327 A JP 2015519327A JP 2015519327 A JP2015519327 A JP 2015519327A JP 6192065 B2 JP6192065 B2 JP 6192065B2
Authority
JP
Japan
Prior art keywords
clock
clock domain
data signal
bus
domain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2015519327A
Other languages
English (en)
Japanese (ja)
Other versions
JP2015522188A5 (enExample
JP2015522188A (ja
Inventor
バッカ イェアルテ、マルクス
バッカ イェアルテ、マルクス
ベルントセン、フランク
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nordic Semiconductor ASA
Original Assignee
Nordic Semiconductor ASA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nordic Semiconductor ASA filed Critical Nordic Semiconductor ASA
Publication of JP2015522188A publication Critical patent/JP2015522188A/ja
Publication of JP2015522188A5 publication Critical patent/JP2015522188A5/ja
Application granted granted Critical
Publication of JP6192065B2 publication Critical patent/JP6192065B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/12—Synchronisation of different clock signals provided by a plurality of clock generators
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G06F13/405—Coupling between buses using bus bridges where the bridge performs a synchronising function
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2647—Arrangements specific to the receiver only
    • H04L27/2655—Synchronisation arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69—Spread spectrum techniques
    • H04B1/707—Spread spectrum techniques using direct sequence modulation
    • H04B1/7073—Synchronisation aspects
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69—Spread spectrum techniques
    • H04B1/713—Spread spectrum techniques using frequency hopping
    • H04B1/7156—Arrangements for sequence synchronisation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • Information Transfer Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Manipulation Of Pulses (AREA)
JP2015519327A 2012-06-27 2013-06-20 クロック・ドメイン間のデータ転送 Expired - Fee Related JP6192065B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GB1211425.2A GB2503473A (en) 2012-06-27 2012-06-27 Data transfer from lower frequency clock domain to higher frequency clock domain
GB1211425.2 2012-06-27
PCT/GB2013/051608 WO2014001765A1 (en) 2012-06-27 2013-06-20 Data transfer between clock domains

Publications (3)

Publication Number Publication Date
JP2015522188A JP2015522188A (ja) 2015-08-03
JP2015522188A5 JP2015522188A5 (enExample) 2016-08-12
JP6192065B2 true JP6192065B2 (ja) 2017-09-06

Family

ID=46704315

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015519327A Expired - Fee Related JP6192065B2 (ja) 2012-06-27 2013-06-20 クロック・ドメイン間のデータ転送

Country Status (8)

Country Link
US (1) US9515812B2 (enExample)
EP (1) EP2847664B1 (enExample)
JP (1) JP6192065B2 (enExample)
KR (1) KR20150037900A (enExample)
CN (1) CN104412222B (enExample)
GB (1) GB2503473A (enExample)
TW (1) TWI604689B (enExample)
WO (1) WO2014001765A1 (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2528481B (en) 2014-07-23 2016-08-17 Ibm Updating of shadow registers in N:1 clock domain
GB201907717D0 (en) * 2019-05-31 2019-07-17 Nordic Semiconductor Asa Apparatus and methods for dc-offset estimation
TWI740564B (zh) * 2020-07-03 2021-09-21 鴻海精密工業股份有限公司 跨時鐘域信號傳輸方法、電路以及電子裝置
GB202014083D0 (en) * 2020-09-08 2020-10-21 Nordic Semiconductor Asa Clock domain crossing
CN114461009B (zh) * 2022-01-07 2024-04-26 山东云海国创云计算装备产业创新中心有限公司 一种应用于fpga单比特信号自动识别时钟域转换的方法

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5150313A (en) 1990-04-12 1992-09-22 Regents Of The University Of California Parallel pulse processing and data acquisition for high speed, low error flow cytometry
US6112307A (en) * 1993-12-30 2000-08-29 Intel Corporation Method and apparatus for translating signals between clock domains of different frequencies
US6260152B1 (en) 1998-07-30 2001-07-10 Siemens Information And Communication Networks, Inc. Method and apparatus for synchronizing data transfers in a logic circuit having plural clock domains
US6359479B1 (en) * 1998-08-04 2002-03-19 Juniper Networks, Inc. Synchronizing data transfers between two distinct clock domains
DE10128396B4 (de) * 2001-06-12 2005-02-24 Infineon Technologies Ag Verfahren und Schaltungsanordnung zum Übertragen von Daten von ein mit einem ersten Takt betriebenes System an ein mit einem zweiten Takt betriebenes System
US6928574B1 (en) * 2001-08-23 2005-08-09 Hewlett-Packard Development Company, L.P. System and method for transferring data from a lower frequency clock domain to a higher frequency clock domain
US7085952B2 (en) * 2001-09-14 2006-08-01 Medtronic, Inc. Method and apparatus for writing data between fast and slow clock domains
JP4122204B2 (ja) * 2002-09-27 2008-07-23 松下電器産業株式会社 同期回路
US20040193931A1 (en) * 2003-03-26 2004-09-30 Akkerman Ryan L. System and method for transferring data from a first clock domain to a second clock domain
CN101199156A (zh) * 2005-06-13 2008-06-11 皇家飞利浦电子股份有限公司 利用时钟域进行数据传输的方法和接收机
KR101086426B1 (ko) 2007-01-23 2011-11-23 삼성전자주식회사 Ｉ２ｃ 컨트롤러에서 직렬 데이터 라인의 상태 변화의타이밍 제어 장치 및 그 제어 방법
US7809972B2 (en) * 2007-03-30 2010-10-05 Arm Limited Data processing apparatus and method for translating a signal between a first clock domain and a second clock domain
US8024597B2 (en) * 2008-02-21 2011-09-20 International Business Machines Corporation Signal phase verification for systems incorporating two synchronous clock domains
US7733130B2 (en) * 2008-03-06 2010-06-08 Oracle America, Inc. Skew tolerant communication between ratioed synchronous clocks
US8089378B1 (en) * 2009-02-18 2012-01-03 Marvell Israel (M.I.S.L) Ltd. Synchronous multi-clock protocol converter
JP5483172B2 (ja) * 2009-10-19 2014-05-07 横河電機株式会社 データ転送装置およびデータ転送方法

Also Published As

Publication number Publication date
CN104412222B (zh) 2018-06-05
EP2847664B1 (en) 2018-04-18
US20150139373A1 (en) 2015-05-21
GB201211425D0 (en) 2012-08-08
EP2847664A1 (en) 2015-03-18
US9515812B2 (en) 2016-12-06
TW201401763A (zh) 2014-01-01
GB2503473A (en) 2014-01-01
CN104412222A (zh) 2015-03-11
KR20150037900A (ko) 2015-04-08
JP2015522188A (ja) 2015-08-03
TWI604689B (zh) 2017-11-01
WO2014001765A1 (en) 2014-01-03

Similar Documents

Publication Publication Date Title
JP6192065B2 (ja) クロック・ドメイン間のデータ転送
EP1423789A2 (en) Data processing system having an on-chip background debug system and method therefor
US7639764B2 (en) Method and apparatus for synchronizing data between different clock domains in a memory controller
US8010818B2 (en) Power efficient method for controlling an oscillator in a low power synchronous system with an asynchronous I2C bus
JP6200503B2 (ja) 遅延ロック・ループを使用するメモリ・デバイスのための省電力の装置及び方法
JP6272847B2 (ja) クロック・ドメイン間のデータ転送
TWI585570B (zh) 時脈域間之資料轉移
US8630382B2 (en) Asynchronous data recovery methods and apparatus
WO2018226505A1 (en) Error correction calculation upon serial bus abort
JP2002269036A (ja) 非同期転送装置および非同期転送方法
JPH02163864A (ja) データ転送制御方法および装置

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20160620

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20160620

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20170303

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20170321

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20170621

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20170704

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20170802

R150 Certificate of patent or registration of utility model

Ref document number: 6192065

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees