JP6186380B2 - 半導体層に対するオーミックコンタクトを含むデバイスヘテロ構造を形成することを含む方法および半導体層に対するオーミックコンタクトを含むデバイスヘテロ構造を含むデバイス - Google Patents

半導体層に対するオーミックコンタクトを含むデバイスヘテロ構造を形成することを含む方法および半導体層に対するオーミックコンタクトを含むデバイスヘテロ構造を含むデバイス Download PDF

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JP6186380B2
JP6186380B2 JP2014558905A JP2014558905A JP6186380B2 JP 6186380 B2 JP6186380 B2 JP 6186380B2 JP 2014558905 A JP2014558905 A JP 2014558905A JP 2014558905 A JP2014558905 A JP 2014558905A JP 6186380 B2 JP6186380 B2 JP 6186380B2
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semiconductor layers
semiconductor layer
forming
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highly conductive
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JP2015513798A5 (enExample
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ギャスカ，レミギウス
シュール，マイケル
ヤン，ジンウェイ
ドブリンスキ，アレクサンダー
シャタロフ，マキシム，エス．
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センサー エレクトロニック テクノロジー インコーポレイテッド
センサー エレクトロニック テクノロジー インコーポレイテッド
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JP2014558905A 2012-02-23 2013-02-22 半導体層に対するオーミックコンタクトを含むデバイスヘテロ構造を形成することを含む方法および半導体層に対するオーミックコンタクトを含むデバイスヘテロ構造を含むデバイス Active JP6186380B2 (ja)

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US201261602155P 2012-02-23 2012-02-23
US61/602,155 2012-02-23
PCT/US2013/027496 WO2013126828A1 (en) 2012-02-23 2013-02-22 Ohmic contact to semiconductor

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JP2015513798A5 JP2015513798A5 (enExample) 2016-04-07
JP6186380B2 true JP6186380B2 (ja) 2017-08-23

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US20130221406A1 (en) 2013-08-29
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EP2817834A4 (en) 2015-10-21
EP2817834A1 (en) 2014-12-31
KR20140138204A (ko) 2014-12-03
JP2015513798A (ja) 2015-05-14
KR102130488B1 (ko) 2020-07-07
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US20160104784A1 (en) 2016-04-14
KR102288118B1 (ko) 2021-08-11
US9543400B2 (en) 2017-01-10

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