JP6165518B2 - プラズマ処理方法および真空処理装置 - Google Patents

プラズマ処理方法および真空処理装置 Download PDF

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Publication number
JP6165518B2
JP6165518B2 JP2013132210A JP2013132210A JP6165518B2 JP 6165518 B2 JP6165518 B2 JP 6165518B2 JP 2013132210 A JP2013132210 A JP 2013132210A JP 2013132210 A JP2013132210 A JP 2013132210A JP 6165518 B2 JP6165518 B2 JP 6165518B2
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Japan
Prior art keywords
plasma
gas
sample
chamber
processing
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JP2013132210A
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English (en)
Japanese (ja)
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JP2015008183A5 (enExample
JP2015008183A (ja
Inventor
一海 田中
一海 田中
角屋 誠浩
誠浩 角屋
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Hitachi High Tech Corp
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Hitachi High Technologies Corp
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Publication date
Application filed by Hitachi High Technologies Corp filed Critical Hitachi High Technologies Corp
Priority to JP2013132210A priority Critical patent/JP6165518B2/ja
Priority to TW102148437A priority patent/TWI532098B/zh
Priority to TW105103764A priority patent/TWI612580B/zh
Priority to KR1020140013251A priority patent/KR101572592B1/ko
Priority to US14/180,552 priority patent/US20140377958A1/en
Publication of JP2015008183A publication Critical patent/JP2015008183A/ja
Publication of JP2015008183A5 publication Critical patent/JP2015008183A5/ja
Application granted granted Critical
Publication of JP6165518B2 publication Critical patent/JP6165518B2/ja
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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041Cleaning
    • H01L21/02057Cleaning during device manufacture
    • H01L21/02068Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
    • H01L21/02071Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers the processing being a delineation, e.g. RIE, of conductive layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67155Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67207Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H01L21/76825Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by exposing the layer to particle radiation, e.g. ion implantation, irradiation with UV light or electrons etc.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Drying Of Semiconductors (AREA)
JP2013132210A 2013-06-25 2013-06-25 プラズマ処理方法および真空処理装置 Active JP6165518B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2013132210A JP6165518B2 (ja) 2013-06-25 2013-06-25 プラズマ処理方法および真空処理装置
TW102148437A TWI532098B (zh) 2013-06-25 2013-12-26 A plasma processing method and a vacuum processing apparatus
TW105103764A TWI612580B (zh) 2013-06-25 2013-12-26 電漿處理方法
KR1020140013251A KR101572592B1 (ko) 2013-06-25 2014-02-05 플라즈마 처리 방법 및 진공 처리 장치
US14/180,552 US20140377958A1 (en) 2013-06-25 2014-02-14 Plasma processing method and vacuum processing apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2013132210A JP6165518B2 (ja) 2013-06-25 2013-06-25 プラズマ処理方法および真空処理装置

Publications (3)

Publication Number Publication Date
JP2015008183A JP2015008183A (ja) 2015-01-15
JP2015008183A5 JP2015008183A5 (enExample) 2016-02-12
JP6165518B2 true JP6165518B2 (ja) 2017-07-19

Family

ID=52111268

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2013132210A Active JP6165518B2 (ja) 2013-06-25 2013-06-25 プラズマ処理方法および真空処理装置

Country Status (4)

Country Link
US (1) US20140377958A1 (enExample)
JP (1) JP6165518B2 (enExample)
KR (1) KR101572592B1 (enExample)
TW (2) TWI612580B (enExample)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014133465A1 (en) * 2013-02-28 2014-09-04 Nanyang Technological University A capacitively coupled electrodeless plasma apparatus and a method using capacitively coupled electrodeless plasma for processing a silicon substrate

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05129238A (ja) * 1991-10-31 1993-05-25 Fujitsu Ltd 半導体製造装置
EP0692141B1 (en) * 1994-02-03 2002-12-04 Applied Materials, Inc. Stripping, passivation and corrosion inhibition of semiconductor substrates
JPH11330046A (ja) * 1998-05-08 1999-11-30 Mitsubishi Electric Corp 半導体装置の製造方法及び半導体装置
EP1297566A2 (en) * 2000-06-14 2003-04-02 Applied Materials, Inc. Substrate cleaning apparatus and method
KR100382725B1 (ko) * 2000-11-24 2003-05-09 삼성전자주식회사 클러스터화된 플라즈마 장치에서의 반도체소자의 제조방법
US7374696B2 (en) * 2003-02-14 2008-05-20 Applied Materials, Inc. Method and apparatus for removing a halogen-containing residue
JP2006270030A (ja) 2005-02-28 2006-10-05 Tokyo Electron Ltd プラズマ処理方法、および後処理方法
JP4884268B2 (ja) * 2007-03-22 2012-02-29 東京エレクトロン株式会社 アッシング方法
JP2010056574A (ja) * 2009-12-07 2010-03-11 Nec Electronics Corp 半導体装置の製造方法
US8562742B2 (en) * 2010-04-30 2013-10-22 Applied Materials, Inc. Apparatus for radial delivery of gas to a chamber and methods of use thereof
US20110304078A1 (en) * 2010-06-14 2011-12-15 Applied Materials, Inc. Methods for removing byproducts from load lock chambers
US10453694B2 (en) * 2011-03-01 2019-10-22 Applied Materials, Inc. Abatement and strip process chamber in a dual loadlock configuration
WO2014150260A1 (en) * 2013-03-15 2014-09-25 Applied Materials, Inc Process load lock apparatus, lift assemblies, electronic device processing systems, and methods of processing substrates in load lock locations
US9524889B2 (en) * 2013-03-15 2016-12-20 Applied Materials, Inc. Processing systems and apparatus adapted to process substrates in electronic device manufacturing
US20150064880A1 (en) * 2013-08-30 2015-03-05 Applied Materials, Inc. Post etch treatment technology for enhancing plasma-etched silicon surface stability in ambient

Also Published As

Publication number Publication date
TWI612580B (zh) 2018-01-21
KR20150000814A (ko) 2015-01-05
KR101572592B1 (ko) 2015-11-27
US20140377958A1 (en) 2014-12-25
TW201618183A (zh) 2016-05-16
JP2015008183A (ja) 2015-01-15
TWI532098B (zh) 2016-05-01
TW201501197A (zh) 2015-01-01

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