JP6117746B2 - エッチング特性推定方法、プログラム、情報処理装置、加工装置、設計方法、および、製造方法 - Google Patents
エッチング特性推定方法、プログラム、情報処理装置、加工装置、設計方法、および、製造方法 Download PDFInfo
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- JP6117746B2 JP6117746B2 JP2014154811A JP2014154811A JP6117746B2 JP 6117746 B2 JP6117746 B2 JP 6117746B2 JP 2014154811 A JP2014154811 A JP 2014154811A JP 2014154811 A JP2014154811 A JP 2014154811A JP 6117746 B2 JP6117746 B2 JP 6117746B2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67063—Apparatus for fluid treatment for etching
- H01L21/67069—Apparatus for fluid treatment for etching for drying etching
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
- G03F1/36—Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B13/00—Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion
- G05B13/02—Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric
- G05B13/04—Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric involving the use of models or simulators
- G05B13/041—Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric involving the use of models or simulators in which a variable is automatically adjusted to optimise the performance
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/36—Circuit design at the analogue level
- G06F30/367—Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/398—Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Theoretical Computer Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Power Engineering (AREA)
- Evolutionary Computation (AREA)
- Inorganic Chemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Engineering & Computer Science (AREA)
- Geometry (AREA)
- Medical Informatics (AREA)
- Software Systems (AREA)
- Automation & Control Theory (AREA)
- Computer Vision & Pattern Recognition (AREA)
- Artificial Intelligence (AREA)
- Health & Medical Sciences (AREA)
- Drying Of Semiconductors (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2014154811A JP6117746B2 (ja) | 2014-07-30 | 2014-07-30 | エッチング特性推定方法、プログラム、情報処理装置、加工装置、設計方法、および、製造方法 |
| US15/327,731 US10403516B2 (en) | 2014-07-30 | 2015-06-15 | Etching characteristic estimation method, program, information processing apparatus, processing apparatus, designing method, and production method |
| PCT/JP2015/067141 WO2016017303A1 (ja) | 2014-07-30 | 2015-06-15 | エッチング特性推定方法、プログラム、情報処理装置、加工装置、設計方法、および、製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2014154811A JP6117746B2 (ja) | 2014-07-30 | 2014-07-30 | エッチング特性推定方法、プログラム、情報処理装置、加工装置、設計方法、および、製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2016032064A JP2016032064A (ja) | 2016-03-07 |
| JP2016032064A5 JP2016032064A5 (enExample) | 2016-04-14 |
| JP6117746B2 true JP6117746B2 (ja) | 2017-04-19 |
Family
ID=55217208
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2014154811A Active JP6117746B2 (ja) | 2014-07-30 | 2014-07-30 | エッチング特性推定方法、プログラム、情報処理装置、加工装置、設計方法、および、製造方法 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US10403516B2 (enExample) |
| JP (1) | JP6117746B2 (enExample) |
| WO (1) | WO2016017303A1 (enExample) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP7166966B2 (ja) | 2019-03-15 | 2022-11-08 | 株式会社Screenホールディングス | 処理条件選択方法、基板処理方法、基板製品製造方法、処理条件選択装置、コンピュータープログラム、および、記憶媒体 |
| TW202509802A (zh) * | 2023-03-30 | 2025-03-01 | 日商東京威力科創股份有限公司 | 電腦程式、資訊處理方法及資訊處理裝置 |
| CN119148540B (zh) * | 2024-11-15 | 2025-03-07 | 深圳市荣强科技有限公司 | 基于多层次因素的表面活性剂工艺参数分析方法及系统 |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008053507A (ja) * | 2006-08-25 | 2008-03-06 | Matsushita Electric Ind Co Ltd | ドライエッチング方法 |
| US9620338B2 (en) * | 2010-03-16 | 2017-04-11 | Mizuho Information & Research Institute, Inc. | System, method, and program for predicting processing shape by plasma process |
| JP5732843B2 (ja) | 2010-12-21 | 2015-06-10 | ソニー株式会社 | シミュレータ、加工装置、ダメージ評価方法、及び、ダメージ評価プログラム |
| JP5685762B2 (ja) * | 2011-03-07 | 2015-03-18 | みずほ情報総研株式会社 | プラズマ加工形状シミュレーション装置及びプログラム |
| JP6065612B2 (ja) * | 2012-06-28 | 2017-01-25 | ソニー株式会社 | シミュレーション方法、シミュレーションプログラム、加工装置およびシミュレータ |
-
2014
- 2014-07-30 JP JP2014154811A patent/JP6117746B2/ja active Active
-
2015
- 2015-06-15 US US15/327,731 patent/US10403516B2/en active Active
- 2015-06-15 WO PCT/JP2015/067141 patent/WO2016017303A1/ja not_active Ceased
Also Published As
| Publication number | Publication date |
|---|---|
| JP2016032064A (ja) | 2016-03-07 |
| US10403516B2 (en) | 2019-09-03 |
| US20170207107A1 (en) | 2017-07-20 |
| WO2016017303A1 (ja) | 2016-02-04 |
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