JP6071613B2 - 半導体基板、半導体装置、撮像素子、および撮像装置 - Google Patents

半導体基板、半導体装置、撮像素子、および撮像装置 Download PDF

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Publication number
JP6071613B2
JP6071613B2 JP2013027057A JP2013027057A JP6071613B2 JP 6071613 B2 JP6071613 B2 JP 6071613B2 JP 2013027057 A JP2013027057 A JP 2013027057A JP 2013027057 A JP2013027057 A JP 2013027057A JP 6071613 B2 JP6071613 B2 JP 6071613B2
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Japan
Prior art keywords
metal
substrate
semiconductor substrate
bonding
electrode
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Expired - Fee Related
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JP2013027057A
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English (en)
Japanese (ja)
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JP2014157884A5 (https=
JP2014157884A (ja
Inventor
晴久 齊藤
晴久 齊藤
芳隆 只木
芳隆 只木
千裕 右田
千裕 右田
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Olympus Corp
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Olympus Corp
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Application filed by Olympus Corp filed Critical Olympus Corp
Priority to JP2013027057A priority Critical patent/JP6071613B2/ja
Priority to EP14751278.4A priority patent/EP2958136A4/en
Priority to PCT/JP2014/050655 priority patent/WO2014125861A2/ja
Priority to CN201480008493.1A priority patent/CN105074893A/zh
Publication of JP2014157884A publication Critical patent/JP2014157884A/ja
Publication of JP2014157884A5 publication Critical patent/JP2014157884A5/ja
Priority to US14/823,482 priority patent/US20150357300A1/en
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Publication of JP6071613B2 publication Critical patent/JP6071613B2/ja
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    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/811—Interconnections
    • H—ELECTRICITY
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01215—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps forming coatings
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    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01231—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using blanket deposition
    • H10W72/01233—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using blanket deposition in liquid form, e.g. spin coating, spray coating or immersion coating
    • H10W72/01235—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using blanket deposition in liquid form, e.g. spin coating, spray coating or immersion coating by plating, e.g. electroless plating or electroplating
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    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01231—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using blanket deposition
    • H10W72/01238—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using blanket deposition in gaseous form, e.g. by CVD or PVD
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    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01251—Changing the shapes of bumps
    • H10W72/01255—Changing the shapes of bumps by using masks
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01251—Changing the shapes of bumps
    • H10W72/01257—Changing the shapes of bumps by reflowing
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    • H10W72/00—Interconnections or connectors in packages
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H10W72/01931—Manufacture or treatment of bond pads using blanket deposition
    • H10W72/01933—Manufacture or treatment of bond pads using blanket deposition in liquid form, e.g. spin coating, spray coating or immersion coating
    • H10W72/01935—Manufacture or treatment of bond pads using blanket deposition in liquid form, e.g. spin coating, spray coating or immersion coating by plating, e.g. electroless plating or electroplating
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    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07232—Compression bonding, e.g. thermocompression bonding
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    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H10W72/07253—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting changes in shapes
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    • H10W72/00—Interconnections or connectors in packages
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    • H10W72/221—Structures or relative sizes
    • H10W72/222—Multilayered bumps, e.g. a coating on top and side surfaces of a bump core
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    • H10W72/221—Structures or relative sizes
    • H10W72/222—Multilayered bumps, e.g. a coating on top and side surfaces of a bump core
    • H10W72/223—Multilayered bumps, e.g. a coating on top and side surfaces of a bump core characterised by the structure of the outermost layers, e.g. multilayered coatings
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    • H10W72/231—Shapes
    • H10W72/232—Plan-view shape, i.e. in top view
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    • H10W72/00—Interconnections or connectors in packages
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    • H10W72/231—Shapes
    • H10W72/234—Cross-sectional shape, i.e. in side view
    • H—ELECTRICITY
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    • H10W72/00—Interconnections or connectors in packages
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    • H10W72/231—Shapes
    • H10W72/235—Shapes of outermost layers of multilayered bumps, e.g. bump coating not being conformal on a bump core
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H10W72/245—Dispositions, e.g. layouts of outermost layers of multilayered bumps, e.g. bump coating being only on a part of a bump core
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/255—Materials of outermost layers of multilayered bumps, e.g. material of a coating
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    • H10W72/00—Interconnections or connectors in packages
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    • H10W72/261—Functions other than electrical connecting
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    • H10W72/921—Structures or relative sizes of bond pads
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    • H10W72/00—Interconnections or connectors in packages
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    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/923—Bond pads having multiple stacked layers
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    • H10W72/941—Dispositions of bond pads
    • H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
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    • H10W74/00—Encapsulations, e.g. protective coatings
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    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
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    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
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    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL

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JP2013027057A 2013-02-14 2013-02-14 半導体基板、半導体装置、撮像素子、および撮像装置 Expired - Fee Related JP6071613B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2013027057A JP6071613B2 (ja) 2013-02-14 2013-02-14 半導体基板、半導体装置、撮像素子、および撮像装置
EP14751278.4A EP2958136A4 (en) 2013-02-14 2014-01-16 SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR ASSEMBLY, IMAGE RECORDING AND IMAGING DEVICE
PCT/JP2014/050655 WO2014125861A2 (ja) 2013-02-14 2014-01-16 半導体基板、半導体装置、撮像素子、および撮像装置
CN201480008493.1A CN105074893A (zh) 2013-02-14 2014-01-16 半导体基板、半导体装置、摄像元件及摄像装置
US14/823,482 US20150357300A1 (en) 2013-02-14 2015-08-11 Semiconductor substrate, semiconductor device, imaging element, and imaging device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2013027057A JP6071613B2 (ja) 2013-02-14 2013-02-14 半導体基板、半導体装置、撮像素子、および撮像装置

Publications (3)

Publication Number Publication Date
JP2014157884A JP2014157884A (ja) 2014-08-28
JP2014157884A5 JP2014157884A5 (https=) 2014-10-09
JP6071613B2 true JP6071613B2 (ja) 2017-02-01

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ID=51354643

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JP2013027057A Expired - Fee Related JP6071613B2 (ja) 2013-02-14 2013-02-14 半導体基板、半導体装置、撮像素子、および撮像装置

Country Status (5)

Country Link
US (1) US20150357300A1 (https=)
EP (1) EP2958136A4 (https=)
JP (1) JP6071613B2 (https=)
CN (1) CN105074893A (https=)
WO (1) WO2014125861A2 (https=)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016174733A1 (ja) * 2015-04-28 2016-11-03 オリンパス株式会社 半導体装置
KR20170098462A (ko) * 2016-02-22 2017-08-30 삼성전기주식회사 패키지 및 그의 제조방법
EP3455864B1 (en) 2016-05-26 2024-10-23 The Trustees Of The University Of Pennsylvania Laminated magnetic cores
WO2018193531A1 (ja) * 2017-04-19 2018-10-25 オリンパス株式会社 内視鏡、撮像モジュール、および撮像モジュールの製造方法
US12334239B2 (en) 2018-10-26 2025-06-17 The Trustees Of The University Of Pennsylvania Patterned magnetic cores
JP2022125445A (ja) * 2021-02-17 2022-08-29 三菱電機株式会社 半導体装置及びその製造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62206857A (ja) * 1986-03-07 1987-09-11 Oki Electric Ind Co Ltd 突起状電極の形成方法
JPH07201864A (ja) * 1993-12-28 1995-08-04 Fujitsu Ltd 突起電極形成方法
AU4237696A (en) * 1994-11-15 1996-06-06 Formfactor, Inc. Mounting spring elements on semiconductor devices, and wafer-level testing methodology
JP2000138249A (ja) * 1998-10-29 2000-05-16 Matsushita Electric Ind Co Ltd 突起電極形成方法及び実装方法
JP2007258518A (ja) 2006-03-24 2007-10-04 Epson Imaging Devices Corp 半導体装置、電気光学装置及び電子機器
JP5282380B2 (ja) * 2007-08-06 2013-09-04 富士通株式会社 半導体装置およびその製造方法
CN102224579B (zh) * 2008-11-25 2013-12-04 松下电器产业株式会社 半导体装置及电子设备

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WO2014125861A2 (ja) 2014-08-21
JP2014157884A (ja) 2014-08-28
US20150357300A1 (en) 2015-12-10
EP2958136A4 (en) 2016-09-07
CN105074893A (zh) 2015-11-18
EP2958136A2 (en) 2015-12-23

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