JP6064614B2 - 炭化珪素半導体装置およびその製造方法 - Google Patents

炭化珪素半導体装置およびその製造方法 Download PDF

Info

Publication number
JP6064614B2
JP6064614B2 JP2013008104A JP2013008104A JP6064614B2 JP 6064614 B2 JP6064614 B2 JP 6064614B2 JP 2013008104 A JP2013008104 A JP 2013008104A JP 2013008104 A JP2013008104 A JP 2013008104A JP 6064614 B2 JP6064614 B2 JP 6064614B2
Authority
JP
Japan
Prior art keywords
region
silicon carbide
range
semiconductor device
main surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2013008104A
Other languages
English (en)
Japanese (ja)
Other versions
JP2014139967A5 (enExample
JP2014139967A (ja
Inventor
和田　圭司
圭司 和田
増田　健良
健良 増田
透 日吉
透 日吉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP2013008104A priority Critical patent/JP6064614B2/ja
Priority to CN201380067281.6A priority patent/CN104885226A/zh
Priority to DE112013006470.7T priority patent/DE112013006470T5/de
Priority to US14/651,985 priority patent/US9276106B2/en
Priority to PCT/JP2013/082560 priority patent/WO2014112233A1/ja
Publication of JP2014139967A publication Critical patent/JP2014139967A/ja
Publication of JP2014139967A5 publication Critical patent/JP2014139967A5/ja
Application granted granted Critical
Publication of JP6064614B2 publication Critical patent/JP6064614B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H10D30/665—Vertical DMOS [VDMOS] FETs having edge termination structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01—Manufacture or treatment
    • H10D12/031—Manufacture or treatment of IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01—Manufacture or treatment
    • H10D12/031—Manufacture or treatment of IGBTs
    • H10D12/032—Manufacture or treatment of IGBTs of vertical IGBTs
    • H10D12/038—Manufacture or treatment of IGBTs of vertical IGBTs having a recessed gate, e.g. trench-gate IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411—Insulated-gate bipolar transistors [IGBT]
    • H10D12/441—Vertical IGBTs
    • H10D12/461—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions
    • H10D12/481—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
    • H10D30/0297—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs using recessing of the gate electrodes, e.g. to form trench gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H10D30/668—Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/01—Manufacture or treatment
    • H10D62/051—Forming charge compensation regions, e.g. superjunctions
    • H10D62/054—Forming charge compensation regions, e.g. superjunctions by high energy implantations in bulk semiconductor bodies, e.g. forming pillars
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/109—Reduced surface field [RESURF] PN junction structures
    • H10D62/111—Multiple RESURF structures, e.g. double RESURF or 3D-RESURF structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/40—Crystalline structures
    • H10D62/405—Orientations of crystalline planes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325—Silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/512—Disposition of the gate electrodes, e.g. buried gates
    • H10D64/513—Disposition of the gate electrodes, e.g. buried gates within recesses in the substrate, e.g. trench gates, groove gates or buried gates

Landscapes

  • Electrodes Of Semiconductors (AREA)
JP2013008104A 2013-01-21 2013-01-21 炭化珪素半導体装置およびその製造方法 Active JP6064614B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2013008104A JP6064614B2 (ja) 2013-01-21 2013-01-21 炭化珪素半導体装置およびその製造方法
CN201380067281.6A CN104885226A (zh) 2013-01-21 2013-12-04 碳化硅半导体器件及其制造方法
DE112013006470.7T DE112013006470T5 (de) 2013-01-21 2013-12-04 Siliziumkarbid-Halbleitervorrichtung und Verfahren zur Herstellung selbiger
US14/651,985 US9276106B2 (en) 2013-01-21 2013-12-04 Silicon carbide semiconductor device and method for manufacturing same
PCT/JP2013/082560 WO2014112233A1 (ja) 2013-01-21 2013-12-04 炭化珪素半導体装置およびその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2013008104A JP6064614B2 (ja) 2013-01-21 2013-01-21 炭化珪素半導体装置およびその製造方法

Publications (3)

Publication Number Publication Date
JP2014139967A JP2014139967A (ja) 2014-07-31
JP2014139967A5 JP2014139967A5 (enExample) 2016-03-10
JP6064614B2 true JP6064614B2 (ja) 2017-01-25

Family

ID=51209343

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2013008104A Active JP6064614B2 (ja) 2013-01-21 2013-01-21 炭化珪素半導体装置およびその製造方法

Country Status (5)

Country Link
US (1) US9276106B2 (enExample)
JP (1) JP6064614B2 (enExample)
CN (1) CN104885226A (enExample)
DE (1) DE112013006470T5 (enExample)
WO (1) WO2014112233A1 (enExample)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6728953B2 (ja) * 2015-07-16 2020-07-22 富士電機株式会社 半導体装置及びその製造方法
DE102016113129B3 (de) 2016-07-15 2017-11-09 Infineon Technologies Ag Halbleitervorrichtung, die eine Superjunction-Struktur in einem SiC-Halbleiterkörper enthält
US10861931B2 (en) 2016-12-08 2020-12-08 Cree, Inc. Power semiconductor devices having gate trenches and buried edge terminations and related methods
WO2019008884A1 (ja) 2017-07-04 2019-01-10 住友電気工業株式会社 炭化珪素半導体装置
KR102238755B1 (ko) * 2017-07-07 2021-04-12 한국전자통신연구원 전력 반도체 소자의 제조 방법
JP7039937B2 (ja) * 2017-11-07 2022-03-23 富士電機株式会社 半導体装置
WO2020012812A1 (ja) 2018-07-11 2020-01-16 住友電気工業株式会社 炭化珪素半導体装置
JP6648331B1 (ja) 2019-06-07 2020-02-14 新電元工業株式会社 半導体装置及び半導体装置の製造方法
US11450734B2 (en) 2019-06-17 2022-09-20 Fuji Electric Co., Ltd. Semiconductor device and fabrication method for semiconductor device
JP7107284B2 (ja) * 2019-07-08 2022-07-27 株式会社デンソー 半導体装置とその製造方法
CN115088080B (zh) * 2019-12-03 2025-09-05 株式会社电装 半导体装置
CN113140612B (zh) * 2020-01-17 2025-03-14 珠海零边界集成电路有限公司 一种碳化硅功率器件终端结构及其制备方法
JP2022139144A (ja) * 2021-03-11 2022-09-26 株式会社デンソー 半導体装置
JP7593225B2 (ja) * 2021-05-14 2024-12-03 株式会社デンソー 炭化珪素半導体装置
TWI806414B (zh) 2022-02-09 2023-06-21 鴻海精密工業股份有限公司 功率半導體元件
CN114464668A (zh) * 2022-02-09 2022-05-10 鸿海精密工业股份有限公司 功率半导体元件

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3158973B2 (ja) * 1995-07-20 2001-04-23 富士電機株式会社 炭化けい素縦型ｆｅｔ
US6037632A (en) 1995-11-06 2000-03-14 Kabushiki Kaisha Toshiba Semiconductor device
JP3392665B2 (ja) * 1995-11-06 2003-03-31 株式会社東芝 半導体装置
US6057558A (en) * 1997-03-05 2000-05-02 Denson Corporation Silicon carbide semiconductor device and manufacturing method thereof
SE9704149D0 (sv) * 1997-11-13 1997-11-13 Abb Research Ltd A semiconductor device of SiC and a transistor of SiC having an insulated gate
JPH11251592A (ja) * 1998-01-05 1999-09-17 Denso Corp 炭化珪素半導体装置
DE19843659A1 (de) * 1998-09-23 2000-04-06 Siemens Ag Halbleiterbauelement mit strukturiertem Halbleiterkörper
JP3506676B2 (ja) * 2001-01-25 2004-03-15 Ｎｅｃエレクトロニクス株式会社 半導体装置
JP2005079339A (ja) * 2003-08-29 2005-03-24 National Institute Of Advanced Industrial & Technology 半導体装置、およびその半導体装置を用いた電力変換器、駆動用インバータ、汎用インバータ、大電力高周波通信機器
JP2009088345A (ja) * 2007-10-01 2009-04-23 Toshiba Corp 半導体装置
JP5879770B2 (ja) * 2011-06-27 2016-03-08 住友電気工業株式会社 半導体装置およびその製造方法

Also Published As

Publication number Publication date
US9276106B2 (en) 2016-03-01
WO2014112233A1 (ja) 2014-07-24
DE112013006470T5 (de) 2015-10-01
CN104885226A (zh) 2015-09-02
US20150372128A1 (en) 2015-12-24
JP2014139967A (ja) 2014-07-31

Similar Documents

Publication Publication Date Title
JP6064614B2 (ja) 炭化珪素半導体装置およびその製造方法
JP6111673B2 (ja) 炭化珪素半導体装置
US9608074B2 (en) Silicon carbide semiconductor device and method for manufacturing silicon carbide semiconductor device
US8952393B2 (en) Silicon carbide semiconductor device
JP5954140B2 (ja) 炭化珪素半導体装置
JP6098417B2 (ja) 炭化珪素半導体装置およびその製造方法
JP6171678B2 (ja) 炭化珪素半導体装置およびその製造方法
JP6075120B2 (ja) 炭化珪素半導体装置
JP2015156429A (ja) 炭化珪素半導体装置およびその製造方法
JP5983415B2 (ja) 炭化珪素半導体装置
JP5958352B2 (ja) 炭化珪素半導体装置およびその製造方法
JP2015032813A (ja) 炭化珪素半導体装置
WO2016204035A1 (ja) 炭化珪素半導体装置
WO2013172124A1 (ja) 炭化珪素半導体装置
JP6070155B2 (ja) 炭化珪素半導体装置
WO2014041879A1 (ja) 炭化珪素半導体装置

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20150826

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20160122

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20160412

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20161122

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20161205

R150 Certificate of patent or registration of utility model

Ref document number: 6064614

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250