JP6061504B2 - 半導体装置及び半導体装置の製造方法 - Google Patents
半導体装置及び半導体装置の製造方法 Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title claims description 15
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- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 4
- 229910052796 boron Inorganic materials 0.000 claims description 4
- 229910052710 silicon Inorganic materials 0.000 claims description 4
- 239000010703 silicon Substances 0.000 claims description 4
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- 150000002500 ions Chemical class 0.000 description 22
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- 238000007254 oxidation reaction Methods 0.000 description 6
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 5
- 229910052799 carbon Inorganic materials 0.000 description 5
- 239000011229 interlayer Substances 0.000 description 5
- 239000002344 surface layer Substances 0.000 description 5
- 229910000838 Al alloy Inorganic materials 0.000 description 4
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- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 3
- 229910052698 phosphorus Inorganic materials 0.000 description 3
- 239000011574 phosphorus Substances 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
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- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
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- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- RJCQBQGAPKAMLL-UHFFFAOYSA-N bromotrifluoromethane Chemical compound FC(F)(F)Br RJCQBQGAPKAMLL-UHFFFAOYSA-N 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 229910021478 group 5 element Inorganic materials 0.000 description 1
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- 239000005416 organic matter Substances 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
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Description
その他の課題と新規な特徴は、本明細書の記述及び添付図面から明らかになるであろう。
図1(a)は、第1の実施形態に係る半導体装置SDの構成を示す平面図である。図1(b)は、図1(a)のA−A´断面図である。半導体装置SDは、縦型トランジスタを有している。この縦型トランジスタは、P型のドレイン層DRN、低濃度P型不純物層PL、ベース層BSE、凹部TRN、ゲート絶縁膜GI、底面絶縁膜BI、ゲート電極GT1、及びソース層SOUを有している。低濃度P型不純物層PLは、ドレイン層DRNの上に位置しており、ドレイン層DRNよりも不純物濃度が低い。ベース層BSEはN型の不純物層であり、低濃度P型不純物層PLの上に位置している。凹部TRNはベース層BSEに形成されており、下端が低濃度P型不純物層PL内に位置している。ゲート絶縁膜GIは、凹部TRNの側面に形成されている。底面絶縁膜BIは、凹部TRNの底面及び側面の下部に形成されており、ゲート絶縁膜GIよりも厚い。ゲート電極GT1は、凹部TRNに埋め込まれている。ソース層SOUはP型の不純物層であり、ベース層BSEに形成されており、ベース層BSEよりも浅い。ソース層SOUは、平面視で凹部TRNの隣に位置している。
図14は、第2の実施形態に係る半導体装置SDにおける凹部TRNの構造を示す断面図である。本図に示す例において、凹部TRNは、第1の実施形態と同様に第1凹部UT及び第2凹部BTによって構成されている。そしてベース層BSEの表面に対する第1凹部UTの側面の角度α1は、ベース層BSEの表面に対する第2凹部BTの側面の角度α2よりも小さい。例えば角度α1は、85°以上87°以下であり、角度α2は、87°以上89°以下である。
図15の各図は、第3の実施形態に係る半導体装置SDの製造方法を示す断面図である。本実施形態は、低濃度P型不純物層PLにP型の不純物をイオン注入するタイミングを除いて、第1の実施形態にかかる半導体装置SDの製造方法と同様である。
BSC ベースコンタクト層
BSE ベース層
BT 第2凹部
CH 接続孔
DE ドレイン電極
DRN ドレイン層
GI ゲート絶縁膜
GT1 ゲート電極
GT2 ゲート配線
IL 層間絶縁膜
ML1 第1マスク膜
ML2 第2マスク膜
ML3 第3マスク膜
MPL 遷移領域
PL 低濃度P型不純物層
PL1 低濃度P型不純物層
PL2 低濃度P型不純物層
PL3 不純物追加領域
SC ソースコンタクト
SD 半導体装置
SE ソース電極
SL セル
SOU ソース層
TRN 凹部
UT 第1凹部
Claims (11)
- P型のドレイン層と、
前記ドレイン層上に形成され、前記ドレイン層よりも不純物濃度が低い低濃度P型不純物層と、
前記低濃度P型不純物層上に位置するN型のベース層と、
前記ベース層に形成されていて下端が前記低濃度P型不純物層内に位置している凹部の側面に形成されたゲート絶縁膜と、
前記凹部の底面及び前記側面の下部に形成され、前記ゲート絶縁膜よりも厚い底面絶縁膜と、
前記凹部に埋め込まれたゲート電極と、
前記ベース層に、前記ベース層よりも浅く形成され、平面視で前記凹部の隣に位置するP型のソース層と、
を備え、
前記底面絶縁膜のうち前記凹部の底面に位置する部分の厚さをtbとしたとき、前記凹部の底面を含む厚さ方向の断面である第1断面において、前記低濃度P型不純物層のP型の不純物濃度のプロファイルである第1プロファイルは、
前記底面絶縁膜からの距離が0.5tb以上3.0tb以下の範囲内において変動幅が10%以下であり、
前記底面絶縁膜からの距離が0.5tb以上3.0tb以下の範囲内に極大値を有する半導体装置。 - 請求項1に記載の半導体装置において、
前記第1プロファイルは、前記極大値よりも前記ドレイン層側に極小値を有する半導体装置。 - 請求項2に記載の半導体装置において、
前記極大値と前記極小値の差は、前記極大値と前記極小値の平均値の10%以下である半導体装置。 - 請求項1に記載の半導体装置において、
前記凹部の前記側面の前記下部を含み、前記ベース層の表面と水平な断面である第2断面における前記底面絶縁膜の厚さをtsとした場合、前記第2断面において前記底面絶縁膜と前記低濃度P型不純物層の界面から2×ts以内に位置する前記低濃度P型不純物層の不純物濃度Csは、前記第1断面において前記底面絶縁膜と前記低濃度P型不純物層の界面から5×tbより前記ドレイン層側に位置する前記低濃度P型不純物層の不純物濃度Ceよりも低い半導体装置。 - 請求項4に記載の半導体装置において、前記第2断面において前記底面絶縁膜と前記低濃度P型不純物層の界面から0.5×tsに位置する前記低濃度P型不純物層の不純物濃度Csは、0.5×Ceよりも大きい半導体装置。
- 請求項1に記載の半導体装置において、
前記凹部の前記側面の前記下部を含み、前記ベース層の表面と水平な断面である第2断面における前記底面絶縁膜の厚さをtsとして、前記第1断面における前記底面絶縁膜の厚さをtbとした場合、前記第2断面において前記底面絶縁膜と前記低濃度P型不純物層の界面から0.5×tsに位置する前記低濃度P型不純物層の不純物濃度Csは、前記第1断面において前記底面絶縁膜と前記低濃度P型不純物層の界面から0.5×tbに位置する前記低濃度P型不純物層の不純物濃度Cbよりも低い半導体装置。 - 請求項6に記載の半導体装置において、
Cb>1.5×Csである半導体装置。 - 請求項1に記載の半導体装置において、
前記低濃度P型不純物層はシリコン層であり、かつP型の不純物としてB(ボロン)を有している半導体装置。 - 請求項1に記載の半導体装置において、
前記第1断面における前記底面絶縁膜内のP型の不純物の濃度は、前記ベース層の表面と水平な断面である第2断面における前記底面絶縁膜内のP型の不純物の濃度よりも大きい半導体装置。 - P型のドレイン層、及び前記ドレイン層上に位置していて前記ドレイン層よりも不純物濃度が低い低濃度P型不純物層を含む、半導体基板を形成する工程と、
前記半導体基板に凹部を形成する工程と、
前記凹部の側面にゲート絶縁膜を形成し、かつ、前記凹部の底面及び前記側面の下部に、前記ゲート絶縁膜よりも厚い底面絶縁膜を形成する工程と、
前記凹部にゲート電極を埋め込む工程と、
前記半導体基板に、平面視で前記凹部の隣に位置するP型のソース層を形成する工程と、
を備え、
前記ソース層を形成する工程より前に、前記半導体基板に前記低濃度P型不純物層上に位置するN型のベース層を形成する工程を備え、
前記凹部の底面は、前記低濃度P型不純物層に位置しており、
前記ゲート電極を埋め込む工程より前に、前記凹部の側面下部および底面の周囲に位置する前記低濃度P型不純物層にP型の不純物を注入する工程を有し、
前記低濃度P型不純物層に前記不純物を注入する工程において、前記不純物は、前記低濃度P型不純物層の表面の法線に対して斜めに注入され、
前記低濃度P型不純物層に前記不純物を注入する工程は、前記凹部を形成する工程の後、前記ゲート絶縁膜及び前記底面絶縁膜を形成する工程の前に行い、
前記凹部を形成する工程は、
前記ベース層となる層の上に開口を有する第1マスク膜を形成し、前記第1マスク膜をマスクとして前記ベース層となる層をエッチングすることにより、前記凹部の上部となる第1凹部を形成する工程と、
前記第1凹部の側面を第2マスク膜で覆う工程と、
前記第2マスク膜をマスクとして前記第1凹部の底面をエッチングすることにより、前記凹部の下部を形成する工程と、
を備え、
前記低濃度P型不純物層に前記不純物を注入する工程は、前記第1マスク膜および前記第2マスク膜を残したまま前記凹部に対して不純物を注入する工程である半導体装置の製造方法。 - 請求項10に記載の半導体装置の製造方法において、
前記低濃度P型不純物層に前記不純物を注入する工程において、前記低濃度P型不純物層の表面の法線に対する前記不純物の注入角度は6°以上10°以下である半導体装置の製造方法。
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