JP6053474B2 - 不揮発性半導体記憶装置 - Google Patents
不揮発性半導体記憶装置 Download PDFInfo
- Publication number
- JP6053474B2 JP6053474B2 JP2012259128A JP2012259128A JP6053474B2 JP 6053474 B2 JP6053474 B2 JP 6053474B2 JP 2012259128 A JP2012259128 A JP 2012259128A JP 2012259128 A JP2012259128 A JP 2012259128A JP 6053474 B2 JP6053474 B2 JP 6053474B2
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- memory
- region
- source
- floating gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C14/00—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
- G11C14/0054—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell
- G11C14/0063—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell and the nonvolatile element is an EEPROM element, e.g. a floating gate or MNOS transistor
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
- G11C16/0441—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing multiple floating gate devices, e.g. separate read-and-write FAMOS transistors with connected floating gates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
- H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
- H10B10/18—Peripheral circuit regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
- H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
- H10B41/41—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region of a memory region comprising a cell select transistor, e.g. NAND
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/60—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the control gate being a doped region, e.g. single-poly memory cell
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/70—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/68—Floating-gate IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/68—Floating-gate IGFETs
- H10D30/681—Floating-gate IGFETs having only two programming levels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/60—Impurity distributions or concentrations
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Non-Volatile Memory (AREA)
- Read Only Memory (AREA)
- Semiconductor Memories (AREA)
- Static Random-Access Memory (AREA)
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012259128A JP6053474B2 (ja) | 2012-11-27 | 2012-11-27 | 不揮発性半導体記憶装置 |
| US14/647,009 US9646979B2 (en) | 2012-11-27 | 2013-10-31 | Non-volatile semiconductor storage device |
| PCT/JP2013/079512 WO2014083997A1 (ja) | 2012-11-27 | 2013-10-31 | 不揮発性半導体記憶装置 |
| TW102139904A TWI582909B (zh) | 2012-11-27 | 2013-11-04 | Nonvolatile semiconductor memory device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012259128A JP6053474B2 (ja) | 2012-11-27 | 2012-11-27 | 不揮発性半導体記憶装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2014107406A JP2014107406A (ja) | 2014-06-09 |
| JP2014107406A5 JP2014107406A5 (enExample) | 2015-11-05 |
| JP6053474B2 true JP6053474B2 (ja) | 2016-12-27 |
Family
ID=50827643
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2012259128A Active JP6053474B2 (ja) | 2012-11-27 | 2012-11-27 | 不揮発性半導体記憶装置 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US9646979B2 (enExample) |
| JP (1) | JP6053474B2 (enExample) |
| TW (1) | TWI582909B (enExample) |
| WO (1) | WO2014083997A1 (enExample) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6306466B2 (ja) | 2014-07-31 | 2018-04-04 | 株式会社フローディア | 不揮発性sramメモリセル、および不揮発性半導体記憶装置 |
| US9450052B1 (en) * | 2015-07-01 | 2016-09-20 | Chengdu Monolithic Power Systems Co., Ltd. | EEPROM memory cell with a coupler region and method of making the same |
| US10892266B2 (en) * | 2016-01-19 | 2021-01-12 | Ememory Technology Inc. | Nonvolatile memory structure and array |
| US9847133B2 (en) * | 2016-01-19 | 2017-12-19 | Ememory Technology Inc. | Memory array capable of performing byte erase operation |
| US11361215B2 (en) * | 2017-11-29 | 2022-06-14 | Anaflash Inc. | Neural network circuits having non-volatile synapse arrays |
| WO2019124356A1 (ja) | 2017-12-20 | 2019-06-27 | パナソニック・タワージャズセミコンダクター株式会社 | 半導体装置及びその動作方法 |
| KR102385951B1 (ko) * | 2018-02-23 | 2022-04-14 | 에스케이하이닉스 시스템아이씨 주식회사 | 프로그램 효율이 증대되는 원 타임 프로그래머블 메모리 및 그 제조방법 |
| US11462282B2 (en) | 2020-04-01 | 2022-10-04 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor memory structure |
| CN114005477B (zh) * | 2021-11-03 | 2023-03-10 | 中国电子科技集团公司第五十八研究所 | 一种高可靠共浮栅型Flash存内计算器件及阵列结构 |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0760864B2 (ja) | 1984-07-13 | 1995-06-28 | 株式会社日立製作所 | 半導体集積回路装置 |
| JPS6414798A (en) * | 1987-07-09 | 1989-01-18 | Fujitsu Ltd | Non-volatile memory device |
| US5181188A (en) * | 1989-07-07 | 1993-01-19 | Sharp Kabushiki Kaisha | Semiconductor memory device |
| US5331188A (en) * | 1992-02-25 | 1994-07-19 | International Business Machines Corporation | Non-volatile DRAM cell |
| US5592415A (en) * | 1992-07-06 | 1997-01-07 | Hitachi, Ltd. | Non-volatile semiconductor memory |
| JPH11186416A (ja) * | 1997-12-19 | 1999-07-09 | Rohm Co Ltd | 不揮発性半導体記憶装置およびその製造方法 |
| US6114724A (en) * | 1998-03-31 | 2000-09-05 | Cypress Semiconductor Corporation | Nonvolatile semiconductor memory cell with select gate |
| JP3906177B2 (ja) * | 2002-05-10 | 2007-04-18 | 株式会社東芝 | 不揮発性半導体記憶装置 |
| US7209392B2 (en) * | 2004-07-20 | 2007-04-24 | Ememory Technology Inc. | Single poly non-volatile memory |
| KR100795907B1 (ko) * | 2006-09-07 | 2008-01-21 | 삼성전자주식회사 | 이이피롬 소자 및 그 형성 방법 |
| JP5265898B2 (ja) * | 2007-09-25 | 2013-08-14 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| JP2009194140A (ja) * | 2008-02-14 | 2009-08-27 | Renesas Technology Corp | 半導体装置およびその製造方法 |
| JP5316532B2 (ja) * | 2008-03-31 | 2013-10-16 | 富士通セミコンダクター株式会社 | 半導体装置 |
| JP2009267185A (ja) * | 2008-04-28 | 2009-11-12 | Sharp Corp | 不揮発性半導体記憶装置 |
| US8674422B2 (en) * | 2012-01-30 | 2014-03-18 | Synopsys, Inc. | Asymmetric dense floating gate nonvolatile memory with decoupled capacitor |
| US9001580B1 (en) * | 2013-12-04 | 2015-04-07 | Synopsys, Inc. | Asymmetric dense floating gate nonvolatile memory with decoupled capacitor |
-
2012
- 2012-11-27 JP JP2012259128A patent/JP6053474B2/ja active Active
-
2013
- 2013-10-31 WO PCT/JP2013/079512 patent/WO2014083997A1/ja not_active Ceased
- 2013-10-31 US US14/647,009 patent/US9646979B2/en active Active
- 2013-11-04 TW TW102139904A patent/TWI582909B/zh active
Also Published As
| Publication number | Publication date |
|---|---|
| TW201448122A (zh) | 2014-12-16 |
| US9646979B2 (en) | 2017-05-09 |
| JP2014107406A (ja) | 2014-06-09 |
| TWI582909B (zh) | 2017-05-11 |
| WO2014083997A1 (ja) | 2014-06-05 |
| US20150311219A1 (en) | 2015-10-29 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP6053474B2 (ja) | 不揮発性半導体記憶装置 | |
| US7382658B2 (en) | Non-volatile memory embedded in a conventional logic process and methods for operating same | |
| US9362374B2 (en) | Simple and cost-free MTP structure | |
| KR101670619B1 (ko) | 불휘발성 반도체 기억 장치 | |
| US8552763B2 (en) | Switch array including active regions being adjacent to each other in channel width direction of memory cell transistor | |
| JP6069054B2 (ja) | 不揮発性半導体記憶装置 | |
| US8144514B2 (en) | One-transistor floating-body DRAM cell device with non-volatile function | |
| US7675779B2 (en) | Non-volatile memory devices and methods of operating the same | |
| KR102512901B1 (ko) | 불휘발성 sram 메모리 셀, 및 불휘발성 반도체 기억 장치 | |
| JP6383280B2 (ja) | 不揮発性半導体記憶装置 | |
| JP6069137B2 (ja) | 不揮発性半導体記憶装置 | |
| US9424924B2 (en) | Non-volatile semiconductor memory device having depletion-type and enhancement-type channel regions |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20150909 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20150909 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20160209 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20160401 |
|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20160802 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20161012 |
|
| A911 | Transfer to examiner for re-examination before appeal (zenchi) |
Free format text: JAPANESE INTERMEDIATE CODE: A911 Effective date: 20161020 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20161115 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20161129 |
|
| R150 | Certificate of patent or registration of utility model |
Ref document number: 6053474 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |