JP5970736B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP5970736B2 JP5970736B2 JP2012103529A JP2012103529A JP5970736B2 JP 5970736 B2 JP5970736 B2 JP 5970736B2 JP 2012103529 A JP2012103529 A JP 2012103529A JP 2012103529 A JP2012103529 A JP 2012103529A JP 5970736 B2 JP5970736 B2 JP 5970736B2
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
- H10P74/20—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by the properties tested or measured, e.g. structural or electrical properties
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
- H10D64/251—Source or drain electrodes for field-effect devices
- H10D64/254—Source or drain electrodes for field-effect devices for lateral devices wherein the source or drain electrodes extend entirely through the semiconductor bodies, e.g. via-holes for back side contacts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/015—Manufacture or treatment of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
- H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having two-dimensional [2D] charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
- H10D30/471—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
- H10D30/475—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs
- H10D30/4755—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs having wide bandgap charge-carrier supplying layers, e.g. modulation doped HEMTs such as n-AlGaAs/GaAs HEMTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
- H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
- H10P50/246—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group III-V materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
- H10P74/20—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by the properties tested or measured, e.g. structural or electrical properties
- H10P74/203—Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
- H10P74/23—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes
- H10P74/238—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes comprising acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection or in-situ thickness measurement
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
- H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
- H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
- H10W20/0234—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising etching via holes that stop on pads or on electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
- H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
- H10W20/0242—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising etching via holes from the back sides of the chips, wafers or substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
- H10D62/8503—Nitride Group III-V materials, e.g. AlN or GaN
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
- Drying Of Semiconductors (AREA)
- Junction Field-Effect Transistors (AREA)
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012103529A JP5970736B2 (ja) | 2012-04-27 | 2012-04-27 | 半導体装置の製造方法 |
| US13/872,347 US20130288401A1 (en) | 2012-04-27 | 2013-04-29 | Method for fabricating semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012103529A JP5970736B2 (ja) | 2012-04-27 | 2012-04-27 | 半導体装置の製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2013232513A JP2013232513A (ja) | 2013-11-14 |
| JP2013232513A5 JP2013232513A5 (https=) | 2015-05-07 |
| JP5970736B2 true JP5970736B2 (ja) | 2016-08-17 |
Family
ID=49477657
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2012103529A Active JP5970736B2 (ja) | 2012-04-27 | 2012-04-27 | 半導体装置の製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US20130288401A1 (https=) |
| JP (1) | JP5970736B2 (https=) |
Families Citing this family (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6003213B2 (ja) * | 2012-05-17 | 2016-10-05 | 住友電気工業株式会社 | 半導体装置の製造方法 |
| JP5832058B1 (ja) * | 2013-12-20 | 2015-12-16 | 日本碍子株式会社 | 窒化ガリウム層を含む基板およびその製造方法 |
| US9779988B2 (en) * | 2013-12-20 | 2017-10-03 | Nxp Usa, Inc. | Semiconductor devices with inner via |
| JP6104858B2 (ja) | 2014-08-20 | 2017-03-29 | 株式会社東芝 | 半導体装置および半導体装置の製造方法 |
| KR20190090845A (ko) * | 2016-12-06 | 2019-08-02 | 큐로미스, 인크 | 집적된 클램프 다이오드를 포함하는 횡형 고 전자 이동도 트랜지스터 |
| CN107980171B (zh) * | 2016-12-23 | 2022-06-24 | 苏州能讯高能半导体有限公司 | 半导体芯片、半导体晶圆及半导体晶圆的制造方法 |
| CN107068611A (zh) * | 2016-12-23 | 2017-08-18 | 苏州能讯高能半导体有限公司 | 半导体芯片、半导体晶圆及半导体晶圆的制造方法 |
| DE102017103111B4 (de) * | 2017-02-16 | 2025-03-13 | Semikron Elektronik Gmbh & Co. Kg | Halbleiterdiode und elektronische Schaltungsanordnung hiermit |
| US10224285B2 (en) | 2017-02-21 | 2019-03-05 | Raytheon Company | Nitride structure having gold-free contact and methods for forming such structures |
| US10096550B2 (en) | 2017-02-21 | 2018-10-09 | Raytheon Company | Nitride structure having gold-free contact and methods for forming such structures |
| CN109671774B (zh) * | 2017-10-16 | 2020-08-21 | 苏州能讯高能半导体有限公司 | 半导体器件及其制造方法 |
| US11205704B2 (en) * | 2018-02-01 | 2021-12-21 | Mitsubishi Electric Corporation | Semiconductor device and production method therefor |
| JP7215800B2 (ja) * | 2019-02-19 | 2023-01-31 | 住友電工デバイス・イノベーション株式会社 | 半導体装置の製造方法および半導体装置 |
| GB2593864B (en) * | 2020-02-28 | 2023-01-04 | X Fab France Sas | Improved transfer printing for RF applications |
| JP2023062209A (ja) * | 2020-03-12 | 2023-05-08 | 住友電工デバイス・イノベーション株式会社 | 半導体デバイス及び半導体デバイスの製造方法 |
| US11270928B2 (en) * | 2020-04-02 | 2022-03-08 | Macom Technology Solutions Holdings, Inc. | Unibody lateral via |
| US11437301B2 (en) * | 2020-10-15 | 2022-09-06 | Nxp Usa, Inc. | Device with an etch stop layer and method therefor |
| DE112020007877T5 (de) * | 2020-12-22 | 2023-10-19 | Mitsubishi Electric Corporation | Halbleitervorrichtung und Verfahren zur deren Herstellung |
| JP7625455B2 (ja) * | 2021-03-19 | 2025-02-03 | 株式会社東芝 | 半導体装置の製造方法 |
| US12362294B2 (en) * | 2021-06-03 | 2025-07-15 | Nxp Usa, Inc. | Wafer with semiconductor devices and integrated electrostatic discharge protection |
| US20230343703A1 (en) * | 2022-04-22 | 2023-10-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device including through via and method of making |
| US20250072024A1 (en) * | 2023-08-23 | 2025-02-27 | Globalfoundries U.S. Inc. | Transistor with thermal plug |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2591429B2 (ja) * | 1993-06-28 | 1997-03-19 | 日本電気株式会社 | 磁気抵抗素子 |
| US5406122A (en) * | 1993-10-27 | 1995-04-11 | Hughes Aircraft Company | Microelectronic circuit structure including conductor bridges encapsulated in inorganic dielectric passivation layer |
| US7892974B2 (en) * | 2000-04-11 | 2011-02-22 | Cree, Inc. | Method of forming vias in silicon carbide and resulting devices and circuits |
| JP4936695B2 (ja) * | 2004-09-29 | 2012-05-23 | オンセミコンダクター・トレーディング・リミテッド | 半導体装置及びその製造方法 |
| JP4089752B2 (ja) * | 2007-05-21 | 2008-05-28 | サンケン電気株式会社 | 半導体装置の製造方法 |
| EP2107611A1 (en) * | 2008-03-31 | 2009-10-07 | Kabushiki Kaisha Toshiba | Field effect transistor with Ti adhesion layer under the gate electrode |
| JP5604855B2 (ja) * | 2009-11-17 | 2014-10-15 | 富士通株式会社 | 半導体装置及びその製造方法 |
| EP2600393A4 (en) * | 2010-07-29 | 2014-07-02 | Ngk Insulators Ltd | SEMICONDUCTOR ELEMENT, HEMT ELEMENT AND MANUFACTURING METHOD FOR THE SEMICONDUCTOR ELEMENT |
| US8519548B2 (en) * | 2010-11-19 | 2013-08-27 | Electronics And Telecommunications Research Institute | Wafer level packaged GaN power device and the manufacturing method thereof |
-
2012
- 2012-04-27 JP JP2012103529A patent/JP5970736B2/ja active Active
-
2013
- 2013-04-29 US US13/872,347 patent/US20130288401A1/en not_active Abandoned
Also Published As
| Publication number | Publication date |
|---|---|
| JP2013232513A (ja) | 2013-11-14 |
| US20130288401A1 (en) | 2013-10-31 |
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