JP5970225B2 - Semiconductor device drive device - Google Patents

Description

  The present invention relates to a drive device for a semiconductor device that controls switching of the semiconductor device.

  In a power conversion device such as an inverter device, a semiconductor device including an arm circuit including a semiconductor switching element such as an IGBT and a diode (freewheeling diode) connected in antiparallel to the semiconductor switching element is used.

  When the semiconductor switching element is turned on in one arm circuit, surge voltage and ringing tend to occur during reverse recovery of the diode of the arm. This tendency is remarkable in high-speed switching elements such as IGBTs.

  In order to reduce such surge voltage and ringing, the semiconductor switching element may be turned on gently by means such as increasing the resistance value of the gate resistance of the gate driving device, but on the other hand, when the semiconductor switching element is turned on. Power loss (turn-on loss) increases.

  As a conventional technique for reducing surge voltage and ringing without increasing the turn-on loss, for example, there is a technique disclosed in Patent Document 1. In the present technology, the time change rate dVge / dt of the gate voltage Vge is detected when a voltage-driven semiconductor switching element such as an IGBT is turned on, and after the gate voltage starts to rise, the time change rate dVge / dt becomes a predetermined threshold value. When it becomes less than Vth1, the gate resistance value r is switched to a low value. As a result, surge voltage and ringing generated at turn-on are reduced, and turn-on loss is reduced.

JP 2006-222593 A

  In recent years, the speed of semiconductor switching elements has been increased, and the prior art has a problem that it is difficult to sufficiently suppress surge voltage and ringing.

  The present invention has been made in consideration of the above-described problems, and it is possible to reliably suppress surge voltage and ringing while reducing turn-on loss even for a semiconductor device including a high-speed semiconductor switching element. Provided is a drive device for a semiconductor device capable of controlling switching of the semiconductor device.

  In order to solve the above problems, a semiconductor device driving device according to the present invention is a semiconductor device driving device including a voltage controlled semiconductor switching element and a free wheel diode, and the gate terminal of the voltage controlled semiconductor switching element is turned on. Based on a gate drive resistor connected between the power source, a threshold voltage detecting means for detecting that the gate voltage of the voltage controlled semiconductor switching element has reached a threshold value at which the main current starts to flow, and a detection result of the threshold value detecting means And gate drive resistance setting means for setting a resistance value of the gate drive resistance. Further, the gate drive resistance setting means sets the resistance value of the gate drive resistance to the first resistance value at the start of the turn-on operation, and after the threshold value detection means detects that the gate voltage has reached the threshold value, A second resistance value larger than the first resistance value is set, and then a third resistance value smaller than the first and second resistance values is set.

  According to the present invention, the resistance value of the gate driving resistor is set to the first resistance value at the start of the turn-on operation, and after detecting that the gate voltage has reached the threshold value, the second resistance value larger than the first resistance value is set. The resistance value of the voltage controlled semiconductor switching element is reduced by setting the resistance value of the voltage controlled semiconductor switching element to a third resistance value smaller than the first resistance value and the second resistance value. Can suppress surge voltage and ringing.

The block diagram of the gate drive device which is the 1st Example of this invention. Operation | movement explanatory drawing of a 1st Example. The circuit structural example of a 1st Example. The block diagram of the gate drive device which is the 2nd Example of this invention. Operation | movement explanatory drawing of a 2nd Example. The circuit structural example of 2nd Example. The block diagram of the gate drive device which is the 3rd Example of this invention. Operation | movement explanatory drawing of a 3rd Example. The block diagram of the gate drive device which is a modification of a 3rd Example. The block diagram of the gate drive device which is the 4th Example of this invention. Operation | movement explanatory drawing of a 4th Example.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  The above and other objects and features of the present invention will be apparent from the following description and drawings.

  FIG. 1 shows a circuit configuration of a gate drive device for a semiconductor device according to a first embodiment of the present invention. Although FIG. 1 shows a gate drive device for the lower arm, a similar gate drive device is also connected to the upper arm.

(Description of circuit connection configuration)
The gate driving device of this embodiment includes an on / off switch 100, a resistance switch 103 (SW1), a resistance switch 104 (SW2), a resistor Rg1, a resistor Rg2, and a resistor Rg3 between the turn-on power supply Vgp and the gate terminal. Is provided.

  Further, the gate drive device includes a switch 1 switching control circuit 105 that controls on / off of the resistance changeover switch 103, a switch 2 switching control circuit 106 that controls on / off of the resistance changeover switch 104, and threshold detection means 107. . The threshold detection means 107 is connected to the gate terminal G, the switch 1 switching control circuit 105 and the switch 2 switching control circuit 106. The switch 1 switching control circuit 105 is connected to the resistance switching switch 103, and the switch 2 switching control circuit 106 is switched to resistance. Each is connected to the switch 104. These resistance changeover switch 103, switch 1 changeover control circuit 105, resistance changeover switch 104, and switch 2 changeover control circuit 106 constitute gate drive resistance setting means for setting the resistance value of the gate drive resistance to a predetermined value.

  The gate driving apparatus of this embodiment includes an insulated gate bipolar transistor (hereinafter referred to as IGBT) 101 as a voltage-controlled semiconductor switching element, and a silicon carbide Schottky barrier diode (hereinafter referred to as SiC) as a free-wheeling diode connected in reverse parallel to the IGBT 101. The gate of the IGBT of the inverter using the semiconductor device constituted by 102 as the upper and lower arms is driven.

  However, the constituent elements of the semiconductor device are not limited to this. For example, the same effect can be obtained even when a power MOSFET is used as a voltage-controlled semiconductor switching element and a silicon pn junction diode is used as a free wheel diode.

(Functional description of each component)
Hereinafter, the case where the IGBT of the lower arm is turned on while the load current is flowing in the SiC-SBD of the upper arm will be described (same as in each embodiment), but the load current is flowing in the SiC-SBD of the lower arm. The same applies when the upper arm IGBT is turned on in this state. In the following description, unless otherwise specified, the IGBT is a lower arm IGBT, and the SiC-SBD is an upper arm SiC-SBD.

  The on / off changeover switch 100 is controlled by an on / off control signal. When the on / off changeover switch 100 is in an on state, a current flows from the turn-on power supply Vgp to the gate terminal, and a turn-on operation is performed.

  During the turn-on operation, the gate drive resistance between the turn-on power supply Vgp and the gate terminal is switched by the resistance changeover switch 103 and the resistance changeover switch 104. When the resistance changeover switch 103 is in the on state and the resistance changeover switch 104 is in the off state, the first gate drive resistance R1 is a parallel resistance of Rg1 and Rg2 and a series resistance of Rg3 (R1 = (Rg1 × Rg2) / (Rg1 + Rg2) + Rg3 When the resistance changeover switch 103 and the resistance changeover switch 104 are both in the off state, the second gate drive resistance R2 is a series resistance of Rg2 and Rg3 (R2 = Rg2 + Rg3), and the resistance changeover switch 104 is in the on state. The third gate drive resistor R3 becomes Rg3.

  In this embodiment, the values of the resistor Rg1, the resistor Rg2, and the resistor Rg3 are set so as to have a relationship of R2> R1> R3. Actually, the ON resistance of the resistance changeover switch 103 and the resistance changeover switch 104 constituted by semiconductor switches is also included, but since the ON resistance is sufficiently low, the ON / OFF state of each resistance changeover switch is included even if the ON resistance is included. The magnitude relationship of the gate drive resistance does not change.

  The threshold detection means 107 detects that the gate voltage of the IGBT 101 has reached the gate threshold voltage that is the gate voltage at which the main current starts to flow. The switch 1 switching control circuit 105 controls on / off of the resistance selector switch 103 and its timing based on the detection result of the threshold detection means 107. The switch 2 switching control circuit 106 controls on / off of the resistance switching switch 104 and its timing based on the detection result of the threshold detection means 107.

(Explanation of drive sequence)
Hereinafter, the operation of the gate driving apparatus of this embodiment will be described with reference to FIG. First, when the on / off changeover switch 100 is in the off state, the gate voltage of the IGBT 101 is almost the gate turn-off power supply voltage Vgn, so that the IGBT 101 is in the off state and no collector main current flows. At this time, the load current indicated by (1) in FIG. 1 flows in the SiC-SBD 102 in the forward direction, and a voltage obtained by subtracting the forward voltage of the SiC-SBD 102 from the power supply voltage Vcc is applied between the collector and emitter of the IGBT 101. ing.

  When the on / off switch 100 is turned on, the gate voltage Vg of the IGBT 101 starts to rise. At this time, the resistance changeover switch 103 is on, the resistance changeover switch 104 is off, and the gate drive resistance is an intermediate value R1.

  After time tvth when the gate voltage Vg of the IGBT 101 becomes the threshold voltage (Vth), the collector current Ic of the IGBT 101 starts to rise, and current flows from the load to the IGBT 101 through the current path shown in (2) of FIG. Since the load has a large inductance, the current value hardly changes during the switching operation. Therefore, the forward current of SiC-SBD 102 decreases as the collector current Ic of IGBT 101 increases. The collector-emitter voltage Vce of the IGBT 101 starts to drop.

  The resistance changeover switch 103 is turned off at a time t1 when a predetermined period has elapsed from the time tvth, and the gate drive resistance becomes the maximum value R2. When the gate drive resistance is switched to R2, the descending slope (dVce / dt) of the collector-emitter voltage Vce of the IGBT 101 decreases.

  When the collector main current Ic of the IGBT 101 becomes the same as the load current, the forward current of the SiC-SBD 102 becomes almost zero, and the reverse bias voltage starts to be applied to the SiC-SBD 102 from this time (tvkas). That is, the cathode-anode voltage Vka of the SiC-SBD 102 starts increasing at this timing.

  The cathode-anode voltage Vka of the SiC-SBD 102 is Vka = Vcc− (Vce + L × (dIc / dt)), where L is the parasitic inductance of the main circuit. When the collector current Ic of the IGBT 101 exceeds the load current and becomes the peak current, (dIc / dt) = 0, so the cathode-anode voltage Vka at this time is Vka1 (= Vcc−Vce).

  The reason why the collector current Ic of the IGBT 101 increases beyond the load current is that resonance occurs due to the capacitance component of the SiC-SBD 102 and the wiring inductance.

  Thereafter, the collector current Ic of the IGBT 101 starts to decrease. At this time, since dIc / dt has a negative value, the cathode-anode voltage Vka further increases with respect to Vka1, and at the time tvkae, the first peak voltage Vkap1 is increased. Become.

  When the resistance changeover switch 104 is switched to the on state at time t2 when a predetermined period has elapsed from time tvkae, the gate drive resistance becomes the minimum value R3. At this time, the falling slope of the collector-emitter voltage Vce of the IGBT 101 increases. Eventually, the collector-emitter voltage Vce of the IGBT 101 becomes the saturation voltage Vcesat, and the turn-on operation is completed.

  The switch 1 switching control circuit 105 and the switch 2 switching control circuit 106 are provided with appropriate delay times from the time tvth when the threshold detection means 107 detects that the gate voltage has reached the threshold voltage, The above operation is performed by controlling the resistance changeover switch 104.

(Explanation of effects in this embodiment)
In this embodiment, by setting the gate drive resistance to the intermediate value R1 until the time t1 in the first half of the turn-on operation, the turn-on loss of the IGBT 101 from the time tvth to the time t1 can be reduced.

  Prior to the start of increasing the reverse voltage Vka of the SiC-SBD 102, the gate drive resistance is set to the maximum value R2 at time t1, thereby reducing the falling slope (dVce / dt) of the collector-emitter voltage Vce of the IGBT 101, and By reducing the absolute value of negative dIc / dt when the collector current Ic of the IGBT 101 decreases after showing the peak current, the first peak voltage Vkap1 of the cathode-anode voltage Vka of the SiC-SBD 102 can be reduced. it can.

  Further, by setting the gate drive resistance to the minimum value R3 at a time t2 after the time tvake when the cathode-anode voltage Vka of the SiC-SBD 102 becomes the first peak voltage Vkap1, the falling slope of the collector-emitter voltage Vce of the IGBT 101 is reduced. This can increase the turn-on loss of the IGBT 101 after time t2.

(Description of specific circuit configuration example)
FIG. 3 shows an example of a specific circuit configuration of the gate drive circuit of this embodiment.

  The threshold detection means 107 is constituted by resistors Ra, Rb and Rc, and a semiconductor switch (in this embodiment, a MOSFET (same in other embodiments)) Tra. That is, when the gate voltage is divided by Ra and Rb and the gate voltage becomes the threshold voltage, if the values of Ra and Rb are selected so that Tra is turned on by the voltage at the point a, the gate voltage is greater than the threshold voltage Vth. When the voltage is small, the voltage at the point b is high level, and when the gate voltage is higher than the threshold voltage Vth, the voltage at the point b is low level. That is, since the voltage at the point b is switched from the high level to the low level, the time tvth when the gate voltage reaches the threshold voltage Vth can be detected.

  The switch 1 switching control circuit 105 includes a resistor Rd and semiconductor switches Trb, Trc, Trd, Tre, and Trf. That is, when the voltage at point b is at a high level, the voltage at point e is at a low level, so that the resistance changeover switch 103 is turned on. When the gate voltage reaches the threshold voltage and point b becomes low level at time tvth, Trb is turned off, the voltage at point c rises to high level, the voltage at point e becomes high level, and resistance switching The switch 103 is turned off. The rising speed of the voltage at the point c can be controlled by the input capacitance of Rd and Rd. That is, a delay circuit is configured by the input capacitance of Trd and Rd, and the delay time from time tvth to time t1 can be controlled.

  The resistance changeover switch 103 remains off from time t1 to at least time t2, but the gate voltage may fall below the threshold voltage from time t1 to time t2. If the gate voltage falls below the threshold voltage between time t1 and time t2, the voltage at point b becomes high level, point c becomes low level, point e becomes low level, and the resistance changeover switch 103 is turned on again. In this embodiment, the input capacitance of Trb and the CR time constant of Rc are increased. Even if the gate voltage reaches the threshold voltage during turn-on and then falls below the threshold voltage again, the point b does not become high level. To prevent malfunction. That is, this embodiment includes a determination maintaining circuit that maintains a determination result that the gate voltage has reached the threshold voltage until the turn-on operation is completed.

  The switch 2 switching control circuit 106 includes semiconductor switches Trg, Trh, Tri and Trj, and resistors Re and Rf. That is, when the gate voltage reaches the threshold voltage and the point b becomes low level, the point f becomes high level, the point g becomes low level, and the resistance changeover switch 104 is turned on. The voltage rising speed at the point f can be controlled by the input capacitance of Trj and Re. That is, a delay circuit is configured by the input capacitance of Trj and Re, and the delay time from time tvth to time t2 can be controlled. Further, by appropriately selecting the value of Rf, even if the voltage at point b becomes high after time t2, it is possible to prevent point f from immediately becoming low.

  The circuit configuration of the present embodiment shown in FIG. 3 is not limited to this, and various other circuit configurations can be used as long as they have the functions described above.

  Further, preferably, an appropriate filter is provided between the threshold detection means 107 and the gate, thereby enabling detection that is not easily affected by noise.

  FIG. 4 shows the configuration of a gate drive device for a semiconductor device according to a second embodiment of the present invention.

(Description of circuit connection configuration)
The gate drive device of this embodiment includes an on / off changeover switch 100, a resistance changeover switch 103, a resistance changeover switch 104, resistors Rg1 and Rg2, and a resistor Rg3 between the turn-on power supply Vgp and the gate terminal.

  In addition, a switch 1 switching control circuit 105, a switch 2 switching control circuit 106, and a threshold detection means 107 are provided. The threshold detection means 107 includes a gate voltage determination circuit 108, a gate voltage differentiation circuit 109, and a differential value determination circuit.

  The threshold detection means 107 is connected to the gate terminal, the switch 1 switching control circuit 105 and the switch 2 switching control circuit 106, the switch 1 switching control circuit 105 is connected to the resistance switching switch 103, and the switch 2 switching control circuit 106 is Connected to the resistance changeover switch 104.

(Functional description of each component)
On / off changeover switch 100, resistance changeover switch 103 and resistance changeover switch 104, gate drive resistances R1, R2 and R3 and the magnitude relationship of these gate drive resistances, switch 1 changeover control circuit 105, switch 2 changeover control circuit 106, threshold detection Each function of the means 107 is the same as that of the first embodiment.

  The gate voltage determination circuit 108 has a function of monitoring the gate voltage and determining whether or not the voltage is equal to or higher than a preset voltage.

  The gate voltage differentiating circuit 109 has a function of outputting the time change rate dVg / dt of the gate voltage Vg as a voltage signal.

  The differential value determination circuit has a function of determining whether or not the voltage signal indicating the time change rate of the gate voltage output from the gate voltage differentiation circuit 109 is equal to or higher than a preset voltage.

(Explanation of drive sequence)
Hereinafter, the operation of the gate driving apparatus of this embodiment will be described with reference to FIG. The basic drive sequence is the same as that in the first embodiment. First, when the on / off changeover switch 100 is in the off state, the gate voltage Vg of the IGBT 101 is almost the gate turn-off power supply voltage Vgn, and therefore the IGBT 101 is in the off state and the collector main current Ic does not flow.

  When the on / off switch 100 is turned on, the gate voltage Vg of the IGBT 101 starts to rise. At this time, the resistance changeover switch 103 is on, the resistance changeover switch 104 is off, and the gate drive resistance is an intermediate value R1.

  The gate voltage Vg of the IGBT 101 increases, and when it reaches the threshold voltage (Vth), the rising slope decreases. This is because the collector-emitter voltage Vce of the IGBT 101 fluctuates due to reaching the threshold voltage, so that a current flows from the gate to the collector via the feedback capacitance, which is a parasitic capacitance between the gate and collector of the IGBT 101, and between the gate and emitter. This is because the charging current to the parasitic capacitance of the capacitor decreases. At this time, the output voltage of the gate voltage differentiation circuit 109 decreases. Therefore, when the differential value determination circuit 110 determines that the output voltage of the gate voltage differentiation circuit 109 is equal to or lower than the predetermined voltage Vbref1, the time tvth can be detected.

  The gate voltage determination circuit 108 determines that the gate voltage Vg is equal to or higher than a predetermined voltage Vref. The voltage Vref is set to a voltage that is somewhat lower than the threshold voltage of the gate voltage, and the logical sum of the determination result of the gate voltage determination circuit 108 and the output result of the differential value determination circuit 110 is taken, so that the threshold voltage is more accurately obtained. It can be determined that it has reached.

  Thereafter, the collector current Ic of the IGBT 101 starts to rise, and the current flows from the load to the IGBT 101 through the current path indicated by (2) in FIG. Since the load has a large inductance, the current value hardly changes during the switching operation. Therefore, the forward current of SiC-SBD 102 decreases as the collector current Ic of IGBT 101 increases. The collector-emitter voltage Vce of the IGBT 101 starts to drop.

  The resistance changeover switch 103 is turned off at a time t1 when a predetermined period has elapsed from the time tvth, and the gate drive resistance becomes the maximum value R2. When the gate drive resistance is switched to R2, the falling slope of the collector-emitter voltage Vce of the IGBT 101 becomes smaller.

  When the collector main current Ic of the IGBT 101 becomes the same as the load current, the forward current of the SiC-SBD 102 becomes substantially zero, and a reverse bias voltage starts to be applied to the SiC-SBD 102 from this time tvkas. That is, the cathode-anode voltage Vka of the SiC-SBD 102 starts increasing at this timing.

  The cathode-anode voltage Vka of the SiC-SBD 102 is Vka = Vcc− (Vce + L × (dIc / dt)), where L is the parasitic inductance of the main circuit. When the collector current Ic of the IGBT 101 exceeds the load current and becomes a peak current, dIc / dt = 0, and thus the cathode-anode voltage Vka at this time is Vka1 (= Vcc−Vce).

  The reason why the collector current Ic of the IGBT 101 increases beyond the load current is that resonance occurs due to the capacitance component of the SiC-SBD 102 and the wiring inductance.

  Thereafter, the collector current Ic of the IGBT 101 starts to decrease. At this time, since dIc / dt has a negative value, the cathode-anode voltage Vka further increases from Vka1 and reaches the first peak voltage Vkap1 at time tvkae.

  When the resistance changeover switch 104 is switched to the on state at time t2 when a predetermined period has elapsed from time tvkae, the gate drive resistance becomes the minimum value R3. At this time, the falling slope of the collector-emitter voltage Vce of the IGBT 101 increases. Eventually, the collector-emitter voltage Vce of the IGBT 101 becomes the saturation voltage Vcesat, and the turn-on operation is completed.

  The switch 1 switching control circuit 105 and the switch 2 switching control circuit 106 are provided with an appropriate delay time from the time tvth when the threshold detection means 107 detects that the gate voltage has reached the threshold voltage, respectively, The changeover switch 104 is controlled. Thus, the above operation is performed.

(Explanation of effects in this embodiment)
In the present embodiment, by turning on the gate of the IGBT 101 with the gate drive resistance set to the intermediate value R1 until time t1 in the first half of the turn-on operation, the turn-on loss of the IGBT 101 from time tvth to time t1 can be reduced.

  Prior to the start of increasing the reverse voltage Vka of the SiC-SBD 102, the gate drive resistance is set to the maximum value R2 at time t1, thereby reducing the falling slope of the collector-emitter voltage Vce of the IGBT 101 and reducing the IGBT collector current Ic. By reducing the absolute value of negative dIc / dt when decreasing after showing the peak current, the peak voltage Vkap1 of the cathode-anode voltage Vka of the SiC-SBD 102 can be reduced.

  Furthermore, by setting the gate drive resistance to the minimum value R3 at time t2 after the time tvake when the cathode-anode voltage Vka of the SiC-SBD 102 becomes the peak voltage Vkap1, the falling slope of the IGBT collector-emitter voltage Vce increases. The turn-on loss of the IGBT 101 after time t2 can be reduced.

(Description of specific circuit configuration example)
FIG. 6 shows an example of a specific circuit configuration of the gate drive circuit of this embodiment.

  The gate voltage determination circuit 108 includes resistors Ra, Rb and Rc, and a semiconductor switch Tra. That is, if the gate voltage is divided by Ra and Rb and the gate voltage reaches a predetermined voltage Vref that is somewhat lower than the threshold voltage, the values of Ra and Rb are selected so that Tra is turned on by the voltage at point a. When the voltage is lower than Vref, the voltage at the point b becomes high level, and when the gate voltage is higher than Vref, the voltage at the point b becomes low level. That is, since the voltage at the point b is switched from the high level to the low level, it can be determined that the gate voltage has reached Vref.

  The gate voltage differentiation circuit 109 includes a capacitor C and a resistor R. The differential value determination circuit 110 includes semiconductor switches Trb and Trc and a resistor Rd. In other words, when the voltage at the point b is low level, if the output voltage of the gate voltage differentiating circuit 109 is set to turn on when the output voltage of the gate voltage differentiating circuit 109 is higher than Vbref1, if the output voltage of the gate voltage differentiating circuit 109 is higher than Vbref1, c The voltage at the point becomes low level, and if it is equal to or lower than Vbref1, the voltage at point c becomes high level. That is, since the voltage at the point c is switched from the low level to the high level, it can be determined that the output voltage of the gate voltage differentiating circuit 109 is equal to or lower than Vbref1, that is, the gate voltage has reached the threshold voltage.

  The switch 1 switching control circuit 105 includes resistors Re and Rf and semiconductor switches Trd and Tre. That is, when the voltage at point b is high and Trb is on, the voltage at point c is low and the voltage at point e is also low, so that the resistance selector switch 103 is on. If the voltage at point b is low and Trc is off, the voltage at point c is high and the voltage at point e is high, so that the resistance changeover switch 103 is off. The rising speed of the voltage at the point c can be controlled by the input capacitance of Rd and Rd. That is, a delay circuit is configured by the input capacitance of Trd and Rd, and the delay time from time tvth to time t1 can be controlled.

  The resistance changeover switch 103 remains off from time t1 to at least time t2. If the gate voltage falls below the threshold voltage between time t1 and time t2, the voltage at point b becomes high level, point c becomes low level, point e becomes low level, and the resistance changeover switch 103 may be turned on again. There is. In this embodiment, the Trb input capacitance and the CR time constant of Rc are increased so that the point b does not become high even if the gate voltage falls below the threshold voltage again after the gate voltage reaches the threshold voltage during turn-on. To prevent malfunction. That is, this embodiment includes a determination maintaining circuit that maintains a determination result that the gate voltage has reached the threshold voltage until the turn-on operation is completed.

  The switch 2 switching control circuit 106 includes resistors Rg, Rh and Ri, and semiconductor switches Trf, Trg and Trh. That is, when the voltage at the point e is low, the voltage at the point h is high, the resistance changeover switch 104 is turned off, and when the voltage at the point e is high, the voltage at the point h is increased after a certain delay time. The resistance change switch 104 is turned on.

  The voltage increase speed at the point g can be controlled by the input capacity of Rh and Rh. That is, a delay circuit is configured by the input capacitance of Trh and Rh, and the delay time from time tvth to time t2 can be controlled. Also, a delay circuit is provided by the input capacitance of Trg and Rg so that the point f does not immediately become a high level even if the voltage at the point e becomes a low level after the time t2.

  In this embodiment, it is possible to detect that the gate voltage has reached the threshold voltage more accurately by detecting the time change rate of the gate voltage and the gate voltage, and to realize a more accurate switching timing of the resistor. .

  The circuit configuration of the present embodiment shown in FIG. 6 is not limited to this, and various other circuit configurations can be used as long as they have the functions described above.

  FIG. 7 shows a configuration of a gate driving device of a semiconductor device according to a third embodiment of the present invention.

(Description of circuit connection configuration)
In the gate driving device of this embodiment, a second differential value determination circuit B111 is added to the configuration described in the second embodiment. That is, the resistance changeover switch 103 is controlled based on the determination result of the differential value determination circuit A110, and the resistance changeover switch 104 is controlled based on the determination result of the differential value determination circuit B111.

  The differential value determination circuit B111 determines whether the output voltage of the gate differential circuit is smaller or larger than Vbref2, which is the second differential value reference voltage, as shown in FIG.

  The collector current Ic of the IGBT 101 can be approximated by Ic = gm (Vg−Vth). Here, gm is a gate conductance, and Vth is a gate threshold voltage. When both sides are differentiated, dIc / dt = gm × dVg / dt. That is, the time change rate of the collector current and the time change rate of the gate voltage are in a proportional relationship. Therefore, when dIc / dt is zero, that is, when Ic is the peak current, the time change rate dVg / dt of the gate voltage is low.

  As described in the first embodiment, after the time when the collector current Ic of the IGBT 101 reaches the peak, the reverse voltage Vka of the SiC-SBD 102 starts to rise, and when Ic passes the peak and dIc / dt becomes a negative value. Furthermore, Vka rises.

  Therefore, by detecting the peak timing of Ic by dVg / dt, setting an appropriate delay time for this, and controlling the time t2 for switching the gate drive resistance from the maximum value R2 to the minimum value R3, the time t2 is set. It becomes possible to control with higher accuracy, and it is possible to more suitably reduce the Vka peak and the turn-on loss of the IGBT 101.

  In addition, since the time change rate of the gate voltage when detecting the threshold voltage and the time change rate of the gate voltage corresponding to the Ic peak are different from each other, preferably the differential value determination is performed as shown in FIG. By providing gate voltage differentiating circuits 109A and 109B in circuits A110 and B111, respectively, and determining the value of each differentiating circuit, highly reliable detection is possible.

  FIG. 10 shows the configuration of a gate drive device for a semiconductor device according to the fourth embodiment of the present invention.

(Description of circuit connection configuration)
In addition to the configuration described in the second embodiment, the gate driving device of the present embodiment includes an off-side power supply conduction circuit 113 and a turn-off power supply circuit 113 serving as a turn-off power supply connecting means for connecting a wiring connected to the gate terminal G to the turn-off power supply Vgn. A turn-off power supply connection control circuit 114 for controlling the power supply conduction circuit 113 is provided.

  The off-side power supply conduction circuit 113 connects the wiring connected to the gate terminal G to the turn-off side power supply Vgn prior to the time tvkae during the period when the resistance value of the gate drive resistor is set to R2, and the gate voltage is set for a predetermined period. Has a function of increasing the collector-emitter resistance of the IGBT 101. As described in the first embodiment, Vka = Vcc− (Vce + L × dIc / dt). Therefore, when Vce is increased by increasing the collector-emitter resistance of the IGBT 101, the voltage peak of Vka can be decreased. .

  In this embodiment, the connection start time (tms) and connection end time (tme) to the turn-off power supply Vgn of the wiring connected to the gate terminal G are set to approximately tvkas and approximately tvkae, respectively. However, the present invention is not limited to this, and the relationship of t1 <tvkas ≦ tms <tme ≦ tvkae <t2 is sufficient.

  In this embodiment, Vce can be reduced until time t1, so that the turn-on loss until time t1 can be significantly reduced.

(Explanation of drive sequence)
Hereinafter, the operation of this embodiment will be described with reference to FIG. Switching of the driving resistors R1, R2, and R3 is the same as that shown in the second embodiment. In this embodiment, the wiring connected to the gate terminal G by the off-side power supply conduction circuit 113 is connected to the turn-off side power supply Vgn during the period from the time tvkas to the time tvkae, and the gate voltage is lowered for a predetermined period. As a result, the collector-emitter voltage Vce of the IGBT 101 is increased again to reduce Vkap.

  Although the embodiments of the present invention have been described in detail, the present invention is not limited to the above-described embodiments, and various embodiments are possible within the scope of the technical idea of the present invention.

101 IGBT
102 SiC-SBD
103, 104 Resistance changeover switch 105 Switch 1 changeover control circuit 106 Switch 2 changeover control circuit 107 Threshold detection means 108 Gate voltage determination circuit 109 Gate voltage differentiation circuit 110 Differential value determination circuit, differential value determination circuit A
111 Differential value judgment circuit B
113 off-side power supply conduction circuit 114 turn-off power supply connection control circuit

Claims (17)

A voltage-controlled semiconductor switching element ;
The drive device for a semiconductor device having a <br/> said voltage-controlled semiconductor switching element reflux diode connected in inverse parallel with said voltage-controlled semiconductor switching element between the collector-emitter of
A gate driving resistor connected between a gate terminal of the voltage-controlled semiconductor switching element and a turn-on power source;
Threshold detection means for detecting that the gate voltage of the voltage-controlled semiconductor switching element has reached a gate threshold voltage that is a threshold at which a main current starts to flow;
The resistance value of the gate driving resistor is set to a first resistance value at the start of turn-on operation, and after the threshold value detecting means detects that the gate voltage has reached the gate threshold voltage, the first resistance value is set. A gate drive resistance setting means for setting a second resistance value larger than the first resistance value and then setting a third resistance value smaller than the first and second resistance values;
Further comprising a <br/> turn-off power connection means for connecting the wiring connected to the gate terminal to turn off power supply,
The turn-off power connection means, in a period in which the resistance value of the gate driving resistance is set to the second resistance value, the drive apparatus for a semiconductor device which is characterized that you connect the wire to the turn-off power supply. In the drive device of the semiconductor device according to claim 1,
The threshold detection means is configured by a gate voltage determination circuit that determines whether the gate voltage is equal to or higher than a predetermined voltage,
The gate drive resistance setting means sets the resistance value of the gate drive resistance to the second resistance value according to the determination result of the gate voltage determination circuit. In the drive device of the semiconductor device according to claim 1,
The threshold detection means includes a gate voltage differentiating circuit for generating a time change rate of the gate voltage, and a differential value determining circuit for determining whether a differential value generated by the gate voltage differentiating circuit is equal to or less than a predetermined value. Consisting of
The gate drive resistance setting means sets the resistance value of the gate drive resistance to the second resistance value according to the determination result of the differential value determination circuit. In the drive device of the semiconductor device according to claim 1,
The threshold detection means includes a gate voltage determination circuit that determines whether the gate voltage is equal to or higher than a predetermined voltage, a gate voltage differentiation circuit that generates a time change rate of the gate voltage, and the gate voltage differentiation circuit. A differential value determination circuit that determines whether or not the generated differential value is equal to or less than a predetermined value;
The gate drive resistance setting means sets the resistance value of the gate drive resistance to the second resistance value according to each determination result of the gate voltage determination circuit and the differential value determination circuit. Drive device. In the drive device of the semiconductor device according to claim 3 or 4,
The threshold detection means further includes a second gate voltage differentiating circuit for generating a time change rate of the gate voltage and a differential value generated by the second gate voltage differentiating circuit being equal to or less than a predetermined second value. A second differential value determination circuit for determining whether or not
The gate drive resistance setting means sets the resistance value of the gate drive resistance to the third resistance value in accordance with each determination result of the second differential value determination circuit. . In the drive device of the semiconductor device given in any 1 paragraph of Claims 1-5,
The gate drive resistance setting means sets the resistance value of the gate drive resistance to the second resistance value during a period from when the voltage of the freewheeling diode starts to rise to the first peak voltage. A drive device for a semiconductor device. In the drive device of the semiconductor device given in any 1 paragraph of Claims 1-5 ,
The turn-off power supply connecting means connects the wiring to the turn-off power supply during a period from when the voltage of the freewheeling diode starts to rise to the first peak voltage. . A voltage-controlled semiconductor switching element;
A free-wheeling diode connected in antiparallel with the voltage-controlled semiconductor switching element between a collector and an emitter of the voltage-controlled semiconductor switching element;
In a drive device for a semiconductor device comprising:
A gate driving resistor connected between a gate terminal of the voltage-controlled semiconductor switching element and a turn-on power source;
Threshold detection means for detecting that the gate voltage of the voltage-controlled semiconductor switching element has reached a gate threshold voltage that is a threshold at which a main current starts to flow;
The resistance value of the gate driving resistor is set to a first resistance value at the start of turn-on operation, and after the threshold value detecting means detects that the gate voltage has reached the gate threshold voltage, the first resistance value is set. A gate drive resistance setting means for setting a second resistance value larger than the first resistance value and then setting a third resistance value smaller than the first and second resistance values;
A turn-off power supply connection means for connecting the wiring connected to the gate terminal to a turn-off power supply;
Further comprising
The gate drive resistance setting means is a time when a first predetermined period has elapsed since the threshold detection means detects that the gate voltage has reached the gate threshold voltage. From the time t1, the second resistance value is set, and after the time t2 when the second predetermined period has further elapsed from the time t1, the third resistance value is set.
The drive device for a semiconductor device, wherein the turn-off power supply connecting means connects the wiring to the turn-off power supply during the period from the time t1 to the time t2 . In the drive device of the semiconductor device according to claim 8 ,
The threshold detection means is configured by a gate voltage determination circuit that determines whether the gate voltage is equal to or higher than a predetermined voltage,
The gate drive resistance setting means sets the resistance value of the gate drive resistance to the second resistance value according to the determination result of the gate voltage determination circuit . In the drive device of the semiconductor device according to claim 8 ,
The threshold detection means includes a gate voltage differentiating circuit for generating a time change rate of the gate voltage, and a differential value determining circuit for determining whether a differential value generated by the gate voltage differentiating circuit is equal to or less than a predetermined value. Composed of
The gate drive resistance setting means sets the resistance value of the gate drive resistance to the second resistance value according to the determination result of the differential value determination circuit. In the drive device of the semiconductor device according to claim 8 ,
The threshold detection means includes a gate voltage determination circuit that determines whether the gate voltage is equal to or higher than a predetermined voltage , a gate voltage differentiation circuit that generates a time change rate of the gate voltage, and the gate voltage differentiation circuit. A differential value determination circuit that determines whether or not the generated differential value is equal to or less than a predetermined value;
The gate drive resistance setting means sets the resistance value of the gate drive resistance to the second resistance value according to each determination result of the gate voltage determination circuit and the differential value determination circuit. Drive device. In the drive device of the semiconductor device according to claim 10 or 11 ,
The threshold value detecting means further includes a second gate voltage differentiating circuit for generating a time change rate of the gate voltage and a differential value generated by the second gate voltage differentiating circuit being equal to or less than a predetermined second value. performed for determining whether or not there, a second differential value determining circuit for setting the time t2 on the basis of the determination,
The gate drive resistor setting means, the driving device of the semiconductor device and sets the second differential value resistance of the gate drive resistor according to determine the constant result of the determination circuit to the third resistance . In the drive device of the semiconductor device given in any 1 paragraph of Claims 8-12 ,
The gate drive resistance setting means sets the resistance value of the gate drive resistance to the second resistance value in a period from a time tvkas at which the voltage of the freewheeling diode starts to rise to a time tvkae at which the first peak voltage is reached. and, and the time t1 <the time Tvkas <the time Tvkae <driving apparatus wherein a said time t2 der Rukoto. In the drive device of the semiconductor device given in any 1 paragraph of Claims 8-12 ,
The turn-off power supply connection means starts connection of the wiring to the turn-off power source during a period from a time tvkas when the voltage of the freewheeling diode starts to rise to a time tvkae when the voltage reaches the first peak voltage. tms and connection termination time tme, the time t1 <the time Tvkas ≦ the time tme <the time Tvkae ≦ the time tme <driving apparatus for a semiconductor device, characterized by chromatic said time becomes t2 relationship. The drive device for a semiconductor device described in any one of claims 1 to 14,
The voltage controlled semiconductor switching element is an insulated gate bipolar transistor . In the drive device of the semiconductor device given in any 1 paragraph of Claims 1-14 ,
The voltage-controlled semiconductor switching element driving device wherein a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor ) der Rukoto. In the drive device of the semiconductor device given in any 1 paragraph of Claims 1-16,
The driving device for a semiconductor device, wherein the free-wheeling diode is a Schottky barrier diode .