JP6976374B2 - Power converter - Google Patents

Description

The present application relates to a power conversion device.

In a power conversion device, as one of the methods using a gate voltage as an index for determining an abnormality, for example, as disclosed in Patent Document 1, a plurality of self-extinguishing semiconductor switching elements are used, and the gate voltage is used. There is a technique for protecting the power conversion device by generating a fail according to the number of abnormal semiconductor switching elements to stop the power conversion operation.

Japanese Unexamined Patent Publication No. 11-252894

However, the disclosed technology of Patent Document 1 requires a plurality of semiconductor switching elements in order to continue the operation for a desired time, and as a result, there is a problem that the size of the power conversion device is increased and the cost is increased.
In addition, as a countermeasure against surges in which the amount of drain current per unit time increases as the gate voltage increases, it is necessary to add a snubber circuit, etc., which increases the size of the power converter and increases the cost. There is.
In addition, if the design is made so that the semiconductor switching element is not destroyed for a certain period of time until an abnormality is determined, the power application time to the semiconductor switching element becomes long, so the element temperature rises and it is necessary to add cooling parts. There is also a problem that becomes.

The present application discloses a technique for solving the above-mentioned problems, and an object of the present application is to provide a power conversion device that suppresses an increase in size and an increase in cost.

The power conversion device according to the present application corresponds to a semiconductor switching element, a control driver for controlling the semiconductor switching element, a detection unit for detecting the gate voltage of the semiconductor switching element, and the gate voltage detected by the detection unit. A control unit that controls the semiconductor switching element is provided.
Wherein when the gate voltage is equal to or greater than the threshold value, the control unit reduces the output current target value by controlling the control driver, to suppress the output.

According to the power conversion device disclosed in the present application, a power conversion device that suppresses an increase in size and an increase in cost can be obtained.

It is a figure which shows the circuit structure of the power conversion apparatus which concerns on Embodiment 1. FIG. It is a figure which shows the effect of reducing the switching loss of the semiconductor switching element by the power conversion apparatus which concerns on Embodiment 1. FIG.

Hereinafter, preferred embodiments of the power conversion device according to the present application will be described with reference to the drawings.

Embodiment 1.
FIG. 1 shows a circuit configuration of the power conversion device according to the first embodiment, and reference numerals A to K in the figure mean that the lines between AA and KK are continuous lines. ..
As shown in FIG. 1, the power conversion device 100 includes an AC / DC converter 3 composed of a PFC (Power Factor Collection) reactor 1 for improving power factor and semiconductor switching elements 2a to 2d, and AC / DC. A smoothing capacitor 4 is provided after the converter 3. Further, the power conversion device 100 includes a DC / DC converter 10 composed of semiconductor switching elements 5a to 5d, a transformer 6, diodes 7a to 7d, a smoothing reactor 8, and a smoothing capacitor 9 after the smoothing capacitor 4. There is. The control drivers 11a to 11d are connected to the semiconductor switching elements 2a to 2d, respectively, and the control drivers 12a to 12d are connected to the semiconductor switching elements 5a to 5d, respectively.

The semiconductor switching elements 2a to 2d and the semiconductor switching elements 5a to 5d include, for example, a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) or a self-extinguishing semiconductor such as an IGBT (Insulated Gate Bipolar Transistor) or a wide-band semiconductor using a wide band. Will be. Further, in the present embodiment, the two power conversion circuits of the AC / DC converter 3 and the DC / DC converter 10 are connected in series, but these may be connected in parallel. In addition, although the number of power conversion circuits is two in the present embodiment, three or more may be used.

The first sensor circuit 13 detects the input voltage or the current value 14, and the second sensor circuit 15 detects the output voltage or the current value 16. Further, the first detection unit 17a to the fourth detection unit 17d constituting the AC / DC converter 3 detect the power supply voltage values 18a to 18d of the control drivers 11a to 11d, and the fifth detection unit constituting the DC / DC converter 10 is detected. The units 19a to 8th detection unit 19d detect the power supply voltage values 20a to 20d of the control drivers 12a to 12d.

In the control unit 21, the input voltage or current value 14 detected by the first sensor circuit 13, the output voltage or current value 16 detected by the second sensor circuit 15, and the first detection unit 17a to the fourth detection unit 17d. Target output based on the detected power supply voltage values 18a to 18d of the control drivers 11a to 11d and the power supply voltage values 20a to 20d of the control drivers 12a to 12d detected by the fifth detection unit 19a to the eighth detection unit 19d. Drive signals 22a to 22d and drive signals 23a to 23d are generated so as to be electric current.

The control unit 21 performs PWM control, and the PWM control drives the semiconductor switching elements 2a to 2d and the semiconductor switching elements 5a to 5d. The drive signals 22a to 22d generated by the control unit 21 are input to the gates of the semiconductor switching elements 2a to 2d via the control drivers 11a to 11d, respectively, and the drive signals 23a to 23d generated by the control unit 21 are , Are input to the gates of the semiconductor switching elements 5a to 5d via the control drivers 12a to 12d, respectively.

The control unit 21 is provided by the power supply voltage values 18a to 18d of the control drivers 11a to 11d detected by each of the first detection units 17a to 17d, and by the fifth detection unit 19a to the eighth detection unit 19d, respectively. When any one of the detected power supply voltage values 20a to 20d of the control drivers 12a to 12d is equal to or higher than the abnormality detection upper limit value, the control drivers 11a to 11d and the control drivers 12a to 12d are controlled. The output current target value is lowered and the output is suppressed.

Generally, in a semiconductor switching element, when the gate voltage is high, a surge increases due to a sudden flow of drain current. Therefore, it is necessary to provide a snubber circuit as a countermeasure against the surge. However, in the present embodiment, the surge can be suppressed. Therefore, the snubber circuit can be reduced, and the size and cost of the power conversion device can be reduced by reducing the snubber circuit. Further, by setting the abnormality determination upper limit value of the gate voltage as the first threshold value, it is possible to perform maximum power conversion while preventing element destruction.

Further, the control unit 21 is a power supply voltage value 18a to 18d of the control drivers 11a to 11d detected by each of the first detection unit 17a to the fourth detection unit 17d, and the fifth detection unit 19a to the eighth detection unit 19d. When the power supply voltage value of any one of the power supply voltage values 20a to 20d of the control drivers 12a to 12d detected by each is equal to or less than the abnormality determination lower limit value, the semiconductor switching elements 2a to 2d and the semiconductor The drive frequency of the switching elements 5a to 5d is lowered.

Next, the relationship between the gate voltage and the drive frequency of the semiconductor switching element will be described with reference to FIG.
When the gate voltage Vds of the semiconductor switching element is low, the amount of change in the drain current Id per unit time becomes small, so that the switching loss increases as shown in FIG. 2 (a). As shown in 2 (b), the drive frequency is lowered and the number of switchings is lowered. As a result, switching loss during power conversion can be suppressed, heat generation of the semiconductor switching element can be suppressed, and cooling components can be reduced. Further, by setting the lower limit value for determining an abnormality of the gate voltage as the second threshold value, it is possible to perform maximum power conversion while preventing element destruction. The hatched portion in FIG. 2 shows the switching loss.

When the semiconductor switching element is a wide bandgap semiconductor such as GaN (Gallium Nitride) or SiC (Silicon Carbide), the switching speed becomes high and the surge tends to increase. The surge reduction effect can be expected more.
Further, since the wide bandgap semiconductor has a low voltage withstand voltage, a plurality of elements are required for load distribution when the element is designed so that the element is not destroyed until the abnormality is determined. However, in the present embodiment, the abnormality is present. Since the load until the determination can be suppressed, it is not necessary to add an element.

Although the present application describes exemplary embodiments, the various features, embodiments, and functions described in the embodiments are not limited to the application of a particular embodiment, either alone or. Various combinations are applicable to the embodiments.
Therefore, innumerable variations not exemplified are envisioned within the scope of the techniques disclosed in the present application. For example, it is assumed that at least one component is modified, added or omitted.

1 PFC reactor, 2a to 2d, 5a to 5d semiconductor switching element, 3 AC / DC converter, 4 smoothing capacitor, 6 transformer, 7a to 7d diode, 8 smoothing reactor, 9 smoothing capacitor, 10 DC / DC converter, 11a to 11d. , 12a-12d Control driver, 13 1st sensor circuit, 14 Input voltage or current value, 15 2nd sensor circuit, 16 Output voltage or current value, 17a 1st detector, 17b 2nd detector, 17c 3rd detector , 17d 4th detector, 18a-18d, 20a-20d power supply voltage value, 19a 5th detector, 19b 6th detector, 19c 7th detector, 19d 8th detector, 22a-22d, 23a-23d drive Signal, 100 power converter, Vds gate voltage, Id drain current.

Claims (3)

With semiconductor switching elements
A control driver that controls the semiconductor switching element,
A detector that detects the gate voltage of the semiconductor switching element,
A control unit that controls the semiconductor switching element according to the gate voltage detected by the detection unit is provided.
If the gate voltage is equal to or greater than the threshold value, the control unit, the control driver control to decrease the output current target value, the power conversion apparatus characterized by suppressing the output. Before Ki閾value, the power converter according to claim 1, characterized in that the anomaly detection limit of the gate voltage. The power conversion device according to claim 1 or 2 , wherein the semiconductor switching element is a wide bandgap semiconductor.

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