JP5799167B2 - パイプライン方式のパワーゲーティング - Google Patents

パイプライン方式のパワーゲーティング Download PDF

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Publication number
JP5799167B2
JP5799167B2 JP2014519292A JP2014519292A JP5799167B2 JP 5799167 B2 JP5799167 B2 JP 5799167B2 JP 2014519292 A JP2014519292 A JP 2014519292A JP 2014519292 A JP2014519292 A JP 2014519292A JP 5799167 B2 JP5799167 B2 JP 5799167B2
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Japan
Prior art keywords
power
gate
destination
source
gated
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JP2014519292A
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Japanese (ja)
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JP2014526175A (ja
JP2014526175A5 (enExample
Inventor
ダブリュ． ベイリー ダニエル
ダブリュ． ベイリー ダニエル
エス． ロジャース アーロン
エス． ロジャース アーロン
ジェイ． モンタナーロ ジェイムズ
ジェイ． モンタナーロ ジェイムズ
ジー． バージェス ブラッドリー
ジー． バージェス ブラッドリー
ジェイ． ハンナン ピーター
ジェイ． ハンナン ピーター
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Advanced Micro Devices Inc
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Advanced Micro Devices Inc
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Publication of JP2014526175A publication Critical patent/JP2014526175A/ja
Publication of JP2014526175A5 publication Critical patent/JP2014526175A5/ja
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0013—Arrangements for reducing power consumption in field effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0016—Arrangements for reducing power consumption by using a control or a clock signal, e.g. in order to apply power supply

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Sources (AREA)
  • Logic Circuits (AREA)
JP2014519292A 2011-07-06 2012-07-05 パイプライン方式のパワーゲーティング Active JP5799167B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/176,842 US8736308B2 (en) 2011-07-06 2011-07-06 Pipeline power gating
US13/176,842 2011-07-06
PCT/US2012/045559 WO2013006702A1 (en) 2011-07-06 2012-07-05 Pipeline power gating

Publications (3)

Publication Number Publication Date
JP2014526175A JP2014526175A (ja) 2014-10-02
JP2014526175A5 JP2014526175A5 (enExample) 2015-08-13
JP5799167B2 true JP5799167B2 (ja) 2015-10-21

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ID=46640093

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2014519292A Active JP5799167B2 (ja) 2011-07-06 2012-07-05 パイプライン方式のパワーゲーティング

Country Status (6)

Country Link
US (1) US8736308B2 (enExample)
EP (1) EP2730027B1 (enExample)
JP (1) JP5799167B2 (enExample)
KR (1) KR101850123B1 (enExample)
CN (1) CN103650346B (enExample)
WO (1) WO2013006702A1 (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9496851B2 (en) 2014-09-10 2016-11-15 Qualcomm Incorporated Systems and methods for setting logic to a desired leakage state
CN112100793B (zh) * 2019-05-31 2023-06-13 超威半导体(上海)有限公司 用于重定时流水线的基于条带的自选通

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4980836A (en) 1988-10-14 1990-12-25 Compaq Computer Corporation Apparatus for reducing computer system power consumption
JP3727838B2 (ja) * 2000-09-27 2005-12-21 株式会社東芝 半導体集積回路
US6946869B2 (en) 2003-10-15 2005-09-20 International Business Machines Corporation Method and structure for short range leakage control in pipelined circuits
US7262631B2 (en) 2005-04-11 2007-08-28 Arm Limited Method and apparatus for controlling a voltage level
US7323909B2 (en) 2005-07-29 2008-01-29 Sequence Design, Inc. Automatic extension of clock gating technique to fine-grained power gating
JP4675835B2 (ja) 2006-06-12 2011-04-27 株式会社東芝 半導体集積回路装置
US7397271B2 (en) * 2005-08-19 2008-07-08 Kabushiki Kaisha Toshiba Semiconductor integrated circuit device
JP4950458B2 (ja) 2005-08-19 2012-06-13 株式会社東芝 半導体集積回路装置
US7295036B1 (en) 2005-11-30 2007-11-13 Altera Corporation Method and system for reducing static leakage current in programmable logic devices
US8527797B2 (en) * 2007-12-26 2013-09-03 Qualcomm Incorporated System and method of leakage control in an asynchronous system
US8266569B2 (en) 2010-03-05 2012-09-11 Advanced Micro Devices, Inc. Identification of critical enables using MEA and WAA metrics
US8436647B2 (en) 2011-07-06 2013-05-07 Advanced Micro Devices, Inc. Pipeline power gating for gates with multiple destinations

Also Published As

Publication number Publication date
WO2013006702A1 (en) 2013-01-10
CN103650346A (zh) 2014-03-19
JP2014526175A (ja) 2014-10-02
US20130009697A1 (en) 2013-01-10
EP2730027B1 (en) 2018-09-05
CN103650346B (zh) 2017-11-17
KR20140040207A (ko) 2014-04-02
US8736308B2 (en) 2014-05-27
KR101850123B1 (ko) 2018-04-19
EP2730027A1 (en) 2014-05-14

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