JP5744002B2 - Cmutアレイ - Google Patents
Cmutアレイ Download PDFInfo
- Publication number
- JP5744002B2 JP5744002B2 JP2012501381A JP2012501381A JP5744002B2 JP 5744002 B2 JP5744002 B2 JP 5744002B2 JP 2012501381 A JP2012501381 A JP 2012501381A JP 2012501381 A JP2012501381 A JP 2012501381A JP 5744002 B2 JP5744002 B2 JP 5744002B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- wafer
- cmut
- silicon
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B06—GENERATING OR TRANSMITTING MECHANICAL VIBRATIONS IN GENERAL
- B06B—METHODS OR APPARATUS FOR GENERATING OR TRANSMITTING MECHANICAL VIBRATIONS OF INFRASONIC, SONIC, OR ULTRASONIC FREQUENCY, e.g. FOR PERFORMING MECHANICAL WORK IN GENERAL
- B06B1/00—Methods or apparatus for generating mechanical vibrations of infrasonic, sonic, or ultrasonic frequency
- B06B1/02—Methods or apparatus for generating mechanical vibrations of infrasonic, sonic, or ultrasonic frequency making use of electrical energy
- B06B1/0292—Electrostatic transducers, e.g. electret-type
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Mechanical Engineering (AREA)
- Transducers For Ultrasonic Waves (AREA)
- Ultra Sonic Daignosis Equipment (AREA)
- Bipolar Transistors (AREA)
- Pressure Sensors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Investigating Or Analyzing Materials By The Use Of Ultrasonic Waves (AREA)
Description
有用な分解能を有する画像デバイスを提供し、必要な約90°の円錐角を画像化するためには、l立方mm程度のデバイス内に約1000個以上のトランスデューサエレメントが必要となる。上述のように、通常の構造は、複数のコンポーネントからなる積層体であり、CMUTアレイが頂部にあり、その下に処理電子機器が設けられている。所望の分解能を実現するためには、このデバイスは、20〜50MHzで動作可能であり、好ましくは最大約100MHzまでで動作可能である必要がある。これらの周波数から、CMUTアレイが約20μmの厚さでなければいけないことが分かる。
このことがなされると、酸化物層は取り除かれ、また、シリコン層21にPOCl3が添加されてその表面のけい光体の濃度が高くされる。このことは、けい光ガラスと呼ばれる残留物をシリコン層の表面に残すので、このけい光ガラスを取り除くために、次のステップが実行される:けい光ガラスをエッチングにより取り除くステップと、薄い酸化物層を成長させるステップと、ウエハーを高温で長時間処理し、けい光体をデバイス層の中に拡散させ、けい光体濃度を1016/cm3〜1019/cm3程度とするステップと、酸化物をエッチングにより取り除くステップと、500nmの厚みの新しい酸化物を成長させるステップ。
Claims (9)
- ウエハー接合型CMUTアレイであって、
基板全体にわたって分配される複数のCMUTエレメントを備えており、
各エレメントが、前記基板に形成されるキャビティおよび信号電極と、前記キャビティを閉じ、接地電極を形成する導電性膜とを有しており、
前記複数のエレメントの導電性膜が前記アレイの表面全体にわたって連続した接地平面を形成しており、
前記信号電極への電気接続部が、前記基板を通って、前記信号電極から前記基板の裏側まで延びている導電性ビアによって実現されてなる、CMUTアレイ。 - 前記CMUTアレイが導電体伝達信号電圧のかかっていない正面を有していることにより、前記CMUTアレイの前記正面自体を全体的に接地電位に維持することができる、請求項1に記載のCMUTアレイ。
- 前記信号電極がそれぞれ対応するキャビティ内に形成されてなる、請求項1又は2に記載のCMUTアレイ。
- 前記導電性ビアが、ウエハーの少なくともシリコンデバイス層を貫通するエッチングにより形成される孔部を含み、その中に、絶縁酸化物層および導電性材料を有してなる、請求項1乃至3のうちのいずれか一項に記載のCMUTアレイ。
- さらなるシリコン系のウエハーを用いて、膜が前記基板とは別に形成されてなる、請求項1乃至4のうちのいずれか一項に記載のCMUTアレイ。
- 基板全体にわたって分配される複数のCMUTエレメントを有しているCMUTアレイを製造する方法であって、
シリコン製の前記基板に、各エレメント用のキャビティおよび信号電極を形成し、これらの電極への電気的接続部を提供する導電性ビアを形成することと、
各キャビティを閉じ、接地電極を形成する導電性膜を提供することにより、前記CMUTアレイの表面全体にわたる連続した接地平面を形成することと
を含んでおり、
前記導電性膜が、前記基板に接合されるシリコンウエハーから形成される、方法。 - 前記電極が前記キャビティ内に形成される、請求項6に記載の方法。
- 前記ビアが、前記基板内に形成される孔部にポリシリコンを蒸着することにより形成される、請求項6又は7に記載の方法。
- シリコン窒化物層が前記キャビティ上に位置するように、前記基板上に膜形成ウエハーを配置することを含む、請求項6乃至8のうちのいずれか一項に記載の方法。
Applications Claiming Priority (7)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB0905255A GB0905255D0 (en) | 2009-03-26 | 2009-03-26 | Cmut array |
GB0905256.4 | 2009-03-26 | ||
GB0905256A GB0905256D0 (en) | 2009-03-26 | 2009-03-26 | Ultrasound transducer backing layer |
GB0905255.6 | 2009-03-26 | ||
GB0909296.6 | 2009-05-28 | ||
GB0909296A GB0909296D0 (en) | 2009-05-28 | 2009-05-28 | Ultrasound transsducer damping layer |
PCT/GB2010/000583 WO2010109205A2 (en) | 2009-03-26 | 2010-03-26 | Cmut array |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2012521704A JP2012521704A (ja) | 2012-09-13 |
JP2012521704A5 JP2012521704A5 (ja) | 2013-05-16 |
JP5744002B2 true JP5744002B2 (ja) | 2015-07-01 |
Family
ID=42308937
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2012501381A Expired - Fee Related JP5744002B2 (ja) | 2009-03-26 | 2010-03-26 | Cmutアレイ |
Country Status (7)
Country | Link |
---|---|
US (1) | US20120074509A1 (ja) |
EP (4) | EP2662153A1 (ja) |
JP (1) | JP5744002B2 (ja) |
CN (1) | CN102427890A (ja) |
DK (1) | DK2411163T3 (ja) |
ES (1) | ES2416182T3 (ja) |
WO (1) | WO2010109205A2 (ja) |
Families Citing this family (44)
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EP3689250B1 (en) | 2011-10-17 | 2022-12-07 | BFLY Operations, Inc. | Transmissive imaging and related apparatus and methods |
US9220415B2 (en) * | 2011-10-25 | 2015-12-29 | Andreas Mandelis | Systems and methods for frequency-domain photoacoustic phased array imaging |
WO2013089648A1 (en) * | 2011-12-16 | 2013-06-20 | Agency For Science, Technology And Research | Capacitive micromachined ultrasonic transducer arrangement and method of fabricating the same |
JP2013226389A (ja) * | 2012-03-31 | 2013-11-07 | Canon Inc | 探触子及びその製造方法、及びそれを用いた被検体情報取得装置 |
RU2627282C2 (ru) * | 2012-05-31 | 2017-08-04 | Конинклейке Филипс Н.В. | Полупроводниковая пластина и способ ее изготовления |
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US10424712B2 (en) * | 2013-01-18 | 2019-09-24 | Yale University | Methods for making a superconducting device with at least one enclosure |
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US9242275B2 (en) | 2013-03-15 | 2016-01-26 | Butterfly Networks, Inc. | Complementary metal oxide semiconductor (CMOS) ultrasonic transducers and methods for forming the same |
JP6279706B2 (ja) | 2013-03-15 | 2018-02-14 | バタフライ ネットワーク,インコーポレイテッド | 超音波デバイスおよび超音波システム |
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WO2015013245A2 (en) | 2013-07-23 | 2015-01-29 | Butterfly Network, Inc. | Interconnectable ultrasound transducer probes and related methods and apparatus |
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KR20150046637A (ko) * | 2013-10-22 | 2015-04-30 | 삼성전자주식회사 | 광음향 이미지와 초음파 이미지를 위한 광대역 초음파 프로브 |
US10328463B2 (en) | 2013-11-22 | 2019-06-25 | Sunnybrook Health Sciences Centre | Ultrasonic transducer with backing having spatially segmented surface |
KR20150065067A (ko) * | 2013-12-04 | 2015-06-12 | 삼성전자주식회사 | 정전용량 미세가공 초음파 변환기 및 그 제조방법 |
US9948254B2 (en) | 2014-02-21 | 2018-04-17 | Yale University | Wireless Josephson bifurcation amplifier |
CA2946133A1 (en) | 2014-04-18 | 2015-10-22 | Butterfly Network, Inc. | Ultrasonic transducers in complementary metal oxide semiconductor (cmos) wafers and related apparatus and methods |
KR102399314B1 (ko) | 2014-04-18 | 2022-05-18 | 버터플라이 네트워크, 인크. | 단일 기판 초음파 촬영 디바이스들, 관련된 장치들, 및 방법들의 아키텍처 |
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-
2010
- 2010-03-26 EP EP20130167734 patent/EP2662153A1/en not_active Withdrawn
- 2010-03-26 US US13/259,809 patent/US20120074509A1/en not_active Abandoned
- 2010-03-26 WO PCT/GB2010/000583 patent/WO2010109205A2/en active Application Filing
- 2010-03-26 EP EP13167736.1A patent/EP2669019A1/en not_active Ceased
- 2010-03-26 EP EP10714943.7A patent/EP2411163B1/en not_active Not-in-force
- 2010-03-26 ES ES10714943T patent/ES2416182T3/es active Active
- 2010-03-26 DK DK10714943.7T patent/DK2411163T3/da active
- 2010-03-26 CN CN2010800225984A patent/CN102427890A/zh active Pending
- 2010-03-26 EP EP20130167735 patent/EP2659987A1/en not_active Withdrawn
- 2010-03-26 JP JP2012501381A patent/JP5744002B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP2662153A1 (en) | 2013-11-13 |
WO2010109205A2 (en) | 2010-09-30 |
EP2669019A1 (en) | 2013-12-04 |
DK2411163T3 (da) | 2013-06-10 |
ES2416182T3 (es) | 2013-07-30 |
EP2411163A2 (en) | 2012-02-01 |
JP2012521704A (ja) | 2012-09-13 |
US20120074509A1 (en) | 2012-03-29 |
CN102427890A (zh) | 2012-04-25 |
EP2659987A1 (en) | 2013-11-06 |
WO2010109205A3 (en) | 2011-03-03 |
EP2411163B1 (en) | 2013-05-15 |
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